Searched refs:depth_bits (Results 1 - 10 of 10) sorted by relevance
/external/mesa3d/src/mesa/drivers/dri/common/ |
H A D | utils.h | 44 const uint8_t * depth_bits, const uint8_t * stencil_bits,
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H A D | utils.c | 104 * For the most part, data is just copied from \c depth_bits, \c stencil_bits, 132 * \param depth_bits Array of depth buffer sizes to be exposed. 134 * \param num_depth_stencil_bits Number of entries in both \c depth_bits and 159 const uint8_t * depth_bits, const uint8_t * stencil_bits, 242 (depth_bits[k] || stencil_bits[k])) { 249 if ((depth_bits[k] + stencil_bits[k] == 16) != 277 modes->depthBits = depth_bits[k]; 158 driCreateConfigs(mesa_format format, const uint8_t * depth_bits, const uint8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, const uint8_t * msaa_samples, unsigned num_msaa_modes, GLboolean enable_accum, GLboolean color_depth_match) argument
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/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
H A D | nouveau_screen.c | 57 const uint8_t depth_bits[] = { 0, 16, 24, 24 }; local 75 depth_bits, stencil_bits, 76 ARRAY_SIZE(depth_bits),
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | radeon_screen.c | 784 uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1]; local 794 depth_bits[0] = 0; 796 depth_bits[1] = 16; 798 depth_bits[2] = 24; 800 depth_bits[3] = 24; 809 depth_bits, 811 ARRAY_SIZE(depth_bits),
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_screen.c | 784 uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1]; local 794 depth_bits[0] = 0; 796 depth_bits[1] = 16; 798 depth_bits[2] = 24; 800 depth_bits[3] = 24; 809 depth_bits, 811 ARRAY_SIZE(depth_bits),
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | intel_screen.c | 1416 uint8_t depth_bits[4], stencil_bits[4]; local 1428 depth_bits[0] = 0; 1432 depth_bits[1] = 16; 1435 depth_bits[2] = 24; 1440 depth_bits[1] = 24; 1445 depth_bits, 1461 depth_bits[0] = 16; 1464 depth_bits[0] = 24; 1469 depth_bits, stencil_bits, 1, 1497 depth_bits[ [all...] |
/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | intel_screen.c | 1058 uint8_t depth_bits[4], stencil_bits[4]; local 1070 depth_bits[0] = 0; 1074 depth_bits[1] = 16; 1077 depth_bits[1] = 24; 1082 depth_bits, 1098 depth_bits[0] = 16; 1101 depth_bits[0] = 24; 1106 depth_bits, stencil_bits, 1,
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/external/mesa3d/src/gallium/drivers/etnaviv/ |
H A D | etnaviv_state.c | 220 unsigned depth_bits = local 243 cs->PE_DEPTH_NORMALIZE = fui(exp2f(depth_bits) - 1.0f); 256 ts_mem_config |= COND(depth_bits == 16, VIVS_TS_MEM_CONFIG_DEPTH_16BPP);
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/external/mesa3d/src/gallium/auxiliary/util/ |
H A D | u_format.c | 285 int depth_bits; local 287 depth_bits = desc->channel[depth_channel].size; 288 mrd = 1.0 / ((1ULL << depth_bits) - 1);
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/external/mesa3d/src/mesa/drivers/dri/swrast/ |
H A D | swrast.c | 216 unsigned pixel_bits, unsigned depth_bits, 240 depth_bits_array[2] = depth_bits; 241 depth_bits_array[3] = depth_bits; 215 swrastFillInModes(__DRIscreen *psp, unsigned pixel_bits, unsigned depth_bits, unsigned stencil_bits, GLboolean have_back_buffer) argument
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