| fef775caa705255358cdf7bbaf9bbc2fd1111761 |
|
11-Sep-2014 |
Ezequiel García <ezequiel@vanguardiasur.com.ar> |
nand: omap2: Add support for flash-based bad block table
This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table. This can also be enabled by setting
the 'nand-on-flash-bbt' devicetree property.
If the flash BBT is not enabled, the driver falls back to use OOB
bad block markers only, as before. If the flash BBT is enabled the
kernel will keep track of bad blocks using a BBT, in addition to
the OOB markers.
As explained by Brian Norris the reasons for using a BBT are:
""
The primary reason would be that NAND datasheets specify it these days.
A better argument is that nobody guarantees that you can write a
bad block marker to a worn out block; you may just get program failures.
This has been acknowledged by several developers over the last several
years.
Additionally, you get a boot-time performance improvement if you only
have to read a few pages, instead of a page or two from every block on
the flash.
""
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
| 31957609db529d401658adc2e91ef7df7ea42699 |
|
10-Sep-2014 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
ARM: OMAP2+: make of_device_ids const
of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by <linux/of.h> work with const of_device_ids. So mark the
non-const function parameters and structs for OMAP2+ as const, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 2b54057c9b2638792bdd83b58bad7a0cdf5f4533 |
|
02-Sep-2014 |
Roger Quadros <rogerq@ti.com> |
ARM: OMAP2+: gpmc: Don't complain if wait pin is used without r/w monitoring
For NAND read & write wait pin monitoring must be kept disabled as the
wait pin is only used to indicate NAND device ready status and not to
extend each read/write cycle.
So don't print a warning if wait pin is specified while read/write
monitoring is not in the device tree.
Sanity check wait pin number irrespective if read/write monitoring is
set or not.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Pekon Gupta <pekon@pek-sem.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| a3e83f05fbbf6c4994c658521a750bbd68bdf7a6 |
|
26-Aug-2014 |
Roger Quadros <rogerq@ti.com> |
ARM: OMAP2+: GPMC: Support Software ECC scheme via DT
For v3.14 and prior, 1-bit Hamming code ECC via software was the
default choice for some boards e.g. 3430sdp.
Commit ac65caf514ec in v3.15 changed the behaviour
to use 1-bit Hamming code via Hardware using a different ECC layout
i.e. (ROM code layout) than what is used by software ECC.
This ECC layout change causes NAND filesystems created in v3.14
and prior to be unusable in v3.15 and later. So don't mark "sw" scheme
as deperecated and support it.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 68e2eb533ef84197d6a60d23f45070cddcf51753 |
|
02-Jul-2014 |
Guido Martínez <guido@vanguardiasur.com.ar> |
ARM: OMAP2+: Make GPMC skip disabled devices
Currently, child nodes of the gpmc node are iterated and probed
regardless of their 'status' property. This means adding 'status =
"disabled";' has no effect.
This patch changes the iteration to only probe nodes marked as
available.
Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Tested-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 27c9fd607587e6c3b517590df4cd35ac85f3d0bd |
|
19-May-2014 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates
This patch add support for BCH16_ECC in GPMC (controller) driver:
- extends configuration space to include BCH16 registers
- extends parsing of DT binding for selecting BCH16 ecc-scheme
Signed-off-by: Pekon Gupta <pekon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
| edfaf05c2fcb853fcf35f12aeb9c340f5913337f |
|
15-Apr-2014 |
Victor Kamensky <victor.kamensky@linaro.org> |
ARM: OMAP2+: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.
Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| fb677ef70b65e22cd4401d31b700a8b4041efae1 |
|
22-Apr-2014 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Fix GPMC remap for devices using an offset
At least the smc91x driver expects the device to be at 0x300
offset from bus base address. This does not work currently
for GPMC when booted in device tree mode as it attempts to
remap the the allocated GPMC partition to the address
configured by the device tree plus the device offset.
Note that this works just fine when booted with legacy mode.
Let's fix the issue by just ignoring any device specific
offset while remapping. And let's make sure the remap
address confirms to the GPMC 16MB minimum granularity
as listed in the TRM for GPMC_CONFIG7 BASEADDRESS bits.
Otherwise we can get something like this:
omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300
Cc: Pekon Gupta <pekon@ti.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| efe8072316a899294212055c147d3d9adca940a4 |
|
22-Apr-2014 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Fix oops for GPMC free
If gpmc_cs_remap() fails we will get an error because we are calling
release_resource() on an uninitialized resource. Let's fix that by
checking the resource flags. And while at it, let's also make
gpmc_cs_delete_mem() use the res pointer that we already have to
avoid confusion.
Without this patch we can get the following error:
omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300
Unable to handle kernel NULL pointer dereference at virtual address 00000018
...
(gpmc_cs_free+0x94/0xc8)
(gpmc_probe_generic_child+0x178/0x1ec)
(gpmc_probe_dt+0x1bc/0x2cc)
(gpmc_probe+0x250/0x44c)
(platform_drv_probe+0x3c/0x6c)
(really_probe+0x74/0x208)
(driver_probe_device+0x34/0x50)
(bus_for_each_drv+0x60/0x8c)
(device_attach+0x80/0xa4)
(bus_probe_device+0x88/0xb0)
(device_add+0x320/0x450)
(of_platform_device_create_pdata+0x80/0x9c)
(of_platform_bus_create+0xd0/0x170)
(of_platform_bus_create+0x12c/0x170)
(of_platform_populate+0x60/0x98)
(pdata_quirks_init+0x30/0x48)
(customize_machine+0x20/0x48)
(do_one_initcall+0x2c/0x14c)
(do_basic_setup+0x98/0xd8)
(kernel_init_freeable+0x12c/0x1e0)
(kernel_init+0x8/0xf0)
(ret_from_fork+0x14/0x2c)
Code: e1a04000 e59f0070 eb195136 e5942010 (e5923018)
Cc: Pekon Gupta <pekon@ti.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: tony Lindgren <tony@atomide.com>
|
| 980386d2d6d49e0b42f48550853ef1ad6aa5d79a |
|
28-Jan-2014 |
Pekon Gupta <pekon@ti.com> |
ARM: OMAP2+: gpmc: fix: DT ONENAND child nodes not probed when MTD_ONENAND is built as module
Fixes: commit 75d3625e0e86b2d8d77b4e9c6f685fd7ea0d5a96
ARM: OMAP2+: gpmc: add DT bindings for OneNAND
OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and
register them platform_device for ONENAND driver to probe later. However this does
not happen if generic MTD_ONENAND framework is built as module (CONFIG_MTD_ONENAND=m).
Therefore, when MTD/ONENAND and MTD/ONENAND/OMAP2 modules are loaded, they are unable
to find any matching platform_device and remain un-binded. This causes on board
ONENAND flash to remain un-detected.
This patch causes GPMC controller to parse DT nodes when
CONFIG_MTD_ONENAND=y || CONFIG_MTD_ONENAND=m
CC: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 6b187b21c92b6e2c7e8ef0b450181c37a3f31681 |
|
28-Jan-2014 |
Pekon Gupta <pekon@ti.com> |
ARM: OMAP2+: gpmc: fix: DT NAND child nodes not probed when MTD_NAND is built as module
Fixes: commit bc6b1e7b86f5d8e4a6fc1c0189e64bba4077efe0
ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND
OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and
register them platform_device for NAND driver to probe later. However this does
not happen if generic MTD_NAND framework is built as module (CONFIG_MTD_NAND=m).
Therefore, when MTD/NAND and MTD/NAND/OMAP2 modules are loaded, they are unable
to find any matching platform_device and remain un-binded. This causes on board
NAND flash to remain un-detected.
This patch causes GPMC controller to parse DT nodes when
CONFIG_MTD_NAND=y || CONFIG_MTD_NAND=m
CC: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| fd4446f25e402fb186a6b7ec7a374aa8925ed708 |
|
15-Nov-2013 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Fix GPMC and simplify bootloader timings for 8250 and smc91x
Commit f2bf0e72d000 (ARM: OMAP2+: Add minimal 8250 support
for GPMC) added support for using bootloader timings for some
devices. Turns out we can do the same by looking at the compatible
flags of the child without adding a new function as smc91x has
a similar issue as 8250 with the bootloader timings.
And let's fix the 8250 naming, we should use the device type as
the name like uart instead of 8250 for zoom dts file.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| ac65caf514ec3e55e8d3d510ee37f80dd97418fe |
|
24-Oct-2013 |
Pekon Gupta <pekon@ti.com> |
ARM: OMAP2+: cleaned-up DT support of various ECC schemes
OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.
This patch updates following in DT bindings related to sectionion of ecc-schemes
- ti,elm-id: replaces elm_id (maintains backward compatibility)
- ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme
depends on ti,elm-id. (supported values ham1, bch4, and bch8)
- maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode)
Below table shows different flavours of ecc-schemes supported by OMAP devices
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W |
|(requires CONFIG_MTD_NAND_ECC_BCH) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
|(requires CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id in DT) | | |
+---------------------------------------+---------------+---------------+
To optimize footprint of omap2-nand driver, selection of some ECC schemes
also require enabling following Kconfigs, in addition to setting appropriate
DT bindings
- Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software
- Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
| f2bf0e72d000e76c4a9904cc8230cb2e659a2db4 |
|
11-Oct-2013 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Add minimal 8250 support for GPMC
Just initialize things using the bootloader timings like
we've been doing for the legacy booting too. It should be
possible to patch in the GPMC timings for the based on the
TL16CP743C/TL16C754C manual at:
http://www.ti.com/lit/ds/slls644g/slls644g.pdf
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| f70bf2a3fdc1d8c53d1c3b1d84a72d71a17606a1 |
|
18-Sep-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
ARM: mach-omap2: gpmc: Fix warning when CONFIG_ARM_LPAE=y
When CONFIG_ARM_LPAE=y the following build warning is generated:
arch/arm/mach-omap2/gpmc.c:1495:4: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat]
According to Documentation/printk-formats.txt '%pa' can be used to properly
print 'resource_size_t'.
Reported-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| af0721966195b3966214edd54af0d5f84d65419a |
|
22-Aug-2013 |
Chen Gang <gang.chen@asianux.com> |
ARM: OMAP2: use 'int' instead of 'unsigned' for variable 'gpmc_irq_start'
'gpmc_irq_start' is mostly used as 'int', and for a variable, do not
suggest to only use 'unsigned' as its type, so use 'int' instead of
'unsigned' for variable 'gpmc_irq_start'.
Also it will fix the related issue (dummy the real world failure):
arch/arm/mach-omap2/gpmc.c:728:2: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 1261674a2dded2b5b055f51fb44677a8654d3f06 |
|
01-Jun-2013 |
Thomas Meyer <thomas@m3y3r.de> |
ARM: OMAP2+: Cocci spatch "ptr_ret.spatch"
Cocci spatch "ptr_ret.spatch"
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| b536dd412b4364df2f9495c6550ee38f6ad3b0fe |
|
17-Jun-2013 |
avinash philip <avinashphilip@ti.com> |
ARM: OMAP2+: gpmc: Low power transition support
GPMC is hardware controller for external memory interfaces.
This patch adds suspend/resume support for GPMC driver.
It also preserves GPMC register configurations across device low-power states
in which GPMC hardware can be powered-off.
gpmc_suspend()/gpmc_resume() are called by default by core PM framework as part
of driver's runtime PM callbacks.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| b3f5525c55ce5cb67af06f04dbbf28358da23a2c |
|
12-Jun-2013 |
avinash philip <avinashphilip@ti.com> |
ARM: OMAP2+: gpmc: Converts GPMC driver to pm_runtime capable
Support for pm_runtime add to GPMC driver.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| f34f37160c2960a763ed05d1e13b2ea75a48d0fb |
|
31-May-2013 |
Gupta Pekon <pekon@ti.com> |
ARM: OMAP2+: gpmc: get number of useable GPMC chip-selects via DT
This patch enables usage of DT property 'gpmc,num-cs' as already documented in
Documentation/devicetree/bindings/bus/ti-gpmc.txt
Though GPMC hardware supports upto 8 chip-selects, but all chip-selects may
not be available for use because:
- chip-select pin may not be bonded out at SoC device boundary.
- chip-select pin-mux may conflict with other pins usage.
- board level constrains.
gpmc,num-cs allows user to configure maximum number of GPMC chip-selects
available for use on any given platform. This ensures:
- GPMC child nodes having chip-selects within allowed range are only probed.
- And un-used GPMC chip-selects remain blocked.(may be for security reasons).
Signed-off-by: Gupta, Pekon <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| f40739faba8e804cf46505869ab98ad7c4a88833 |
|
30-Apr-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: dts: OMAP2+: Simplify NAND support
Commit 8c8a777 (ARM: OMAP2+: Add function to read GPMC settings from
device-tree) added a device-tree property "gpmc,device-nand" to indicate
is the GPMC child device is NAND. This commit should have updated the
GPMC NAND documentation (Documentation/devicetree/bindings/mtd/gpmc-nand.txt)
to list the property "gpmc,device-nand" as a required property and also
updated the example. However, this property is redundant and not needed
because the GPMC child device node for NAND is called "nand". Therefore,
remove this property.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 496c8a0bbb726c2608b3b1318d231ab04a9a2ec3 |
|
19-Apr-2013 |
Mark Jackson <mpfj-list@newflow.co.uk> |
ARM: OMAP2+: Allow NAND transfer mode to be specified in DT
OMAP devices support various NAND transfer modes.
Currently all device-tree definitions will use the default "prefetch
polled" mode, so this patch enables the transfer mode to be specified
in the device-tree.
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| c48cd659892962f79bba4b4e0eedea8e5aa54c44 |
|
13-Mar-2013 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: OMAP: use consistent error checking
Consistently check errors using the usual method used in the kernel
for much of its history. For instance:
int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
{
int div;
div = gpmc_calc_divider(t->sync_clk);
if (div < 0)
return div;
static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
{
...
return gpmc_cs_set_timings(cs, t);
.....
ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t);
if (IS_ERR_VALUE(ret))
return ret;
So, gpmc_cs_set_timings() thinks any negative return value is an error,
but where we check that in higher levels, only a limited range are
errors...
There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really
appropriate, and that is in arch/arm/include/asm/syscall.h:
static inline long syscall_get_error(struct task_struct *task,
struct pt_regs *regs)
{
unsigned long error = regs->ARM_r0;
return IS_ERR_VALUE(error) ? error : 0;
}
because this function really does have to differentiate between error
return values and addresses which look like negative numbers (eg, from
mmap()).
So, here's a patch to remove them from OMAP, except for the above.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| b327b3627bb428eb7d98f25224532425a673d89e |
|
17-Apr-2013 |
Javier Martinez Canillas <javier.martinez@collabora.co.uk> |
ARM: OMAP2+: only WARN if a GPMC child probe function fail
If any of the GPMC child nodes fails, this shouldn't make the
whole gpmc_probe_dt() function to fail. It is better to just
WARN and allow other devices probe function to succeed.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| f2b09f67047aa5da60718f1a92e9b7f26b9266b4 |
|
17-Apr-2013 |
Javier Martinez Canillas <javier.martinez@collabora.co.uk> |
ARM: OMAP2+: only search for GPMC DT child nodes on probe
The GPMC DT probe function use for_each_node_by_name() to search
child device nodes of the GPMC controller. But this function does
not use the GPMC device node as the root of the search and instead
search across the complete Device Tree.
This means that any device node on the DT that is using any of the
GPMC child nodes names searched for will be returned even if they
are not connected to the GPMC, making the gpmc_probe_xxx_child()
function to fail.
Fix this by using the GPMC device node as the search root so the
search will be restricted to its children.
Reported-by: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| 5330dc161cb41e399e85d30e6908f1b93b956d1e |
|
14-Mar-2013 |
Javier Martinez Canillas <javier.martinez@collabora.co.uk> |
ARM: OMAP2+: Add GPMC DT support for Ethernet child nodes
Besides being used to interface with external memory devices,
the General-Purpose Memory Controller can be used to connect
Pseudo-SRAM devices such as ethernet controllers to OMAP2+
processors using the TI GPMC as a data bus.
This patch allows an ethernet chip to be defined as an GPMC
child device node.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| 3af91cf7016bdfce9a6a0343ab942302e98e8f3d |
|
14-Mar-2013 |
Javier Martinez Canillas <javier.martinez@collabora.co.uk> |
ARM: OMAP2+: rename gpmc_probe_nor_child() to gpmc_probe_generic_child()
The gpmc_probe_nor_child() function is used in the GPMC driver to
configure the GPMC for a NOR child device node.
But this function is quite generic and all the NOR specific configuration
is made by the driver of the actual NOR flash memory used.
Other Pseudo-SRAM devices such as ethernet controllers need a similar
setup so by making this function generic it can be used for those too.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| e8ffd6fdf28ac8404acebf2759315600bfdcb5f9 |
|
14-Mar-2013 |
Javier Martinez Canillas <javier.martinez@collabora.co.uk> |
ARM: OMAP2+: return -ENODEV if GPMC child device creation fails
gpmc_probe_nor_child() calls of_platform_device_create() to create a
platform device for the NOR child. If this function fails the value
of ret is returned to the caller but this value is zero since it was
assigned the return of a previous call to gpmc_cs_program_settings()
that had to succeed or otherwise gpmc_probe_nor_child() would have
returned before.
This means that if of_platform_device_create() fails, 0 will be returned
to the caller instead of an appropriate error code.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| 84b00f0e2878e6b7dbfa346d496d564aa55c6175 |
|
06-Mar-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Allow GPMC probe to complete even if CS mapping fails
When the GPMC driver is probed, we call gpmc_mem_init() to see which
chip-selects have already been configured and enabled by the boot-loader
and allocate space for them. If we fail to allocate space for one
chip-select, then we return failure from the probe and the GPMC driver
will not be available.
Rather than render the GPMC useless for all GPMC devices, if we fail to
allocate space for one chip-select print a warning and disable the
chip-select. This way other GPMC clients can still be used.
There is no downside to this approach, because all GPMC clients need to
request a chip-select before they can use the GPMC and on requesting a
chip-select, if memory has not already been reserved for the chip-select
then it will be.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| bf2343974e331d1627f6f904160dedc99a81c10d |
|
06-Mar-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Remove unnecesssary GPMC definitions and variable
With commit 21cc2bd (ARM: OMAP2+: Remove apollon board support) the
variable "boot_rom_space" is now not needed and the code surrounding
this variable can be cleaned up and simplified. Remove unnecessary
definitions and clean-up the comment as well.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| c71f8e9bef8a3e022537361505c09f8c357ffd18 |
|
06-Mar-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Detect incorrectly aligned GPMC base address
Each GPMC chip-select can be configured to map 16MB, 32MB, 64MB or 128MB
of address space. The physical base address where a chip-select starts
is also configurable and must be aligned on a boundary that is equal to
or greater than the size of the address space mapped bt the chip-select.
When enabling a GPMC chip-select, ensure that the base address is aligned
to the appropriate boundary.
Reported-by: Mark Jackson <mpfj-list@mimc.co.uk>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| cdd6928c589a2dcf084bd62fa5a2b7db1516187b |
|
08-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Add device-tree support for NOR flash
NOR flash is not currently supported when booting with device-tree
on OMAP2+ devices. Add support to detect and configure NOR devices
when booting with device-tree.
Add documentation for the TI GPMC NOR binding.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| d36b4cd46d23dd3c283c2e11de540e4cb875255d |
|
22-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Add additional GPMC timing parameters
Some of the GPMC timings parameters are currently missing from the GPMC
device-tree binding. Add these parameters to the binding documentation
as well as code to read them. Also add either "-ps" or "-ns" suffix to
the GPMC timing properties to indicate whether the timing is in
picoseconds or nanoseconds.
The existing code in gpmc_read_timings_dt() is checking the value of
of_property_read_u32() and only is successful storing the value read
in the gpmc_timings structure. Checking the return value in this case
is not necessary and we can simply read the value, if present, and
store directly in the gpmc_timings structure. Therefore, simplify the
code by removing these checks.
The comment in the gpmc_read_timings_dt() function, "only for OMAP3430"
is also incorrect as it is applicable to all OMAP3+ devices. So correct
this too.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| 8c8a77712756edcef9298444868537af42334fc0 |
|
20-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Add function to read GPMC settings from device-tree
Adds a function to read the various GPMC chip-select settings from
device-tree and store them in the gpmc_settings structure.
Update the GPMC device-tree binding documentation to describe these
options.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| 3a544354d5b6e97459ba9c15e9d89dac60023553 |
|
21-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Don't configure of chip-select options in gpmc_cs_configure()
With the addition of the gpmc_cs_program_settings(), we no longer need
or use gpmc_cs_configure() to configure some of the GPMC chip-select
options. So rename the function to gpmc_configure() and remove code that
modifies options in the CONFIG1 register.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| aa8d4767da2a2a29a628dc0dadb59a010f0ec18e |
|
21-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Add function for configuring GPMC settings
The GPMC has various different configuration options such as bus-width,
synchronous or asychronous mode selection, burst mode options etc.
Currently, there is no common function for configuring these options and
various devices set these options by either programming the GPMC CONFIG1
register directly or by calling gpmc_cs_configure() to set some of the
options.
Add a new function for configuring all of the GPMC options. Having a common
function for configuring this options will simplify code and ease the
migration to device-tree.
Also add a new capability flag to detect devices that support the
address-address-data multiplexing mode.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| c3be5b457ae1bb6dc93ef25bfa03e595969acbfc |
|
21-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Add structure for storing GPMC settings
The GPMC has various different configuration options such as bus-width,
synchronous or asychronous mode selection, burst mode options etc.
Currently, there is no central structure for storing all these options
when configuring the GPMC for a given device. Some of the options are
stored in the GPMC timing structure and some are directly programmed
into the GPMC configuration register. Add a new structure to store
these options and convert code to use this structure. Adding this
structure will allow us to create a common function for configuring
these options.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| 9f8331562aa1fd72e80dd6037c958cb3faf4cc38 |
|
20-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Add variable to store number of GPMC waitpins
The GPMC has wait-pin signals that can be assigned to a chip-select
to monitor the ready signal of an external device. Add a variable to
indicate the total number of wait-pins for a given device. This will
allow us to detect if the wait-pin being selected is valid or not.
When booting with device-tree read the number of wait-pins from the
device-tree blob. When device-tree is not used set the number of
wait-pins to 4 which is valid for OMAP2-5 devices. Newer devices
that have less wait-pins (such as AM335x) only support booting with
device-tree and so hard-coding the wait-pin number when not using
device-tree is fine.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
| f5d8edaf1d06e922a3c3d75c52ef5628ceec32c4 |
|
12-Feb-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: omap2: gpmc: Remove redundant chip select out of range check
This check is done before the call to gpmc_cs_reserved() and
gpmc_cs_set_reserved() and it's redundant to do it again in each
function. This simplifies the code a bit.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| ae9d908abc9e9d858a619faaf4d6647bdf3cb21f |
|
12-Feb-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: omap2: gpmc: Fix gpmc_cs_reserved() return value
Currently gpmc_cs_reserved() return value is somewhat inconsistent,
returning a negative value on an error condition, a positive value
if the chip select is reserved and zero if it's available.
Fix this by returning a boolean value as the function name suggests:
* true if the chip select is reserved,
* false if it's available
Suggested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| 7b095098ac5d28e865d179588d364a0cf8b0f81f |
|
12-Feb-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: omap2: gpmc: Remove unused gpmc_round_ns_to_ticks() function
This function is not used anywhere, so it's safe to remove it.
This means less code to maintain.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| 3fc089e7c5ff914b2660a6e91a8d032498c1e301 |
|
12-Feb-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: omap2: gpmc: Mark local scoped functions static
This patch marks a bunch of functions that are local
to gpmc.c file only as static.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| c9fb80942444e57c75fb26c27fd77961f9ba2570 |
|
05-Mar-2013 |
Mark Jackson <mpfj-list@mimc.co.uk> |
ARM: OMAP: Clear GPMC bits when applying new setting.
When setting the GPMC device type, make sure any previous
bits are cleared down, before applying the new setting.
For OMAP4+ devices MUXADDDATA is a 2-bit field (bits 9:8)
where as for OMAP2/3 devices it was only a one bit field
(bit 9). For OMAP2/3 devices bit 8 is reserved and the
OMAP documentation says to write a 0 to this bit. So
clearing bit 8 on OMAP2/3 devices should not be a problem.
Hence update the code to handle both bits 8 and 9 for all
devices.
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
[jon-hunter@ti.com: updated changelog]
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
| 71856843fb1d8ee455a4c1a60696c74afa4809e5 |
|
13-Mar-2013 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: OMAP: use consistent error checking
Consistently check errors using the usual method used in the kernel
for much of its history. For instance:
int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
{
int div;
div = gpmc_calc_divider(t->sync_clk);
if (div < 0)
return div;
static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
{
...
return gpmc_cs_set_timings(cs, t);
.....
ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t);
if (IS_ERR_VALUE(ret))
return ret;
So, gpmc_cs_set_timings() thinks any negative return value is an error,
but where we check that in higher levels, only a limited range are
errors...
There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really
appropriate, and that is in arch/arm/include/asm/syscall.h:
static inline long syscall_get_error(struct task_struct *task,
struct pt_regs *regs)
{
unsigned long error = regs->ARM_r0;
return IS_ERR_VALUE(error) ? error : 0;
}
because this function really does have to differentiate between error
return values and addresses which look like negative numbers (eg, from
mmap()).
So, here's a patch to remove them from OMAP, except for the above.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| 31d9adca82ce65e5c99d045b5fd917c702b6fce3 |
|
18-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Fix broken gpmc support
Commit 6797b4fe (ARM: OMAP2+: Prevent potential crash if GPMC probe fails)
added code to ensure that GPMC chip-selects could not be requested until the
device probe was successful. The chip-selects should have been
unreserved at the end of the probe function, but the code to unreserve
them appears to have ended up in the gpmc_calc_timings() function and
hence, this is causing problems requesting chip-selects. Fix this merge
error by unreserving the chip-selects at the end of the probe, but
before we call the gpmc child probe functions (for device-tree) which
request a chip-select.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Philip Avinash <avinashphilip@ti.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
[tony@atomide.com: updated description to add breaking commit id]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 75d3625e0e86b2d8d77b4e9c6f685fd7ea0d5a96 |
|
25-Jan-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: OMAP2+: gpmc: add DT bindings for OneNAND
This patch adds device tree bindings for OMAP OneNAND devices.
Tested on an OMAP3 3430 IGEPv2 board.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 6797b4fe0e554ce71f47038fd929c9ca929a9f3c |
|
01-Feb-2013 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Prevent potential crash if GPMC probe fails
If the GPMC probe fails, devices that use the GPMC (such as ethernet
chips, flash memories, etc) can still allocate a GPMC chip-select and
register the device. On the OMAP2420 H4 board, this was causing the
kernel to crash after the gpmc probe failed and the board attempted
to start networking. Prevent this by marking all the chip-selects as
reserved by default and only make them available for devices to request
if the GPMC probe succeeds.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| a16723709cff6d69567024c28d32d1344f08cecf |
|
25-Jan-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: OMAP2+: gpmc: Remove unneeded of_node_put()
for_each_node_by_name() automatically calls of_node_put() on each
node passed; so don't do it explicitly unless there's an error.
Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 21cc2bda8bdca8c1f5f6871d3eb0e9632612cf25 |
|
26-Dec-2012 |
Kyungmin Park <kyungmin.park@samsung.com> |
ARM: OMAP2+: Remove apollon board support
As apollon board doesn't used anymore, remove it.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[tony@atomide.com: dropped uncompress.h changes, it's gone]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| c1d1cd597fc77af3086470f8627d77f52f7f8b6c |
|
26-Jan-2013 |
Paul Walmsley <paul@pwsan.com> |
ARM: OMAP2+: omap_device: remove obsolete pm_lats and early_device code
Remove now-obsolete code from arch/arm/mach-omap2/omap_device.c. This
mostly consists of removing the first attempt at device PM latency
handling. This was never really used, has been replaced by the common
dev_pm_qos code, and needs to go away as part of the DT conversion.
Also, the early platform_device creation code has been removed, as it
appears to be unused.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
|
| 5857bd98dbd0080e6b27b51087cc9ec24f426e8b |
|
21-Jan-2013 |
Thierry Reding <thierry.reding@avionic-design.de> |
ARM: Convert to devm_ioremap_resource()
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| bc6b1e7b86f5d8e4a6fc1c0189e64bba4077efe0 |
|
14-Dec-2012 |
Daniel Mack <zonque@gmail.com> |
ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND
This patch adds basic DT bindings for OMAP GPMC.
The actual peripherals are instantiated from child nodes within the GPMC
node, and the only type of device that is currently supported is NAND.
Code was added to parse the generic GPMC timing parameters and some
documentation with examples on how to use them.
Successfully tested on an AM33xx board.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
[tony@atomide.com: updated to apply]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 2f98ca895198c1c6f5c9f418e1bbf84660d9ba4f |
|
14-Dec-2012 |
Daniel Mack <zonque@gmail.com> |
ARM: OMAP: gpmc: don't create devices from initcall on DT
On DT driven boards, the gpmc node will match the driver. Hence, there's
no need to do that unconditionally from the initcall.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| b76c8b19b082c3fc84725de0d3ba5ee1f571c0ae |
|
11-Jan-2013 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Use omap initcalls
This way the initcalls don't run on other SoCs on multiplatform
kernels. Otherwise we'll get something like this when booting
on vexpress:
omap_hwmod: _ensure_mpu_hwmod_is_setup: MPU initiator hwmod mpu not yet registered
...
WARNING: at arch/arm/mach-omap2/pm.c:82 _init_omap_device+0x74/0x94()
_init_omap_device: could not find omap_hwmod for mpu
...
omap-dma-engine omap-dma-engine: OMAP DMA engine driver
...
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 351a102dbf489d0e9c9b0883f76e2a94d895503d |
|
21-Dec-2012 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
ARM: drivers: remove __dev* attributes.
CONFIG_HOTPLUG is going away as an option. As a result, the __dev*
markings need to be removed.
This change removes the use of __devinit, __devexit_p, __devinitdata,
and __devexit from these drivers.
Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.
Cc: Bill Pemberton <wfp5p@virginia.edu>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| 246da26d37311cd1b1489575f305042dcdecfd50 |
|
02-Aug-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: generic timing calculation
Presently there are three peripherals that gets it timing
by runtime calculation. Those peripherals can work with
frequency scaling that affects gpmc clock. But timing
calculation for them are in different ways.
Here a generic runtime calculation method is proposed. Input
to this function were selected so that they represent timing
variables that are present in peripheral datasheets. Motive
behind this was to achieve DT bindings for the inputs as is.
Even though a few of the tusb6010 timings could not be made
directly related to timings normally found on peripherals,
expressions used were translated to those that could be
justified.
There are possibilities of improving the calculations, like
calculating timing for read & write operations in a more
similar way. Expressions derived here were tested for async
onenand on omap3evm (as vanilla Kernel does not have omap3evm
onenand support, local patch was used). Other peripherals,
tusb6010, smc91x calculations were validated by simulating
on omap3evm.
Regarding "we_on" for onenand async, it was found that even
for muxed address/data, it need not be greater than
"adv_wr_off", but rather could be derived from write setup
time for peripheral from start of access time, hence would
more be in line with peripheral timings. With this method
it was working fine. If it is required in some cases to
have "we_on" same as "wr_data_mux_bus" (i.e. greater than
"adv_wr_off"), another variable could be added to indicate
it. But such a requirement is not expected though.
It has been observed that "adv_rd_off" & "adv_wr_off" are
currently calculated by adding an offset over "oe_on" and
"we_on" respectively in the case of smc91x. But peripheral
datasheet does not specify so and so "adv_rd(wr)_off" has
been derived (to be specific, made ignorant of "oe_on" and
"we_on") observing datasheet rather than adding an offset.
Hence this generic routine is expected to work for smc91x
(91C96 RX51 board). This was verified on smsc911x (9220 on
OMAP3EVM) - a similar ethernet controller.
Timings are calculated in ps to prevent rounding errors and
converted to ns at final stage so that these values can be
directly fed to gpmc_cs_set_timings(). gpmc_cs_set_timings()
would be modified to take ps once all custom timing routines
are replaced by the generic routine, at the same time
generic timing routine would be modified to provide timings
in ps. struct gpmc_timings field types are upgraded from
u16 => u32 so that it can hold ps values.
Whole of this exercise is being done to achieve driver and
DT conversion. If timings could not be calculated in a
peripheral agnostic way, either gpmc driver would have to
be peripheral gnostic or a wrapper arrangement over gpmc
driver would be required.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
|
| 559d94b00c4dca74b060bae1feeb81cac38628a6 |
|
28-May-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: handle additional timings
Configure busturnaround, cycle2cycledelay, waitmonitoringtime,
clkactivationtime in gpmc_cs_set_timings(). This is done so
that boards can configure these parameters of gpmc in Kernel
instead of relying on bootloader. Also configure bool type
timings like extradelay.
This needed change to the existing users that were configuring
clk activation time and extra delay by directly writing to
registers. Thanks to Tony for making me aware of users of clk
activation and being kind enough to test the modified one.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
|
| e4c060db2c13f10de09101afc564763f9fd0019a |
|
05-Oct-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP: Split plat/cpu.h into local soc.h for mach-omap1 and mach-omap2
We want to remove plat/cpu.h. To do this, let's first split
it to private soc.h to mach-omap1 and mach-omap2. We have to
keep plat/cpu.h around until the remaining drivers are fixed,
so let's include the local soc.h in plat/cpu.h and for drivers
still including plat/cpu.h.
Once the drivers are fixed not to include plat/cpu.h, we
can remove the file.
This is needed for the ARM common zImage support.
[tony@atomide.com: updated to not print a warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 25c7d49ed48b4843da7dea56a81ae7f620211ee0 |
|
03-Oct-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP: Make omap_device local to mach-omap2
Let's make omap_device local to mach-omap2 for
ARM common zImage support.
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 3e6ece13d966a20a38ee7adfac452a47455ccd7a |
|
17-Oct-2012 |
Paul Walmsley <paul@pwsan.com> |
ARM: OMAP: move plat-omap/include/plat/sdrc.h into mach-omap2/sdrc.h
Remove arch/arm/plat-omap/include/plat/sdrc.h by folding its contents
into arch/arm/mach-omap2/sdrc.h. The objective is to assist Tony in
cleaning out arch/arm/plat-omap/, as his upstreams request.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
[tony@atomide.com: updated to remove rotate macros]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 8119024ef7363591fd958ec89ebfaee7c18209e3 |
|
17-Oct-2012 |
Jon Hunter <jon-hunter@ti.com> |
ARM: OMAP2+: Allow kernel to boot even if GPMC fails to reserve memory
Currently, if the GPMC driver fails to reserve memory when probed we will
call BUG() and the kernel will not boot. Instead of calling BUG(), return
an error from probe and allow kernel to boot.
Boot tested on AM335x beagle bone board and OMAP4430 Panda board.
V2 changes:
- Ensure that clock and memory resources are released on error.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 3ef5d0071cf6c8b9a00b559232bb700ad59999d7 |
|
05-Oct-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: localize gpmc header
Requirement of gpmc header outside of mach-omap2 has been
cutoff, move gpmc header file in plat-omap folder to local
mach-omap2 folder
Objective - common zImage participation of omap
Signed-off-by: Afzal Mohammed <afzal@ti.com>
|
| c46406a3f28e4bc2139415db385b91ae756009c1 |
|
29-Sep-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: remove exported nand functions
nand driver handles gpmc-nand block fully, hence no more
users for these exported nand functions, remove it.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
|
| 2fdf0c98969fdac8f7b191d4988e2e436717c857 |
|
04-Oct-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: nand register helper bch update
Update helper function that provides gpmc-nand register
details for nand driver with bch register information.
Using this nand driver can be made self sufficient to
handle remaining gpmc-nand operations by itself instead
of relying on gpmc exported nand functions.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
|
| bc3668ea046be9e841eecfab04bddfa759e765d6 |
|
28-Sep-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: nand: header cleanup
For common arm zImage existing nand header file
in platform specific location was moved to generic
platform data location, but it contained more than
platform data, remove it. New local header has been
created for exposing functions.
Also move gpmc-nand platform data to platform header
meant for nand from gpmc header file
Signed-off-by: Afzal Mohammed <afzal@ti.com>
|
| 1b47ca1a127925acd73381edb8d1d462014bff1f |
|
19-Aug-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: remove cs# in sync clk div calc
Divider value for a certain sync clk is determined solely
based on gpmc fclk. CS# does not have any role here, thus
remove presence of CS# in clock divider calculation API.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
|
| 61687c611a1c4f7906d2f6f591da18d0b092ad34 |
|
04-Oct-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: annotate exit sections properly
compiler complained,
`gpmc_remove' referenced in section `.data' of arch/arm/mach-omap2/built-in.o: defined in discarded section `.exit.text' of arch/arm/mach-omap2/built-in.o
Annotate gpmc_remove function and dependents with __devexit.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| da496873970c57c4b31e186d967933da0ffa0d7c |
|
24-Sep-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: minimal driver support
Create a minimal driver out of gpmc code. Responsibilities handled by
earlier gpmc initialization is now achieved in probe.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: fixed some checkpatch messages]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| 4be48fd53bb7620220be5677bd767cda6d9ece0f |
|
24-Sep-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: Adapt to HWMOD
Create API for platforms to adapt GPMC to HWMOD
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| 4d7cb45ee823541632a3d50f57031ce9fd60e13f |
|
22-Sep-2012 |
Rajendra Nayak <rnayak@ti.com> |
ARM: omap: clk: add clk_prepare and clk_unprepare
As part of Common Clk Framework (CCF) the clk_enable() operation
was split into a clk_prepare() which could sleep, and a clk_enable()
which should never sleep. Similarly the clk_disable() was
split into clk_disable() and clk_unprepare(). This was
needed to handle complex cases where in a clk gate/ungate
would require a slow and a fast part to be implemented.
None of the clocks below seem to be in the 'complex' clocks
category and are just simple clocks which are enabled/disabled
through simple register writes.
Most of the instances also seem to be called in non-atomic
context which means its safe to move all of those from
using a clk_enable() to clk_prepare_enable() and clk_disable() to
clk_disable_unprepare().
For some others, mainly the ones handled through the hwmod framework
there is a possibility that they get called in either an atomic
or a non-atomic context.
The way these get handled below work only as long as clk_prepare
is implemented as a no-op (which is the case today) since this gets
called very early at boot while most subsystems are unavailable.
Hence these are marked with a *HACK* comment, which says we need
to re-visit these once we start doing something meaningful with
clk_prepare/clk_unprepare like doing voltage scaling or something
that involves i2c.
This is in preparation of OMAP moving to CCF.
Based on initial changes from Mike Turquette.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| dbc04161048dd5e5c3c58546688a0cc0854051e9 |
|
31-Aug-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+
As the plat and mach includes need to disappear for single zImage work,
we need to remove plat/hardware.h.
Do this by splitting plat/hardware.h into omap1 and omap2+ specific files.
The old plat/hardware.h already has omap1 only defines, so it gets moved
to mach/hardware.h for omap1. For omap2+, we use the local soc.h
that for now just includes the related SoC headers to keep this patch more
readable.
Note that the local soc.h still includes plat/cpu.h that can be dealt
with in later patches. Let's also include plat/serial.h from common.h for
all the board-*.c files. This allows making the include files local later
on without patching these files again.
Note that only minimal changes are done in this patch for the
drivers/watchdog/omap_wdt.c driver to keep things compiling. Further
patches are needed to eventually remove cpu_is_omap usage in the drivers.
Also only minimal changes are done to sound/soc/omap/* to remove the
unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's
no need to include omap44xx.h.
While at it, also sort some of the includes in the standard way.
Cc: linux-watchdog@vger.kernel.org
Cc: alsa-devel@alsa-project.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Jarkko Nikula <jarkko.nikula@bitmer.com>
Cc: Liam Girdwood <lrg@ti.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 7d7e1eba7e92c2f9c76db80adc24836e7a114bfb |
|
28-Aug-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Prepare for irqs.h removal
As the interrupts should only be defined in the platform_data, and
eventually coming from device tree, there's no need to define them
in header files.
Let's remove the hardcoded references to irqs.h and fix up the includes
so we don't rely on headers included in irqs.h. Note that we're
defining OMAP_INTC_START as 0 to the interrupts. This will be needed
when we enable SPARSE_IRQ. For some drivers we need to add
#include <plat/cpu.h> for now until these drivers are fixed to
remove cpu_is_omapxxxx() usage.
While at it, sort som of the includes the standard way, and add
the trailing commas where they are missing in the related data
structures.
Note that for drivers/staging/tidspbridge we just define things
locally.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| a032d33b65c89a781c871fd1def595fa6a69b52a |
|
03-Aug-2012 |
Paul Walmsley <paul@pwsan.com> |
ARM: OMAP: clean up some smatch warnings, fix some printk(KERN_ERR ...
Resolve the following warnings from smatch:
arch/arm/mach-omap2/gpmc.c:282 gpmc_cs_set_timings() info: why not propagate 'div' from gpmc_cs_calc_divider() instead of -1?
arch/arm/mach-omap2/serial.c:328 omap_serial_init_port() error: 'pdev' dereferencing possible ERR_PTR()
arch/arm/mach-omap2/timer.c:213 omap2_gp_clockevent_init() Error invalid range 4096 to -1
arch/arm/mach-omap2/gpio.c:63 omap2_gpio_dev_init() warn: possible memory leak of 'pdata'
arch/arm/mach-omap2/omap_hwmod.c:1478 _assert_hardreset() warn: assigning -22 to unsigned variable 'ret'
arch/arm/mach-omap2/omap_hwmod.c:1487 _assert_hardreset() warn: 4294963201 is more than 255 (max '(ret)' can be) so this is always the same.
arch/arm/mach-omap2/omap_hwmod.c:1545 _read_hardreset() warn: assigning -22 to unsigned variable 'ret'
arch/arm/mach-omap2/omap_hwmod.c:1554 _read_hardreset() warn: 4294963201 is more than 255 (max '(ret)' can be) so this is always the same.
arch/arm/mach-omap2/dpll3xxx.c:629 omap3_clkoutx2_recalc() error: we previously assumed 'pclk' could be null (see line 627)
arch/arm/mach-omap2/board-n8x0.c:422 n8x0_mmc_late_init() Error invalid range 14 to 13
arch/arm/mach-omap1/leds-h2p2-debug.c:71 h2p2_dbg_leds_event() error: potentially derefencing uninitialized 'fpga'.
arch/arm/plat-omap/mux.c:79 omap_cfg_reg() Error invalid range 4096 to -1
Thanks to Tony Lindgren <tony@atomide.com> for pointing out that BUG()
can be disabled. The changes in the first version that removed the
subsequent return() after BUG() states have been dropped.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
|
| 6b6c32fc96d5a0ef1e8c5d9f1b24c3a07b878f6d |
|
30-Aug-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: Modify interrupt handling
Modify interrupt handling such that interrupts can be handled by GPMC
client drivers using standard interrupt APIs rather than requiring
the drivers to have knowledge about GPMC interrupt handling. Currently
only NAND related interrupts has been considered (which is the case
even without this change) as the only user of GPMC interrupt is NAND.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 52bd138d616409a45bbb32bd3536cbdadc524de6 |
|
30-Aug-2012 |
Afzal Mohammed <afzal@ti.com> |
ARM: OMAP2+: gpmc: update nand register helper
Provide helper function for updating NAND register details for
the necessary chip select. NAND drivers platform data can be
updated with this information so that NAND driver can handle
GPMC NAND operations by itself.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 1a5da219a4726dbddb189ac18bc246d51b04c972 |
|
19-Apr-2012 |
R Sricharan <r.sricharan@ti.com> |
ARM: OMAP5: gpmc: Update gpmc_init()
GPMC module is the same as in OMAP4.
Just update the base address and irq number.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
| 8d602cf50d3bba864bc1438f486b626df69c87b3 |
|
26-Apr-2012 |
Ivan Djelic <ivan.djelic@parrot.com> |
ARM: OMAP3: gpmc: add BCH ecc api and modes
This patch adds a simple BCH ecc computation api, similar to the
existing Hamming ecc api. It is intended to be used by the MTD layer.
It implements the following features:
- support 4-bit and 8-bit ecc computation
- do not protect user bytes in spare area, only data area is protected
- ecc for an erased NAND page (0xFFs) is also a sequence of 0xFFs
This last feature is obtained by adding a constant polynomial to
the hardware computed ecc. It allows to correct bitflips in blank pages
and is extremely useful to support filesystems such as UBIFS, which expect
erased pages to contain only 0xFFs.
This api has been tested on an OMAP3630 board.
Artem: The OMAP maintainer Tony Lindgren gave us his blessing for merging
this patch via the MTD tree.
Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 2c65e7440d56b3b285d1c95563b4dcce8e40dea3 |
|
09-May-2012 |
Yegor Yefremov <yegorslists@googlemail.com> |
GPMC: add ECC control definitions
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 355f8eee48134ba10ca81664ee90eeb240f5f928 |
|
13-Apr-2012 |
Paul Walmsley <paul@pwsan.com> |
ARM: OMAP2+: GPMC: resolve type-conversion warning from sparse
arch/arm/mach-omap2/gpmc.c passes a return value from ioremap() as the
fifth argument to request_irq() without casting it. This causes
sparse to generate the following warning:
arch/arm/mach-omap2/gpmc.c:759:63: warning: incorrect type in argument 5 (different address spaces)
arch/arm/mach-omap2/gpmc.c:759:63: expected void *dev
arch/arm/mach-omap2/gpmc.c:759:63: got void [noderef] <asn:2>*static [toplevel] [assigned] gpmc_base
It turns out that it's not necessary to pass this. gpmc_base is a
file-scoped static variable, the ISR is located in the same file ... and
the ISR doesn't even touch the passed-in variable. So, just replace it with
NULL in request_irq().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
| f611b020e74a41fb6460a5d5ca085d0c361b8b2f |
|
06-Mar-2012 |
Bernhard Walle <walle@corscience.de> |
ARM: OMAP2+: GPMC: Export gpmc_enable_hwecc and gpmc_calculate_ecc
To be able to compile kernel/drivers/mtd/nand/omap2.ko as module, that
two symbols need to be exported. Otherwise, I get following error
message
ERROR: "gpmc_calculate_ecc" [drivers/mtd/nand/omap2.ko] undefined!
ERROR: "gpmc_enable_hwecc" [drivers/mtd/nand/omap2.ko] undefined!
Signed-off-by: Bernhard Walle <walle@corscience.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 8ef5d844cc3a644ea6f7665932a4307e9fad01fa |
|
23-Jan-2012 |
Yegor Yefremov <yegor_sub1@visionsystems.de> |
ARM: OMAP2+: GPMC: fix device size setup
following statement can only change device size from 8-bit(0) to 16-bit(1),
but not vice versa:
regval |= GPMC_CONFIG1_DEVICESIZE(wval);
so as this field has 1 reserved bit, that could be used in future,
just clear both bits and then OR with the desired value
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 6845664a6a7d443f03883db59d10749d38d98b8e |
|
24-Mar-2011 |
Thomas Gleixner <tglx@linutronix.de> |
arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| 77aded2f523c6540f71b1f549373dd8046329a6b |
|
19-Mar-2011 |
Balaji T K <balajitk@ti.com> |
ARM: OMAP2+: Fix warnings for GPMC interrupt
Commit db97eb7dfe13f6c04f0a0e77c32e2691f563ab8b
(omap: gpmc: enable irq mode in gpmc) enabled interrupts for
GPMC (General Purpose Memory Controller). However, looks like
this patch only works on omap3. Fix the issues to avoid warnings
on omap4 during the boot.
GPMC: number of chip select is 8, CS0 to CS7. One less IRQ
allocated throws below warning at boot:
[ 0.429290] Trying to install type control for IRQ409
[ 0.429290] Trying to set irq flags for IRQ409
Resolve following warning messages in boot when irq chip is not set:
[ 0.429229] Trying to install interrupt handler for IRQ402
[ 0.429229] Trying to install interrupt handler for IRQ403
[ 0.429229] Trying to install interrupt handler for IRQ404
[ 0.429260] Trying to install interrupt handler for IRQ405
[ 0.429260] Trying to install interrupt handler for IRQ406
[ 0.429260] Trying to install interrupt handler for IRQ407
[ 0.429290] Trying to install interrupt handler for IRQ408
Resolve following warning in OMAP4:
[ 0.429290] gpmc: irq-20 could not claim: err -22
Signed-off-by: Balaji T K <balajitk@ti.com>
[tony@atomide.com: combined patches into one, updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 317379a975c07fe63bc4f86dabd668df96ff3df2 |
|
28-Jan-2011 |
Sukumar Ghorai <s-ghorai@ti.com> |
omap3: nand: configurable fifo threshold to gain the throughput
Configure the FIFO THREASHOLD value different for read and write to keep busy
both filling and to drain out of FIFO at reading and writing.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| db97eb7dfe13f6c04f0a0e77c32e2691f563ab8b |
|
28-Jan-2011 |
Sukumar Ghorai <s-ghorai@ti.com> |
omap: gpmc: enable irq mode in gpmc
add support the irq mode in GPMC.
gpmc_init() function move after omap_init_irq() as it has dependecy on irq.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| a3551f5b0c3ca7aaa053e554e3ee766983b5d713 |
|
09-Dec-2010 |
Adrian Hunter <adrian.hunter@nokia.com> |
OMAP2/3: GPMC: put sync_clk value in picoseconds instead of nanoseconds
The calculations done with sync_clk are anyway in picoseconds
and switching to picoseconds allows sync_clk values that are
not a whole number of nanoseconds - which is sometimes the
case.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 2c01946c6b9ebaa5a89710bc42ca224a7f52f227 |
|
09-Jul-2010 |
Sukumar Ghorai <s-ghorai@ti.com> |
omap3 nand: cleanup virtual address usages
This patch removes direct reference of gpmc address from generic nand platform code.
Nand platform code now uses wrapper functions which are implemented in gpmc module.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 948d38e799f0ab87cf8ed9113fcdaaee61acf321 |
|
09-Jul-2010 |
Sukumar Ghorai <s-ghorai@ti.com> |
omap3 gpmc: functionality enhancement
few functions added in gpmc module and to be used by other drivers like NAND.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| b2fa3b7c602258c1ab9d1cb66c30d72e9085c762 |
|
15-Feb-2010 |
Felipe Balbi <felipe.balbi@nokia.com> |
omap2/3/4: gpmc: kill compile warning
Get rid of the following warnings:
arch/arm/mach-omap2/gpmc.c:550:30: warning: non-ANSI
function declaration of function 'omap3_gpmc_save_context'
arch/arm/mach-omap2/gpmc.c:581:33: warning: non-ANSI
function declaration of function 'omap3_gpmc_restore_context'
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 8d08436d782d177747a0fac1e1455a44b932b7c6 |
|
29-Jan-2010 |
Kevin Hilman <khilman@deeprootsystems.com> |
OMAP2/3: GPMC: ensure valid clock pointer
Ensure valid clock pointer during GPMC init. Fixes compiler
warning about potential use of uninitialized variable.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 1daa8c1d75876f690ed8d3f13c806034af5984eb |
|
20-Jan-2010 |
Olof Johansson <olof@lixom.net> |
omap: Enable GPMC clock in gpmc_init
Don't assume that gpmc_l3_clk is on, enable it before touching
configuration registers.
Note that the current code assumes that this clock is always
enabled. We are already setting smart idle and L3 autogating
for GPMC clock in gpmc_init.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| d79b126724554122d9598834ef39fb0bb4fc132d |
|
08-Dec-2009 |
Rajendra Nayak <rnayak@ti.com> |
ARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api's
This patch adds dummy hooks for OMAP4 dpll api's. Removes
dummy hooks for clkdev api's and enables CLKDEV
for OMAP4.
Also comments clockdomain calls from within the clock
framework as its not supported yet for OMAP4.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
|
| e7fdc6052e78738ce90e0bdc051f2ddf60e41324 |
|
17-Nov-2009 |
Roel Kluin <roel.kluin@gmail.com> |
OMAP: cs should be positive in gpmc_cs_free()
The index `cs' is signed, test whether it is negative before we release
gpmc_cs_mem[cs].
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
|
| a2d3e7bad82dcfb67924849e2063238a1ae51b6e |
|
26-Sep-2008 |
Rajendra Nayak <rnayak@ti.com> |
OMAP3: PM: GPMC context save/restore
This patch adds the context save and restore functions for GPMC to
enable off-mode.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| 6d1352420901b0a74e6149a891ff4457f7199651 |
|
11-Nov-2009 |
Tobias Klauser <tklauser@distanz.ch> |
omap: Use resource_size
Use the resource_size function instead of manually calculating the
resource size. This reduces the chance of introducing off-by-one errors
and actually fixes one in mailbox.c.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| ce491cf85466c3377228c5a852ea627ec5136956 |
|
20-Oct-2009 |
Tony Lindgren <tony@atomide.com> |
omap: headers: Move remaining headers from include/mach to include/plat
Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using these headers to include using the right path.
This was done with:
#!/bin/bash
mach_dir_old="arch/arm/plat-omap/include/mach"
plat_dir_new="arch/arm/plat-omap/include/plat"
headers=$(cd $mach_dir_old && ls *.h)
omap_dirs="arch/arm/*omap*/ \
drivers/video/omap \
sound/soc/omap"
other_files="drivers/leds/leds-ams-delta.c \
drivers/mfd/menelaus.c \
drivers/mfd/twl4030-core.c \
drivers/mtd/nand/ams-delta.c"
for header in $headers; do
old="#include <mach\/$header"
new="#include <plat\/$header"
for dir in $omap_dirs; do
find $dir -type f -name \*.[chS] | \
xargs sed -i "s/$old/$new/"
done
find drivers/ -type f -name \*omap*.[chS] | \
xargs sed -i "s/$old/$new/"
for file in $other_files; do
sed -i "s/$old/$new/" $file
done
done
for header in $(ls $mach_dir_old/*.h); do
git mv $header $plat_dir_new/
done
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 59e9c5ae17179fe561103fbe0808fac5976ca1bd |
|
13-Jul-2009 |
vimal singh <vimalsingh@ti.com> |
mtd: omap: add support for nand prefetch-read and post-write
This patch adds prefetch support to access nand flash in mpu mode.
This patch also adds 8-bit nand support (omap_read/write_buf8).
Prefetch can be used for both 8- and 16-bit devices.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 44169075e6eaa87bab6a296209d8d0610879b394 |
|
28-May-2009 |
Santosh Shilimkar <santosh.shilimkar@ti.com> |
ARM: OMAP4: Add minimal support for omap4
This patch adds the support for OMAP4. The platform and machine specific
headers and sources updated for OMAP4430 SDP platform.
OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 85d7a070264272ceffec0c7ce0e9af1e37c62b6e |
|
04-Nov-2008 |
Sanjeev Premi <premi@ti.com> |
ARM: OMAP: Fix compiler warnings in gpmc.c
Fix these compiler warnings:
gpmc.c: In function 'gpmc_init':
gpmc.c:432: warning: 'return' with a value, in function returning void
gpmc.c:439: warning: 'return' with a value, in function returning void
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| cc26b3b01bc96a8b8c36671b0dc4898b2a152ea8 |
|
09-Oct-2008 |
Syed Mohammed, Khasim <khasim@ti.com> |
ARM: OMAP3: Add minimal omap3430 support
Add minimal omap3430 support based on earlier patches from
Syed Mohammed Khasim. Also merge in omap34xx SRAM support
from Karthik Dasu and use consistent naming for sram init
functions.
Also do following changes that make 34xx support usable:
- Remove unused sram.c functions for 34xx
- Rename IRQ_SIR_IRQ to INTCPS_SIR_IRQ and define it locally
in entry-macro.S
- Update mach-omap2/io.c to support 2420, 2430, and 34xx
- Also merge in 34xx GPMC changes to add fields wr_access and
wr_data_mux_bus from Adrian Hunter
- Remove memory initialization call omap2_init_memory() until
until more generic memory initialization patches are posted.
It's OK to rely on bootloader initialization until then.
Signed-off-by: Syed Mohammed, Khasim <khasim@ti.com>
Signed-off-by: Karthik Dasu<karthik-dp@ti.com>
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 646e3ed1a349fbccce651fed2d3987f0e7b0f0f4 |
|
06-Oct-2008 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2: Misc updates from linux-omap tree
Misc updates from linux-omap tree, mostly to update common
device initialization and add missing defines from linux-omap
tree. Also some changes to make room for adding 34xx in
following patches.
Note that the I2C resources are now set up in
arch/arm/plat-omap/i2c.c helper, and can be removed
from devices.c.
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| fd1dc87ded0f29c1ba1e8da62f03ab0d591d9bdd |
|
06-Oct-2008 |
Paul Walmsley <paul@pwsan.com> |
ARM: OMAP2: Fix sparse, checkpatch warnings fro GPMC code, use ioremap
Fix sparse, checkpatch warnings fro GPMC code.
Also change to use ioremap, and add missing function prototypes
to gpmc.h.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| fced80c735941fa518ac67c0b61bbe153fb8c050 |
|
06-Sep-2008 |
Russell King <rmk@dyn-67.arm.linux.org.uk> |
[ARM] Convert asm/io.h to linux/io.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| e8a91c953fca683ef9a9335fb00d6eb3e49ac1ee |
|
01-Sep-2008 |
Russell King <rmk@dyn-67.arm.linux.org.uk> |
[ARM] omap: Fix IO_ADDRESS() macros
OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies
for use with __raw_{read|write}* for accessing registers. Therefore,
these macros should return (void __iomem *) cookies, not integer values.
Doing this improves typechecking, and means we can find those places
where, eg, DMA controllers are incorrectly given virtual addresses to
DMA to, or physical addresses are thrown through a virtual to physical
address translation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| a09e64fbc0094e3073dbb09c3b4bfe4ab669244b |
|
05-Aug-2008 |
Russell King <rmk@dyn-67.arm.linux.org.uk> |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| 15e02a3b510aa4ef3d077ebc25eb3cd08b9af034 |
|
28-Apr-2008 |
Thara Gopinath <thara@ti.com> |
ARM: OMAP: Correcting the gpmc prefetch control register address
Correcting the GPMC_PREFETCH_CONTROL register address
Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 445959821f82846913fe09fee0573e0238415e8c |
|
18-Mar-2008 |
Paul Walmsley <paul@pwsan.com> |
ARM: OMAP2: Change 24xx to use new register access
This patch changes 24xx to use new register access, except for clock
framework. Clock framework register access will get updates in the
next patch.
Note that board-*.c files change GPMC (General Purpose Memory Controller)
access to use gpmc_cs_write_reg() instead of accessing the registers
directly. The code also uses gpmc_fck instead of it's parent clock
core_l3_ck for GPMC clock.
The H4 board file also adds h4_init_flash() function, which specify the
flash start and end addresses.
Also note that sleep.S removes some unused registers addresses.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 23300597948131d07eebeb1308c2ba0a1c147494 |
|
26-Jan-2007 |
Kai Svahn <kai.svahn@nokia.com> |
ARM: OMAP: Merge gpmc changes from N800 tree
This patch merges gpmc changes from N800 tree
and adds gpmc_get_fclk_period() to gpmc.h.
Signed-off-by: Kai Svahn <kai.svahn@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 72d0f1c3cdc7c456e1e357359ec6f566d0a5f264 |
|
07-Dec-2006 |
Syed Mohammed Khasim <x0khasim@ti.com> |
ARM: OMAP: Add minimal OMAP2430 support
This patch adds minimal OMAP2430 support to get the kernel booting on 2430SDP.
Signed-off-by: Syed Mohammed Khasim <x0khasim@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 1c22cc13256046162bb8e7b44763f6c39790af74 |
|
07-Dec-2006 |
David Brownell <dbrownell@users.sourceforge.net> |
ARM: OMAP: omap2/gpmc updates
GPMC updates:
- bugfixes: wrong/missing flags, omitted write, wrong test
- don't map memory segments starting at zero
- improve debug messaging
- export gpmc_get_fclk_perio]d() since it's needed to calc timings
- expect gpmc_cs_set_timings() caller to have initialized sync vs async
Note that this API is glitchy; likely the best fix would be to add
a member to "struct gpmc_timings" to hold GPMC_CONFIG1, since that
holds one key aspect of the GPMC timings (the gpmc_fclk divisor,
and sync vs. async == whether that divisor matters).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 87b247c41674e29f90bf4938799ab079951ccc6b |
|
11-May-2007 |
Thomas Gleixner <tglx@linutronix.de> |
[ARM] Spinlock initializer cleanup
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| c40fae9525e6c29c87a4f4361ff0a8d67a36e448 |
|
07-Dec-2006 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP: Sync core code with linux-omap
This patch syncs omap specific core code with linux-omap.
Most of the changes are needed to fix bitrot caused by
driver updates in linux-omap tree.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| 7f24516240c78760d0b19e6160dcab893ef81918 |
|
30-Dec-2006 |
Kyungmin Park <kyungmin.park@samsung.com> |
[PATCH] ARM: OMAP: fix GPMC compiler errors
Fix GPMC compiler errors on OMAP2
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
| f37e4580c409e290f6e482007c3573cdb4470bf9 |
|
24-Sep-2006 |
Imre Deak <imre.deak@solidboot.com> |
ARM: OMAP2: Dynamic allocator for GPMC memory space
Add support for assigning memory regions dynamically to peripherals
attached to GPMC interface. Platform specific code should now call
gpmc_cs_request to get a free GPMC memory region instead of using
a fixed address.
Make the H4 and Apollon platform initialization use the new API.
Signed-off-by: Imre Deak <imre.deak@solidboot.com>
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 2aab6468b7f88df60828f8e07cfdf8c87338ed8d |
|
27-Jun-2006 |
Juha Yrjola <juha.yrjola@solidboot.com> |
ARM: OMAP: Fix GPMC compilation when DEBUG is defined
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
| 4bbbc1adc2095c6504a556819dd8842135df300b |
|
27-Jun-2006 |
Juha Yrjola <juha.yrjola@solidboot.com> |
ARM: OMAP: Add GPMC support for OMAP2
Implement basic support for General-Purpose Memory Controller
as found on OMAP2420.
Dynamic CS address space allocation still needs to be done.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|