| 34ce57e9df7d14b52c7613bb2c190e411ca99186 |
|
22-Apr-2014 |
Guido Piasenza <gpiasenza@soft-in.com> |
sh-pfc: r8a7790: Fix definition of IPSR5
The extra entry in the table makes SCIFA0_B, and all
peripherals after it, fail.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| a16b81dcbfc5889c37dac5f8e836136e4740fc18 |
|
25-Mar-2014 |
Wolfram Sang <wsa@sang-engineering.com> |
pinctrl: pfc: r8a7790: add mux data for IIC(B) cores
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 35a493de0daf4955b6d15d488b3f8754d4637a04 |
|
25-Mar-2014 |
Wolfram Sang <wsa@sang-engineering.com> |
pinctrl: pfc: r8a7790: add i2c0 muxing
Add the muxing for the last missing i2c rcar core. Fix the sorting for
SH_PFC_PIN_NAMED while we are here.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 7033168da51e43ebba7870f089d275b4589df0c5 |
|
20-Feb-2014 |
Geert Uytterhoeven <geert+renesas@linux-m68k.org> |
pinctrl: sh-pfc: r8a7790: Add alternative MSIOF pin groups
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 202909cdf117743bdbf8abc0f817950c8955c8cf |
|
10-Feb-2014 |
Geert Uytterhoeven <geert+renesas@linux-m68k.org> |
pinctrl: sh-pfc: r8a7790: Add QSPI pin groups
A QSPI function set consists of 3 groups:
- qspi_ctrl (2 control wires)
- qspi_data2 (2 data wires, for Single/Dual SPI)
- qspi_data4 (4 data wires, for Quad SPI)
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 97e00faaf16a0642cac47937e26f437651a6b4a4 |
|
30-Jan-2014 |
Magnus Damm <damm@opensource.se> |
pinctrl: sh-pfc: r8a7790: Break out USB0 OVC/VBUS
Create a new group for the USB0 OVC/VBUS pin by itself. This
allows us to monitor PWEN as GPIO on the Lager board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 646ae3ef7eaa8199aea38d042954a6f911477528 |
|
23-Dec-2013 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
pinctrl: sh-pfc: r8a7790: Fix vsync value in the vin3_sync_mux array
This fixes a typo in the vin3_sync_mux array (s/VI2/VI3/).
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 44a45b55a72754e5c9ed047179fb269b530f45fc |
|
16-Dec-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays
The arrays are never modified, declare them as const.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 054d4259091a52be0d8ed3e3febf07cf263d294d |
|
10-Dec-2013 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
pinctrl: sh-pfc: pfc-r8a7790: Add VIN2 and VIN3 pins
There are VIN2 and VIN3 channels available on the R8A7790 SoC.
VIN2 supports 4/8/16/18/24-bit data, while VIN3 supports 8-bit.
Add both here, covering all possible data pin configurations.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
| 317a03a9cb925a5566b852dff85f6aaa4aff7e3e |
|
10-Dec-2013 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
pinctrl: sh-pfc: pfc-r8a7790: Add missing VIN1 pins
Both VIN0 and VIN1 channels support identical input interfaces.
Add missing VIN1 pins here and organize them in the same pin
groups as VIN0.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
| 64fe8abc7336e17f977bb38c4c261d24bfc5da17 |
|
10-Dec-2013 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
pinctrl: sh-pfc: pfc-r8a7790: Reorganize VIN0 data pins
This reorganizes and renames VIN0 data pin groups to cover
all possible configurations. There's total of eight data
pin groups, one per each configuration. Most of the groups
share the same pin/mux array. Only the 18-bit configuration
needs a separate pin/mux array since in combines interleaved
data pins.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
| a9e4c7bb466b34b19ca71ee7383ca23bd37a88c5 |
|
10-Dec-2013 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
pinctrl: sh-pfc: pfc-r8a7790: Group VIN0 HSYNC and VSYNC together
This groups VIN0 HSYNC and VSYNC pins together
since one cannot be used without another.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
| 7a57be873ae02aa956f453450a6903c6c8970896 |
|
10-Dec-2013 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
pinctrl: sh-pfc: pfc-r8a7790: Rename VIN pin groups
This drops superfluous "signal" word from the pin group names
and renames data_enable group to clkenb as in the h/w manual.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
| fcec5b2254c9b7c99d31afb4c390f301b7ad201e |
|
29-Nov-2013 |
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
sh-pfc: r8a7790: Add Audio pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 1d7b59a07740712b46dd0271abf7dd4013badf49 |
|
29-Nov-2013 |
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
sh-pfc: r8a7790: Add SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| f6aaaac9995084e496d4ff800d092a8c0cb12641 |
|
26-Sep-2013 |
Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
sh-pfc: r8a7790: add pin definitions for the I2C3 interface
There are four I2C interfaces on r8a7790, each of them can be connected to
one of the two respective I2C controllers, e.g. interface #0 can be
configured to work with I2C0 or with IIC0. Additionally some of those
interfaces can also use one of several pin sets. Interface #3 is special,
because it can be used in automatic mode for DVFS. It only has one set
of pins available and those pins cannot be used for anything else, they
also lack the GPIO function.
This patch uses the sh-pfc ability to configure pins, not associated with
GPIOs and adds support for I2C3 to the r8a7790 PFC set up.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 70702bfc13c4f96f2f05d4ce2eb110cd1735fef5 |
|
30-Aug-2013 |
Ulrich Hecht <ulrich.hecht@gmail.com> |
sh-pfc: r8a7790: Add I2C pin groups and functions
Adds pinmux for i2c bus 1 and 2. (Pins for 0 and 3 are not multiplexed.)
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 62783b714f21a08b20acfaab1c13679e887ab66c |
|
07-Aug-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Add DU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| f06812095e97af956c9fe8e0f82a5f6d5a26e5d2 |
|
07-Aug-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Rename DU1_DOTCLKIN to DU_DOTCLKIN1
Name the DU clock input 1 consistently with clock inputs 0 and 2.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| e120cacfaac24d4de31b181371daaef6a5773ee3 |
|
27-Jun-2013 |
Shinobu Uehara <shinobu.uehara.xc@renesas.com> |
sh-pfc: r8a7790: Add VIN pin groups and functions
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| dac896e221d42316059fb87eb4b7bee226e7da5d |
|
26-Jun-2013 |
Shinobu Uehara <shinobu.uehara.xc@renesas.com> |
sh-pfc: r8a7790: Add USB pin groups and functions
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 2dbe7f2cc91d679cdf6290b53f76f763802224cd |
|
24-Jul-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Add SCIF2 pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 4f47cc5e307db4b7219012878cb3f7a65eaa2f7c |
|
28-Jun-2013 |
Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com> |
sh-pfc: r8a7790: Add MSIOF pin groups and functions
Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 457c11d3e89f7c874d793b05a1c808f64d5f896f |
|
24-Jul-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Sort pin groups and functions alphabetically
Navigating through the source code is hard enough without having to
manually search for groups and functions.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 0a664e3d7978f54af72277a969245ac5e6418cd9 |
|
27-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Fix miscellaneous pinmux configuration tables mistakes
Fix erroneous entries in the pinmux configuration tables that affect
HSCIF, I2C, LBSC, SCIF, SSI and VIN operation.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 1ddb66cd6f337e3df5d51d0d3cdfd4507d9199c3 |
|
24-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Add SCIF2 pins configuration support
Update the pinmux configuration tables to support the SCIF2 pins
(TX2/TX2_B, RX2/RX2_B, SCK2).
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 05bcb07bc8dd5f185e9f6568866e7b1abdc60e82 |
|
24-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Add TCLK1 pin configuration support
Update the pinmux configuration tables to support the TCLK1 pin.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 5de880dd953ebb5b5d7852ce568608e828a7217e |
|
24-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Swap SCIFA2_RXD_B and HRX0_C configurations
The SCIFA2 RXD_B and HRX0_C pins have their pinmux configuration data
swapped, fix it.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 7d2b2854c665ff1bcbf0e740c30bf3fc4dc760bf |
|
24-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Remove deprecated SPV_EVEN pin
The pins have been removed from the datasheet, remove them here as well.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 14da999bd69c3bc1f4b1066306d5b268d3dcb57c |
|
24-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Remove deprecated RDS pins
The pins have been removed from the datasheet, remove them here as well.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| 9f2edd4113daefb5280fb5f06085fa2069ba0d2b |
|
22-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Remove deprecated Ethernet MII/RMII pins
The pins have been removed from the datasheet, remove them here as well.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| bcec7475d84c16c62d5310da96d1e34b9edc750a |
|
24-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Remove trailing '_TANS' string from RTS/CTS pins
The RTS/CTS pins have been renamed in the datasheet, rename them here as
well.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| c4721249dd15684d97af76b2b10073baff90959e |
|
22-May-2013 |
Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> |
sh-pfc: r8a7790: Rename I2C SDA/SCL pins
The I2C pins have been renamed in the datasheet, rename them here as
well.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
| e3d93b46718f12924128e5e70e2f3f992a95fa3b |
|
15-Jul-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: Consolidate PFC SoC data macros
Move macros defined in several SoC data files to a common location and
document them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
|
| 533743dccb517b0331eccc111e3c2b8f021559b5 |
|
15-Jul-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: Replace pinmux_enum_id typedef with u16
The typedef only conceals the real variable type without bringing any
additional value (see Documentation/CodingStyle, section 5.b). Moreover,
it polutes the pinmux namespace. Replace it with the integer type it
used to hide.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
|
| 0a6ea54ff0fd1ac72223af44939fcd7197537b14 |
|
11-Jun-2013 |
Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
pinctrl: r8a7790: fix two pin numbers
Fix two erroneous MMCIF1 pin numbers on r8a7790.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| fbd0ca3de1380cf1881e5e92fb8a97ad24171b4c |
|
31-May-2013 |
Ulrich Hecht <ulrich.hecht@gmail.com> |
sh-pfc: r8a7790: add HSCIF pin groups
Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| 066f0d6eb7c057e8e797a3d74b30764ed21952a2 |
|
17-May-2013 |
Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and four
SDHI interfaces on r8a73a4 (APE6).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| 7f35184b3d49a5420a9f6a6e0a1238bf602c6cb1 |
|
15-May-2013 |
Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
pinctrl: sh-pfc: fix a typo in pfc-r8a7790
Fix multiple occurrences of the "RESEVED" typo.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| 17babad61d7be374cbcaaeff22408912833cc316 |
|
15-May-2013 |
Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
pinctrl: sh-pfc: fix r8a7790 Function Select register tables
Fix several errors in Peripheral Function Select register tables for
r8a7790, which prevent various function pins from being correctly
configured.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| 682e05a14fb424160bd978bca4e6ba1dcc919f21 |
|
24-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| ed3e26049e238d066841f858509b764df37c3776 |
|
08-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Don't use GPIO enum entries
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7790.h header.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| 728d53f4a4a880d8961fb15e1b19c541c5fa1b0f |
|
08-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Remove function GPIOs
No r8a7770 platform use the function GPIOs API. Remove it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: fixed typo in changelog: r8a7779 -> r8a7770]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
| 30e4247e5b4d67d26668003f63f3b12d1263503f |
|
08-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Remove GPIO data
GPIOs are now handled by a separate driver, remove GPIO data from the
SoC information structure.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| 45c6c85d13e68875ebea60c3ee694750f3f132c0 |
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08-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Add SCIF, SCIFA and SCIFB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| 04e7ce78e096e37cf98c98b7787d5287559cf504 |
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08-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| 1627769b5f9c7f0d966e01655764f8e487515342 |
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08-Apr-2013 |
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
sh-pfc: r8a7790: Add ETH pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| 58c229e18b7754dfe505f3bc1688feb28c84f42a |
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08-Apr-2013 |
Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com> |
sh-pfc: Initial r8a7790 PFC support
Add initial PFC support for the r8a7790 SoC.
At this point only GPIO interface is supported, move to
newer interfaces planned as incremental changes.
Original authors is Koji Matsuoka-san, thanks for him
and his team for the heavy lifting. Adjusted by Magnus
to work together with updated code in drivers/pinctrl.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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