Searched defs:clk_name (Results 1 - 25 of 55) sorted by relevance

123

/drivers/clk/sunxi/
H A Dclk-a10-hosc.c31 const char *clk_name = node->name; local
45 of_property_read_string(node, "clock-output-names", &clk_name);
53 clk = clk_register_composite(NULL, clk_name,
64 clk_register_clkdev(clk, clk_name, NULL);
H A Dclk-sun8i-apb0.c25 const char *clk_name = np->name; local
40 of_property_read_string(np, "clock-output-names", &clk_name);
43 clk = clk_register_divider(&pdev->dev, clk_name, clk_parent, 0, reg,
H A Dclk-a20-gmac.c61 const char *clk_name = node->name; local
65 if (of_property_read_string(node, "clock-output-names", &clk_name))
96 clk = clk_register_composite(NULL, clk_name,
107 clk_register_clkdev(clk, clk_name, NULL);
H A Dclk-sun6i-apb0.c34 const char *clk_name = np->name; local
49 of_property_read_string(np, "clock-output-names", &clk_name);
51 clk = clk_register_divider_table(&pdev->dev, clk_name, clk_parent,
H A Dclk-sun6i-apb0-gates.c45 const char *clk_name; local
83 j, &clk_name);
85 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
89 clk_register_clkdev(clk_data->clks[i], clk_name, NULL);
/drivers/clk/ti/
H A Dfixed-factor.c37 const char *clk_name = node->name; local
57 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
H A Dapll.c42 const char *clk_name; local
50 clk_name = __clk_get_name(clk->hw.clk);
79 clk_name, (state) ? "locked" : "bypassed");
83 clk_name, (state) ? "locked" : "bypassed", i);
H A Dgate.c100 const char *clk_name = node->name; local
110 init.name = clk_name;
127 pr_err("%s must have 1 parent\n", clk_name);
/drivers/clk/rockchip/
H A Dclk-rockchip.c31 const char *clk_name; local
67 i, &clk_name);
70 if (!strcmp("reserved", clk_name))
81 clk_data->clks[i] = clk_register_gate(NULL, clk_name,
/drivers/clk/versatile/
H A Dclk-versatile.c64 const char *clk_name = np->name; local
84 clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base);
/drivers/clk/
H A Dclk-fixed-factor.c109 const char *clk_name = node->name; local
125 of_property_read_string(node, "clock-output-names", &clk_name);
128 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
H A Dclk-fixed-rate.c118 const char *clk_name = node->name; local
127 of_property_read_string(node, "clock-output-names", &clk_name);
129 clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
H A Dclk-gpio-gate.c150 const char *clk_name = data->node->name; local
167 __func__, clk_name);
174 clk = clk_register_gpio_gate(NULL, clk_name, parent_name, gpiod, 0);
H A Dclk-max-gen.c116 const char *clk_name; local
140 i, &clk_name))
141 init->name = clk_name;
H A Dclk-nspire.c73 const char *clk_name = node->name; local
85 of_property_read_string(node, "clock-output-names", &clk_name);
88 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
115 const char *clk_name = node->name; local
126 of_property_read_string(node, "clock-output-names", &clk_name);
128 clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT,
H A Dclk-ppc-corenet.c73 const char *clk_name; local
113 0, &clk_name);
119 init.name = clk_name;
128 pr_err("%s: could not register clock\n", clk_name);
151 const char *clk_name, *parent_name; local
201 i, &clk_name);
214 subclks[i] = clk_register_fixed_factor(NULL, clk_name,
218 subclks[i] = clk_register_fixed_factor(NULL, clk_name,
222 pr_err("%s: could not register clock\n", clk_name);
250 const char *clk_name local
[all...]
H A Dclk-palmas.c35 const char *clk_name; member in struct:palmas_clk32k_desc
139 .clk_name = "clk32kg",
155 .clk_name = "clk32kgaudio",
233 cinfo->clk_desc->clk_name, ret);
269 match_data->desc.clk_name, ret);
/drivers/clk/socfpga/
H A Dclk-periph.c58 const char *clk_name = node->name; local
88 of_property_read_string(node, "clock-output-names", &clk_name);
90 init.name = clk_name;
H A Dclk-pll.c90 const char *clk_name = node->name; local
108 of_property_read_string(node, "clock-output-names", &clk_name);
110 init.name = clk_name;
/drivers/media/usb/em28xx/
H A Dem28xx-camera.c330 char clk_name[V4L2_SUBDEV_NAME_SIZE]; local
336 v4l2_clk_name_i2c(clk_name, sizeof(clk_name),
338 v4l2->clk = v4l2_clk_register_fixed(clk_name, "mclk", -EINVAL);
/drivers/clk/samsung/
H A Dclk.c304 unsigned long _get_rate(const char *clk_name) argument
308 clk = __clk_lookup(clk_name);
310 pr_err("%s: could not find clock %s\n", __func__, clk_name);
/drivers/clk/keystone/
H A Dgate.c204 const char *clk_name = node->name; local
236 of_property_read_string(node, "clock-output-names", &clk_name);
243 clk = clk_register_psc(NULL, clk_name, parent_name, data, lock);
H A Dpll.c243 const char *clk_name = node->name; local
245 of_property_read_string(node, "clock-output-names", &clk_name);
268 clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,
273 pr_err("%s: error registering divider %s\n", __func__, clk_name);
287 const char *clk_name = node->name; local
289 of_property_read_string(node, "clock-output-names", &clk_name);
313 clk = clk_register_mux(NULL, clk_name, (const char **)&parents,
319 pr_err("%s: error registering mux %s\n", __func__, clk_name);
/drivers/clk/mvebu/
H A Dclk-corediv.c244 const char *clk_name; local
270 i, &clk_name);
273 init.name = clk_name;
H A Dclk-cpu.c37 const char *clk_name; member in struct:cpu_clk
200 char *clk_name = kzalloc(5, GFP_KERNEL); local
203 if (WARN_ON(!clk_name))
210 sprintf(clk_name, "cpu%d", cpu);
214 cpuclk[cpu].clk_name = clk_name;
221 init.name = cpuclk[cpu].clk_name;
240 kfree(cpuclk[ncpus].clk_name);

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