Searched defs:width (Results 1 - 25 of 458) sorted by relevance

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/drivers/media/usb/pwc/
H A Dpwc-misc.c41 int pwc_get_size(struct pwc_device *pdev, int width, int height) argument
51 if (pwc_image_sizes[i][0] <= width &&
/drivers/acpi/acpica/
H A Dhwvalid.c220 acpi_status acpi_hw_read_port(acpi_io_address address, u32 *value, u32 width) argument
234 status = acpi_hw_validate_io_request(address, width);
236 status = acpi_os_read_port(address, value, width);
249 for (i = 0, *value = 0; i < width; i += 8) {
284 acpi_status acpi_hw_write_port(acpi_io_address address, u32 value, u32 width) argument
297 status = acpi_hw_validate_io_request(address, width);
299 status = acpi_os_write_port(address, value, width);
312 for (i = 0; i < width; i += 8) {
H A Dhwxface.c89 * The ACPI spec requires the reset register width to be 8, so we
92 * BIOS code with bad register width values to go unnoticed.
131 u32 width; local
164 width = reg->bit_width;
165 if (width == 64) {
166 width = 32; /* Break into two 32-bit transfers */
170 address, &value_lo, width);
193 "Read: %8.8X%8.8X width %2d from %8.8X%8.8X (%s)\n",
217 u32 width; local
242 width
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/drivers/media/usb/gspca/
H A Djpeg.h121 0x02, 0x80, /* width */
138 int width,
145 jpeg_hdr[JPEG_HEIGHT_OFFSET + 2] = width >> 8;
146 jpeg_hdr[JPEG_HEIGHT_OFFSET + 3] = width;
136 jpeg_define(u8 *jpeg_hdr, int height, int width, int samplesY) argument
/drivers/clk/mxs/
H A Dclk.h33 void __iomem *reg, u8 shift, u8 width, u8 busy);
36 void __iomem *reg, u8 shift, u8 width, u8 busy);
52 u8 shift, u8 width, const char **parent_names, int num_parents)
56 reg, shift, width, 0, &mxs_lock);
51 mxs_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parent_names, int num_parents) argument
H A Dclk-div.c78 void __iomem *reg, u8 shift, u8 width, u8 busy)
99 div->divider.width = width;
77 mxs_clk_div(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, u8 busy) argument
H A Dclk-frac.c24 * @width: the divider bit width
34 u8 width; member in struct:clk_frac
47 div &= (1 << frac->width) - 1;
49 return (parent_rate >> frac->width) * div;
64 tmp <<= frac->width;
71 return (parent_rate >> frac->width) * div;
86 tmp <<= frac->width;
96 val &= ~(((1 << frac->width) - 1) << frac->shift);
112 void __iomem *reg, u8 shift, u8 width, u
111 mxs_clk_frac(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, u8 busy) argument
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/drivers/clk/socfpga/
H A Dclk.h30 #define div_mask(width) ((1 << (width)) - 1)
47 u32 width; /* only valid if div_reg != 0 */ member in struct:socfpga_gate_clk
57 u32 width; /* only valid if div_reg != 0 */ member in struct:socfpga_periph_clk
/drivers/mtd/maps/
H A Dscx200_docflash.c28 static unsigned width = 8; /* Default to 8 bits wide */ variable
35 module_param(width, int, 0);
36 MODULE_PARM_DESC(width, "Data width of the flash mapping (8/16)");
117 width = 16;
119 width = 8;
137 if (width != 8 && width != 16) {
138 printk(KERN_ERR NAME ": invalid bus width for flash mapping\n");
158 if (width
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/drivers/video/fbdev/
H A Datafb_mfb.c26 int height, int width)
31 if (sx == 0 && dx == 0 && width == next_line) {
32 src = (u8 *)info->screen_base + sy * (width >> 3);
33 dest = (u8 *)info->screen_base + dy * (width >> 3);
34 fb_memmove(dest, src, height * (width >> 3));
39 fb_memmove(dest, src, width >> 3);
47 fb_memmove(dest, src, width >> 3);
55 int sy, int sx, int height, int width)
62 if (sx == 0 && width == next_line) {
64 fb_memset255(dest, height * (width >>
24 atafb_mfb_copyarea(struct fb_info *info, u_long next_line, int sy, int sx, int dy, int dx, int height, int width) argument
54 atafb_mfb_fillrect(struct fb_info *info, u_long next_line, u32 color, int sy, int sx, int height, int width) argument
77 atafb_mfb_linefill(struct fb_info *info, u_long next_line, int dy, int dx, u32 width, const u8 *data, u32 bgcolor, u32 fgcolor) argument
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H A Dc2p_iplan2.c78 * @width: Image width (in pixels)
85 void c2p_iplan2(void *dst, const void *src, u32 dx, u32 dy, u32 width, argument
100 last = 0xffffU ^ (0xffffU >> ((dst_idx+width) % 16));
105 w = width;
106 if (dst_idx+width <= 16) {
110 memcpy(d.pixels+dst_idx, c, width);
111 c += width;
117 w = width;
127 w = width
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H A Dc2p_planar.c78 * @width: Image width (in pixels)
86 void c2p_planar(void *dst, const void *src, u32 dx, u32 dy, u32 width, argument
101 last = ~(0xffffffffU >> ((dst_idx+width) % 32));
105 w = width;
106 if (dst_idx+width <= 32) {
110 memcpy(d.pixels+dst_idx, c, width);
111 c += width;
118 w = width;
129 w = width
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/drivers/clk/
H A Dclk-mux.c124 u8 width = 0; local
127 width = fls(mask) - ffs(mask) + 1;
128 if (width + shift > 16) {
170 void __iomem *reg, u8 shift, u8 width,
173 u32 mask = BIT(width) - 1;
168 clk_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags, spinlock_t *lock) argument
/drivers/clk/hisilicon/
H A Dclk.h63 u8 width; member in struct:hisi_mux_clock
76 u8 width; member in struct:hisi_divider_clock
/drivers/gpu/drm/nouveau/
H A Dnv04_fbcon.c44 OUT_RING(chan, (region->height << 16) | region->width);
71 OUT_RING(chan, (rect->width << 16) | rect->height);
85 uint32_t width; local
96 width = ALIGN(image->width, 8);
97 dsize = ALIGN(width * image->height, 32) >> 5;
111 ((image->dx + image->width) & 0xffff));
114 OUT_RING(chan, (image->height << 16) | width);
115 OUT_RING(chan, (image->height << 16) | image->width);
H A Dnv50_fbcon.c54 OUT_RING(chan, rect->dx + rect->width);
81 OUT_RING(chan, region->width);
98 uint32_t width, dwords, *data = (uint32_t *)image->data; local
110 width = ALIGN(image->width, 32);
111 dwords = (width * image->height) >> 5;
123 OUT_RING(chan, image->width);
H A Dnvc0_fbcon.c54 OUT_RING (chan, rect->dx + rect->width);
81 OUT_RING (chan, region->width);
98 uint32_t width, dwords, *data = (uint32_t *)image->data; local
110 width = ALIGN(image->width, 32);
111 dwords = (width * image->height) >> 5;
123 OUT_RING (chan, image->width);
/drivers/gpu/drm/rcar-du/
H A Drcar_du_plane.h51 unsigned int width; member in struct:rcar_du_plane
/drivers/mmc/host/
H A Dsdhci-sirf.c32 static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width) argument
41 * 8bit-width enable bit of CSR SD hosts is 3,
44 if (width == MMC_BUS_WIDTH_8)
46 else if (width == MMC_BUS_WIDTH_4)
/drivers/video/console/
H A Dfbcon_rotate.h40 static inline void rotate_ud(const char *in, char *out, u32 width, u32 height) argument
43 int shift = (8 - (width % 8)) & 7;
45 width = (width + 7) & ~7;
48 for (j = 0; j < width - shift; j++) {
49 if (pattern_test_bit(j, i, width, in))
50 pattern_set_bit(width - (1 + j + shift),
52 width, out);
58 static inline void rotate_cw(const char *in, char *out, u32 width, u32 height) argument
60 int i, j, h = height, w = width;
76 rotate_ccw(const char *in, char *out, u32 width, u32 height) argument
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/drivers/video/fbdev/aty/
H A Dmach64_cursor.c147 unsigned int width = (cursor->image.width + 7) >> 3; local
157 offset = align - width*2;
160 for (j = 0; j < width; j++) {
182 if ((j + 1) * 8 > cursor->image.width) {
184 (1 << ((cursor->image.width & 7) * 2)) - 1);
/drivers/video/fbdev/core/
H A Dcfbfillrect.c281 unsigned long width = rect->width, height = rect->height; local
327 fill_op32(p, dst, dst_idx, pat, width*bpp, bits,
361 width*bpp, bits);
H A Dsyscopyarea.c318 u32 height = area->height, width = area->width; local
356 width*p->var.bits_per_pixel);
365 width*p->var.bits_per_pixel);
H A Dsysfillrect.c246 unsigned long width = rect->width, height = rect->height; local
291 fill_op32(p, dst, dst_idx, pat, width*bpp, bits);
325 width*bpp, bits);
/drivers/video/fbdev/savage/
H A Dsavagefb_accel.c38 if (!region->width || !region->height)
47 sx += region->width - 1;
48 dx += region->width - 1;
62 BCI_SEND(BCI_W_H(region->width, region->height));
70 if (!rect->width || !rect->height)
89 BCI_SEND( BCI_W_H(rect->width, rect->height) );
95 int fg, bg, size, i, width; local
99 if (!image->width || !image->height)
122 width = (image->width
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