Searched refs:reg (Results 26 - 50 of 2563) sorted by last modified time

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/drivers/video/fbdev/matrox/
H A Dmatroxfb_base.h512 } reg; member in struct:matrox_fb_info::__anon7150
718 extern void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg,
720 extern int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg);
H A Dmatroxfb_g450.c97 static int cve2_get_reg(struct matrox_fb_info *minfo, int reg) argument
103 matroxfb_DAC_out(minfo, 0x87, reg);
109 static void cve2_set_reg(struct matrox_fb_info *minfo, int reg, int val) argument
114 matroxfb_DAC_out(minfo, 0x87, reg);
119 static void cve2_set_reg10(struct matrox_fb_info *minfo, int reg, int val) argument
124 matroxfb_DAC_out(minfo, 0x87, reg);
126 matroxfb_DAC_out(minfo, 0x87, reg + 1);
H A Dmatroxfb_maven.c138 static int maven_get_reg(struct i2c_client* c, char reg) { argument
144 .len = sizeof(reg),
145 .buf = &reg
158 printk(KERN_INFO "ReadReg(%d) failed\n", reg);
162 static int maven_set_reg(struct i2c_client* c, int reg, int val) { argument
165 err = i2c_smbus_write_byte_data(c, reg, val);
167 printk(KERN_INFO "WriteReg(%d) failed\n", reg);
171 static int maven_set_reg_pair(struct i2c_client* c, int reg, int val) { argument
174 err = i2c_smbus_write_word_data(c, reg, val);
176 printk(KERN_INFO "WriteRegPair(%d) failed\n", reg);
[all...]
H A Dmatroxfb_misc.c92 void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg, int val) argument
95 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
99 int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg) argument
102 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
547 minfo->values.reg.mctlwtst = 0x00030101;
557 minfo->values.reg.mctlwtst = 0x00030101;
565 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
579 minfo->values.reg.mctlwtst = 0x00030101;
589 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
592 minfo->values.reg
[all...]
/drivers/video/fbdev/mb862xx/
H A Dmb862xx-i2c.c24 u32 reg; local
28 reg = inreg(i2c, GC_I2C_BCR);
29 if (reg & (I2C_INT | I2C_BER))
33 return (reg & I2C_BER) ? 0 : 1;
H A Dmb862xxfbdrv.c207 unsigned long reg, sc; local
217 reg = inreg(disp, GC_DCM1);
218 reg &= ~GC_DCM01_DEN;
219 outreg(disp, GC_DCM1, reg);
223 reg = inreg(disp, GC_DCM1);
224 reg &= ~(GC_DCM01_CKS | GC_DCM01_RESV | GC_DCM01_SC);
225 reg |= sc << 8;
226 outreg(disp, GC_DCM1, reg);
230 reg = pack(d_pitch(&fbi->var) / GC_L0M_L0W_UNIT,
233 reg |
277 unsigned long reg; local
290 unsigned long reg; local
426 unsigned long reg; local
553 unsigned int reg; local
793 unsigned long reg; local
871 unsigned long reg; local
930 unsigned long reg; local
1138 unsigned long reg; local
[all...]
/drivers/video/fbdev/mbx/
H A Dmbxfb.c38 #define write_reg(val, reg) do { writel((val), (reg)); } while(0)
44 #define write_reg_dly(val, reg) do { writel((val), reg); udelay(1000); } while(0)
607 struct mbxfb_reg reg; local
643 if (copy_from_user(&reg, (void __user*)arg,
647 if (reg.addr >= 0x10000) /* regs are from 0x3fe0000 to 0x3feffff */
650 tmp = readl(virt_base_2700 + reg.addr);
651 tmp &= ~reg.mask;
652 tmp |= reg
[all...]
/drivers/video/fbdev/msm/
H A Dmddi.c45 struct mddi_register_access reg; member in union:mddi_rev
50 uint32_t reg; member in struct:reg_read_info
144 printk(KERN_INFO "rev: got reg %x = %x without "
146 rev->reg.register_address,
147 rev->reg.register_data_list);
150 if (ri->reg != rev->reg.register_address) {
151 printk(KERN_INFO "rev: got reg %x = %x for "
154 rev->reg.register_address,
155 rev->reg
508 mddi_remote_write(struct msm_mddi_client_data *cdata, uint32_t val, uint32_t reg) argument
544 mddi_remote_read(struct msm_mddi_client_data *cdata, uint32_t reg) argument
[all...]
H A Dmdp.c442 mdp_writel(mdp, csc_table[n].val, csc_table[n].reg);
472 mdp_upscale_table[n].reg);
H A Dmdp_csc_table.h17 uint32_t reg; member in struct:__anon7159
H A Dmdp_ppp.c293 mdp_writel(mdp, table[i].val, table[i].reg);
H A Dmdp_scale_tables.h20 uint32_t reg; member in struct:mdp_table_entry
/drivers/video/fbdev/
H A Dmx3fb.c347 static u32 mx3fb_read_reg(struct mx3fb_data *mx3fb, unsigned long reg) argument
349 return __raw_readl(mx3fb->reg_base + reg);
352 static void mx3fb_write_reg(struct mx3fb_data *mx3fb, u32 value, unsigned long reg) argument
354 __raw_writel(value, mx3fb->reg_base + reg);
370 uint32_t reg; local
372 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
374 mx3fb_write_reg(mx3fb, reg | SDC_COM_BG_EN, SDC_COM_CONF);
381 uint32_t reg; local
383 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
385 mx3fb_write_reg(mx3fb, reg
519 uint32_t reg; local
639 uint32_t reg, sdc_conf; local
676 uint32_t reg; local
[all...]
H A Dmxsfb.c320 u32 reg; local
341 reg = readl(host->base + LCDC_VDCTRL4);
342 reg |= VDCTRL4_SYNC_SIGNALS_ON;
343 writel(reg, host->base + LCDC_VDCTRL4);
354 u32 reg; local
367 reg = readl(host->base + LCDC_CTRL);
368 if (!(reg & CTRL_RUN))
373 reg = readl(host->base + LCDC_VDCTRL4);
374 writel(reg & ~VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4);
H A Dneofb.c1270 int seqflags, lcdflags, dpmsflags, reg, tmpdisp; local
1355 reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1356 vga_wseq(NULL, 0x01, reg);
1357 reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1358 vga_wgfx(NULL, 0x20, reg);
1359 reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1360 vga_wgfx(NULL, 0x01, reg);
H A Dnuc900fb.c347 static inline void modify_gpio(void __iomem *reg, argument
351 tmp = readl(reg) & ~mask;
352 writel(tmp | set, reg);
/drivers/video/fbdev/omap/
H A Dhwa742.c140 static u8 hwa742_read_reg(u8 reg) argument
145 hwa742.extif->write_command(&reg, 1);
151 static void hwa742_write_reg(u8 reg, u8 data) argument
154 hwa742.extif->write_command(&reg, 1);
670 dev_dbg(hwa742.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
672 dev_dbg(hwa742.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
675 dev_dbg(hwa742.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
H A Dlcd_mipid.c131 int reg, const u8 *buf, int len)
133 mipid_transfer(md, reg, buf, len, NULL, 0);
137 int reg, u8 *buf, int len)
139 mipid_transfer(md, reg, NULL, 0, buf, len);
130 mipid_write(struct mipid_device *md, int reg, const u8 *buf, int len) argument
136 mipid_read(struct mipid_device *md, int reg, u8 *buf, int len) argument
H A Dsossi.c83 static inline u32 sossi_read_reg(int reg) argument
85 return readl(sossi.base + reg);
88 static inline u16 sossi_read_reg16(int reg) argument
90 return readw(sossi.base + reg);
93 static inline u8 sossi_read_reg8(int reg) argument
95 return readb(sossi.base + reg);
98 static inline void sossi_write_reg(int reg, u32 value) argument
100 writel(value, sossi.base + reg);
103 static inline void sossi_write_reg16(int reg, u16 value) argument
105 writew(value, sossi.base + reg);
108 sossi_write_reg8(int reg, u8 value) argument
113 sossi_set_bits(int reg, u32 bits) argument
118 sossi_clear_bits(int reg, u32 bits) argument
[all...]
/drivers/video/fbdev/omap2/displays-new/
H A Dpanel-lgphilips-lb035q02.c61 static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val) argument
78 buffer[2] = reg & 0x7f;
H A Dpanel-sony-acx565akm.c172 int reg, const u8 *buf, int len)
174 acx565akm_transfer(ddata, reg, buf, len, NULL, 0);
178 int reg, u8 *buf, int len)
180 acx565akm_transfer(ddata, reg, NULL, 0, buf, len);
171 acx565akm_write(struct panel_drv_data *ddata, int reg, const u8 *buf, int len) argument
177 acx565akm_read(struct panel_drv_data *ddata, int reg, u8 *buf, int len) argument
H A Dpanel-tpo-td028ttec1.c67 static int jbt_ret_write_0(struct panel_drv_data *ddata, u8 reg) argument
70 u16 tx_buf = JBT_COMMAND | reg;
81 static int jbt_reg_write_1(struct panel_drv_data *ddata, u8 reg, u8 data) argument
86 tx_buf[0] = JBT_COMMAND | reg;
97 static int jbt_reg_write_2(struct panel_drv_data *ddata, u8 reg, u16 data) argument
102 tx_buf[0] = JBT_COMMAND | reg;
/drivers/video/fbdev/omap2/dss/
H A Ddispc.c149 u16 reg; member in struct:dispc_reg_field
252 return REG_GET(rfld.reg, rfld.high, rfld.low);
258 REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);
261 #define SR(reg) \
262 dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
263 #define RR(reg) \
264 dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)])
585 static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u3 argument
590 dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value) argument
595 dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value) argument
600 dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value) argument
607 dispc_ovl_write_firhv2_reg(enum omap_plane plane, int reg, u32 value) argument
615 dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value) argument
[all...]
H A Ddss.c116 #define SR(reg) \
117 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
118 #define RR(reg) \
119 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
802 u32 reg; local
804 r = of_property_read_u32(port, "reg", &reg);
806 reg
[all...]
H A Dhdmi4.c118 struct regulator *reg; local
123 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
125 if (IS_ERR(reg)) {
126 if (PTR_ERR(reg) != -EPROBE_DEFER)
128 return PTR_ERR(reg);
131 if (regulator_can_change_voltage(reg)) {
132 r = regulator_set_voltage(reg, 1800000, 1800000);
134 devm_regulator_put(reg);
140 hdmi.vdda_hdmi_dac_reg = reg;

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