Searched defs:control (Results 26 - 50 of 317) sorted by relevance

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/drivers/thermal/
H A Ddove_thermal.c48 void __iomem *control; member in struct:dove_thermal_priv
57 reg = readl_relaxed(priv->control);
70 writel(reg, priv->control);
73 reg = readl_relaxed(priv->control);
74 writel((reg | PMU_TDC0_SW_RST_MASK), priv->control);
75 writel(reg, priv->control);
102 reg = readl_relaxed(priv->control + PMU_TEMP_DIOD_CTRL1_REG);
147 priv->control = devm_ioremap_resource(&pdev->dev, res);
148 if (IS_ERR(priv->control))
149 return PTR_ERR(priv->control);
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/drivers/usb/gadget/function/
H A Du_uac1.h36 * function which provides control and stream interfaces.
54 struct gaudio_snd_dev control; member in struct:gaudio
/drivers/acpi/
H A Dfan.c65 u64 control; member in struct:acpi_fan_fps
117 int control, i; local
134 control = obj->package.elements[1].integer.value;
136 if (control == fan->fps[i].control)
140 dev_dbg(&device->dev, "Invalid control value returned\n");
196 fan->fps[state].control);
/drivers/ata/
H A Dpata_rdc.c112 int control = 0; local
122 control |= 1; /* TIME1 enable */
124 control |= 2; /* IE enable */
127 control |= 4; /* PPE enable */
142 master_data |= (control << 4);
152 master_data |= control;
246 unsigned int control; local
253 control = 3; /* IORDY|TIME1 */
260 control |= 8; /* PIO cycles in PIO0 */
264 master_data |= control <<
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/drivers/atm/
H A Dsuni.c154 unsigned char control; local
167 control = dev->ops->phy_get(dev, reg) & ~(dle | lle);
172 control |= dle;
175 control |= lle;
180 dev->ops->phy_put(dev, control, reg);
/drivers/char/hw_random/
H A Dn2rng.h12 #define RNG_CTL_VCO 0x00000000000000c0ULL /* VCO rate control */
64 u64 control[HV_RNG_NUM_CONTROL]; member in struct:n2rng_unit
72 #define N2RNG_FLAG_CONTROL 0x00000002 /* Operating in control domain */
/drivers/edac/
H A Dhighbank_mc_edac.c159 u32 control; local
210 control = readl(drvdata->mc_err_base + HB_DDR_ECC_OPT) & 0x3;
211 if (!control || (control == 0x2)) {
/drivers/gpio/
H A Dgpio-janz-ttl.c44 __be16 control; member in struct:ttl_control_regs
113 iowrite16be(reg, &mod->regs->control);
114 iowrite16be(val, &mod->regs->control);
120 iowrite16be(0x0000, &mod->regs->control);
121 iowrite16be(0x0001, &mod->regs->control);
122 iowrite16be(0x0000, &mod->regs->control);
/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c283 /* pipesrc and dspsize control the size that is scaled from,
457 * Set the default value of cursor control and base register
464 u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR }; local
486 REG_WRITE(control[gma_crtc->pipe], 0);
/drivers/hid/
H A Dhid-roccat-koneplus.c43 struct roccat_common2_control control; local
50 control.command = ROCCAT_COMMON_COMMAND_CONTROL;
51 control.value = value;
52 control.request = request;
56 &control, sizeof(struct roccat_common2_control));
182 KONEPLUS_BIN_ATTRIBUTE_W(control, CONTROL);
/drivers/hv/
H A Dhv.c88 static u64 do_hypercall(u64 control, void *input, void *output) argument
98 "c" (control), "d" (input_address),
105 u32 control_hi = control >> 32;
106 u32 control_lo = control & 0xFFFFFFFF;
/drivers/hwmon/
H A Dpcf8591.c43 * The PCF8591 control byte
83 u8 control; member in struct:pcf8591_data
131 i2c_smbus_write_byte_data(client, data->control, data->aout);
142 return sprintf(buf, "%u\n", !(!(data->control & PCF8591_CONTROL_AOEF)));
160 data->control |= PCF8591_CONTROL_AOEF;
162 data->control &= ~PCF8591_CONTROL_AOEF;
163 i2c_smbus_write_byte(client, data->control);
261 data->control = PCF8591_INIT_CONTROL;
264 i2c_smbus_write_byte_data(client, data->control, data->aout);
281 if ((data->control
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/drivers/ide/
H A Dide-cd.h54 u8 control : 4; member in struct:atapi_toc_entry
56 u8 control : 4; member in struct:atapi_toc_entry
H A Dpiix.c27 * PIIX4 errata #15 - Must not read control registers
78 int control = 0; local
98 control |= 1; /* Programmable timing on */
100 control |= 4; /* Prefetch, post write */
102 control |= 2; /* IORDY */
108 master_data |= control << 4;
118 master_data |= control;
H A Dqd65xx.c357 u8 config, unit, control; local
392 control = inb(QD_CONTROL_PORT);
395 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
396 config, control, QD_ID3);
401 if (control & QD_CONTR_SEC_DISABLED)
405 (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
/drivers/iio/light/
H A Dtcs3414.c57 u8 control; member in struct:tcs3414_data
102 data->control | TCS3414_CONTROL_ADC_EN);
116 data->control);
252 data->control |= TCS3414_CONTROL_ADC_EN;
254 data->control);
266 data->control &= ~TCS3414_CONTROL_ADC_EN;
268 data->control);
315 data->control = TCS3414_CONTROL_POWER;
317 data->control);
351 data->control
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H A Dtcs3472.c57 u8 control; member in struct:tcs3472_data
136 *val = tcs3472_agains[data->control &
160 data->control &= ~TCS3472_CONTROL_AGAIN_MASK;
161 data->control |= i;
164 data->control);
289 data->control = ret;
/drivers/infiniband/hw/qib/
H A Dqib_pcie.c251 u16 control; local
265 pci_read_config_word(pdev, pos + PCI_MSI_FLAGS, &control);
267 pci_read_config_word(pdev, pos + ((control & PCI_MSI_FLAGS_64BIT)
354 u16 control; local
373 pci_read_config_word(dd->pcidev, pos + PCI_MSI_FLAGS, &control);
374 if (!(control & PCI_MSI_FLAGS_ENABLE)) {
375 control |= PCI_MSI_FLAGS_ENABLE;
377 control);
381 ((control & PCI_MSI_FLAGS_64BIT) ? 12 : 8),
/drivers/net/ethernet/altera/
H A Daltera_sgdmahw.h50 u8 control; member in struct:sgdma_descrip
98 u32 control; member in struct:sgdma_csr
/drivers/net/ethernet/amd/
H A Dau1000_eth.h71 * MAC control registers, memory mapped.
74 u32 control; member in struct:mac_reg
/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_hw.c118 u32 control; local
124 control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
125 AT_WRITE_REG(hw, REG_VPD_CAP, control);
129 control = AT_READ_REG(hw, REG_VPD_CAP);
130 if (control & VPD_CAP_VPD_FLAG)
133 if (control & VPD_CAP_VPD_FLAG) {
286 /* pcie flow control mode change */
292 * Configures PHY autoneg and flow control advertisement settings
319 * the 1000Base-T control Register (Address 9).
359 /* flow control fixe
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/drivers/net/irda/
H A Dact200l-sir.c143 u8 control[3]; local
156 control[0] = ACT200L_REG8 | (ACT200L_9600 & 0x0f);
157 control[1] = ACT200L_REG9 | ((ACT200L_9600 >> 4) & 0x0f);
160 control[0] = ACT200L_REG8 | (ACT200L_19200 & 0x0f);
161 control[1] = ACT200L_REG9 | ((ACT200L_19200 >> 4) & 0x0f);
164 control[0] = ACT200L_REG8 | (ACT200L_38400 & 0x0f);
165 control[1] = ACT200L_REG9 | ((ACT200L_38400 >> 4) & 0x0f);
168 control[0] = ACT200L_REG8 | (ACT200L_57600 & 0x0f);
169 control[1] = ACT200L_REG9 | ((ACT200L_57600 >> 4) & 0x0f);
172 control[
202 static const u8 control[9] = { local
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/drivers/net/usb/
H A Dqmi_wwan.c29 * control ("master") interface of a two-interface CDC Union
30 * resembling standard CDC ECM. The devices do not use the control
35 * Alternatively, control and data functions can be combined in a
52 struct usb_interface *control; member in struct:qmi_wwan_state
192 /* update status endpoint if separate control interface */
193 if (info->control != info->data)
194 dev->status = &info->control->cur_altsetting->endpoint[0];
206 subdriver = usb_cdc_wdm_register(info->control, &dev->status->desc,
209 dev_err(&info->control->dev, "subdriver registration failed\n");
240 info->control
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/drivers/net/wireless/ti/wl1251/
H A Dtx.c84 struct ieee80211_tx_info *control, u16 fc)
86 *(u16 *)&tx_hdr->control = 0;
88 tx_hdr->control.rate_policy = 0;
91 tx_hdr->control.packet_type = 0;
94 if ((control->flags & IEEE80211_TX_CTL_NO_ACK) ||
95 (control->flags & IEEE80211_TX_CTL_INJECTED)) {
96 tx_hdr->control.rate_policy = 1;
97 tx_hdr->control.ack_policy = 1;
100 tx_hdr->control.tx_complete = 1;
105 tx_hdr->control
83 wl1251_tx_control(struct tx_double_buffer_desc *tx_hdr, struct ieee80211_tx_info *control, u16 fc) argument
148 wl1251_tx_fill_hdr(struct wl1251 *wl, struct sk_buff *skb, struct ieee80211_tx_info *control) argument
182 wl1251_tx_send_packet(struct wl1251 *wl, struct sk_buff *skb, struct ieee80211_tx_info *control) argument
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H A Dtx.h145 struct tx_control control; member in struct:tx_double_buffer_desc

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