Searched refs:IE_SW1 (Results 1 - 4 of 4) sorted by relevance

/arch/mips/include/asm/sn/sn0/
H A Dip27.h52 #define SRB_NET IE_SW1 /* 0x0200 */
/arch/mips/kernel/
H A Dsmp-bmips.c279 set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE);
408 change_c0_status(IE_IRQ5 | IE_IRQ1 | IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV,
409 IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV);
/arch/mips/lantiq/
H A Dirq.c447 set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ0 | IE_IRQ1 |
/arch/mips/include/asm/
H A Dmipsregs.h274 #define IE_SW1 (_ULCAST_(1) << 9) macro

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