Searched refs:REG_ADDR (Results 1 - 25 of 130) sorted by relevance

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/arch/cris/arch-v32/mach-a3/
H A D	hw_settings.S	32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg) 34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency) 36 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing) 40 .dword REG_ADDR(gio, regi_gio, rw_pa_dout) 42 .dword REG_ADDR(gio, regi_gio, rw_pa_oe) 44 .dword REG_ADDR(gio, regi_gio, rw_pb_dout) 46 .dword REG_ADDR(gio, regi_gio, rw_pb_oe) 48 .dword REG_ADDR(gio, regi_gio, rw_pc_dout) 50 .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
H A D	io.c	20 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe), 21 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout), 22 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din), 26 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe), 27 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout), 28 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din), 32 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe), 33 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout), 34 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din),
H A D	dram_init.S	33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0 43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0 56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0 74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0 79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0 84 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
/arch/cris/arch-v32/mach-fs/
H A D	hw_settings.S	32 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg) 34 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg) 36 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg) 38 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg) 40 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0) 42 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1) 44 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing) 46 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd) 49 .dword REG_ADDR(gio, regi_gio, rw_pa_dout) 51 .dword REG_ADDR(gi [all...]
H A D	io.c	24 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe), 25 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout), 26 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din), 30 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe), 31 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout), 32 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din), 36 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe), 37 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout), 38 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din), 42 (unsigned long *)REG_ADDR(gi [all...]
H A D	dram_init.S	28 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0 31 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0 68 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0 72 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5 98 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
/arch/cris/include/arch-v32/mach-fs/mach/
H A D	startup.inc	11 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1 15 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1 19 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1 23 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1 27 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1 31 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1 35 move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1 39 move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1 43 move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1 47 move.d REG_ADDR(gi [all...]
/arch/cris/include/arch-v32/mach-a3/mach/
H A D	startup.inc	19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1 23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1 27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1 31 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1 35 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1 39 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1 43 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1 45 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1 52 move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1 60 move.d REG_ADDR(pinmu [all...]
/arch/cris/arch-v32/drivers/mach-a3/
H A D	nandflash.c	67 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, 71 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, 75 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, 146 read_cs = write_cs = (void __iomem *)REG_ADDR(pio, regi_pio,
/arch/cris/include/arch-v32/arch/hwregs/asm/
H A D	irq_nmi_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	strcop_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	config_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	cris_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	strmux_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/arch/hwregs/iop/asm/
H A D	iop_version_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	iop_fifo_in_extra_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	iop_fifo_out_extra_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	iop_scrc_in_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	iop_scrc_out_defs_asm.h	43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/
H A D	iop_version_defs_asm.h	40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A D	iop_sap_in_defs_asm.h	40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/arch/hwregs/iop/
H A D	iop_version_defs.h	74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
/arch/cris/include/arch-v32/arch/hwregs/
H A D	irq_nmi_defs.h	74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
H A D	strcop_defs.h	74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
H A D	iop_version_defs.h	71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro

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Indexes created Tue Oct 13 23:51:09 CEST 2015