Searched refs:CACHE_MODE_0_GEN7 (Results 1 - 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_pm.c5673 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
5676 I915_WRITE(CACHE_MODE_0_GEN7,
5728 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
5772 I915_WRITE(CACHE_MODE_0_GEN7,
5824 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
H A Di915_reg.h1392 #define CACHE_MODE_0_GEN7 0x7000 /* IVB+ */ macro

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