Searched refs:DISPLAY_PLANE_ENABLE (Results 1 - 11 of 11) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dmdfld_intel_display.c253 if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
255 temp & ~DISPLAY_PLANE_ENABLE);
365 if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
367 temp | DISPLAY_PLANE_ENABLE);
393 temp & ~DISPLAY_PLANE_ENABLE);
409 temp | DISPLAY_PLANE_ENABLE);
441 if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
443 temp & ~DISPLAY_PLANE_ENABLE);
863 dev_priv->dspcntr[pipe] |= DISPLAY_PLANE_ENABLE;
H A Doaktrail_crtc.c277 if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
279 temp | DISPLAY_PLANE_ENABLE,
303 if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
305 temp & ~DISPLAY_PLANE_ENABLE, i);
H A Doaktrail_hdmi.c358 dspcntr |= DISPLAY_PLANE_ENABLE;
392 if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
393 REG_WRITE(DSPBCNTR, temp & ~DISPLAY_PLANE_ENABLE);
460 if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
461 REG_WRITE(DSPBCNTR, temp | DISPLAY_PLANE_ENABLE);
H A Dgma_display.c244 if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
246 temp | DISPLAY_PLANE_ENABLE);
291 if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
293 temp & ~DISPLAY_PLANE_ENABLE);
H A Dmdfld_device.c357 PSB_WVDC32(pipe->cntr & ~DISPLAY_PLANE_ENABLE, map->cntr);
H A Dpsb_intel_display.c211 dspcntr |= DISPLAY_PLANE_ENABLE;
H A Dcdv_intel_display.c733 dspcntr |= DISPLAY_PLANE_ENABLE;
H A Dpsb_intel_reg.h636 #define DISPLAY_PLANE_ENABLE (1 << 31) macro
/drivers/gpu/drm/i915/
H A Dintel_sprite.c136 I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
138 I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
H A Dintel_display.c1289 cur_state = !!(val & DISPLAY_PLANE_ENABLE);
1310 WARN(val & DISPLAY_PLANE_ENABLE,
1322 WARN((val & DISPLAY_PLANE_ENABLE) && pipe == cur_pipe,
2476 dspcntr |= DISPLAY_PLANE_ENABLE;
2599 dspcntr |= DISPLAY_PLANE_ENABLE;
13104 if ((val & DISPLAY_PLANE_ENABLE) &&
13309 return I915_READ(DSPCNTR(crtc->plane)) & DISPLAY_PLANE_ENABLE;
H A Di915_reg.h4212 #define DISPLAY_PLANE_ENABLE (1<<31) macro

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