Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 - 4 of 4) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c183 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7;
H A Dpsb_intel_reg.h251 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
/drivers/gpu/drm/i915/
H A Di915_reg.h1710 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
H A Dintel_display.c5931 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7;
7184 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7;
8889 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ?

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