Searched refs:DPLL_VGA_MODE_DIS (Results 1 - 6 of 6) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c236 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS);
673 dpll = DPLL_VGA_MODE_DIS;
736 REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE);
H A Doaktrail_crtc.c531 dpll |= DPLL_VGA_MODE_DIS;
H A Dpsb_intel_display.c162 dpll = DPLL_VGA_MODE_DIS;
H A Dpsb_intel_reg.h244 #define DPLL_VGA_MODE_DIS (1 << 28) macro
/drivers/gpu/drm/i915/
H A Dintel_display.c5700 DPLL_VGA_MODE_DIS | DPLL_INTEGRATED_CLOCK_VLV;
5806 DPLL_REFA_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS |
5900 dpll = DPLL_VGA_MODE_DIS;
5972 dpll = DPLL_VGA_MODE_DIS;
H A Di915_reg.h1703 #define DPLL_VGA_MODE_DIS (1 << 28) macro

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