Searched refs:GMBUS4 (Results 1 - 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_i2c.c67 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0);
223 I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en);
237 I915_WRITE(GMBUS4 + reg_offset, 0);
258 I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN);
263 I915_WRITE(GMBUS4 + reg_offset, 0);
H A Di915_reg.h1669 #define GMBUS4 0x5110 /* interrupt mask (Pineview+) */ macro
/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h83 #define GMBUS4 0x5110 /* interrupt mask (Pineview+) */ macro

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