Searched refs:MI_FLUSH_DW (Results 1 - 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c65 * few specific commands on each ring (e.g. PIPE_CONTROL and MI_FLUSH_DW).
234 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
277 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
314 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
H A Dintel_ringbuffer.c929 intel_ring_emit(signaller, (MI_FLUSH_DW + 1) |
2136 cmd = MI_FLUSH_DW;
2239 cmd = MI_FLUSH_DW;
H A Dintel_lrc.c1107 cmd = MI_FLUSH_DW + 1;
H A Di915_reg.h298 #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */ macro

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