Searched refs:PIPE_CONTROL_STATE_CACHE_INVALIDATE (Results 1 - 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_ringbuffer.c270 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
364 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
434 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
H A Dintel_lrc.c1153 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
H A Di915_reg.h385 #define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1<<2) macro

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