Searched refs:disp_clk (Results 1 - 7 of 7) sorted by relevance

/drivers/gpu/drm/tilcdc/
H A Dtilcdc_drv.h52 struct clk *disp_clk; /* display dpll */ member in struct:tilcdc_drm_private
H A Dtilcdc_crtc.c550 ret = clk_set_rate(priv->disp_clk, crtc->mode.clock * 1000 * 2);
561 DBG("fck=%lu, dpll_disp_ck=%lu", clk_get_rate(priv->clk), clk_get_rate(priv->disp_clk));
H A Dtilcdc_drv.c202 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
317 clk_put(priv->disp_clk);
/drivers/gpu/drm/radeon/
H A Dsi.c1970 u32 disp_clk; /* display clock in kHz */ member in struct:dce6_wm_params
2051 fixed20_12 disp_clk, sclk, bandwidth; local
2056 disp_clk.full = dfixed_const(wm->disp_clk);
2057 disp_clk.full = dfixed_div(disp_clk, a);
2059 b1.full = dfixed_mul(a, disp_clk);
2120 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
2146 c.full = dfixed_const(wm->disp_clk);
2155 c.full = dfixed_const(wm->disp_clk);
[all...]
H A Devergreen.c1955 u32 disp_clk; /* display clock in kHz */ member in struct:evergreen_wm_params
2031 fixed20_12 disp_clk, bandwidth; local
2035 disp_clk.full = dfixed_const(wm->disp_clk);
2036 disp_clk.full = dfixed_div(disp_clk, a);
2041 bandwidth.full = dfixed_mul(a, disp_clk);
2088 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
2113 c.full = dfixed_const(wm->disp_clk);
2213 wm_high.disp_clk
[all...]
H A Dcik.c8974 u32 disp_clk; /* display clock in kHz */ member in struct:dce8_wm_params
9086 fixed20_12 disp_clk, bandwidth; local
9090 disp_clk.full = dfixed_const(wm->disp_clk);
9091 disp_clk.full = dfixed_div(disp_clk, a);
9093 b.full = dfixed_mul(a, disp_clk);
9172 u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
9198 c.full = dfixed_const(wm->disp_clk);
9207 c.full = dfixed_const(wm->disp_clk);
[all...]
H A Dtrinity_dpm.c1570 u64 disp_clk = rdev->clock.default_dispclk / 100; local
1576 dc_cac_value = (u32)((14213 * disp_clk * disp_clk * (u64)num_active_displays) >>

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