/drivers/staging/comedi/drivers/ |
H A D | addi_watchdog.h | 6 void addi_watchdog_reset(unsigned long iobase); 7 int addi_watchdog_init(struct comedi_subdevice *, unsigned long iobase);
|
H A D | pcl724.c | 84 unsigned long iobase) 86 int movport = I8255_SIZE * (iobase >> 12); 88 iobase &= 0x0fff; 90 outb(port + movport, iobase); 92 outb(data, iobase + 1); 95 return inb(iobase + 1); 103 unsigned long iobase; local 130 iobase = dev->iobase + (i * 0x1000); 132 iobase); 82 pcl724_8255mapped_io(struct comedi_device *dev, int dir, int port, int data, unsigned long iobase) argument [all...] |
H A D | addi_apci_3501.c | 94 status = inl(dev->iobase + APCI3501_AO_CTRL_STATUS_REG); 118 outl(0, dev->iobase + APCI3501_AO_CTRL_STATUS_REG); 122 dev->iobase + APCI3501_AO_CTRL_STATUS_REG); 141 dev->iobase + APCI3501_AO_DATA_REG); 156 data[1] = inl(dev->iobase + APCI3501_DI_REG) & 0x3; 166 s->state = inl(dev->iobase + APCI3501_DO_REG); 169 outl(s->state, dev->iobase + APCI3501_DO_REG); 176 static void apci3501_eeprom_wait(unsigned long iobase) argument 181 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); 185 static unsigned short apci3501_eeprom_readw(unsigned long iobase, argument 227 unsigned long iobase = devpriv->i_IobaseAmcc; local [all...] |
H A D | dt2817.c | 74 outb(oe, dev->iobase + DT2817_CR); 84 unsigned long iobase = dev->iobase + DT2817_DATA; local 91 outb(s->state & 0xff, iobase + 0); 93 outb((s->state >> 8) & 0xff, iobase + 1); 95 outb((s->state >> 16) & 0xff, iobase + 2); 97 outb((s->state >> 24) & 0xff, iobase + 3); 100 val = inb(iobase + 0); 101 val |= (inb(iobase + 1) << 8); 102 val |= (inb(iobase [all...] |
H A D | ni_atmio16d.c | 148 outw(0xFFC2, dev->iobase + AM9513A_COM_REG); 149 outw(0xFF02, dev->iobase + AM9513A_COM_REG); 150 outw(0x4, dev->iobase + AM9513A_DATA_REG); 151 outw(0xFF0A, dev->iobase + AM9513A_COM_REG); 152 outw(0x3, dev->iobase + AM9513A_DATA_REG); 153 outw(0xFF42, dev->iobase + AM9513A_COM_REG); 154 outw(0xFF42, dev->iobase + AM9513A_COM_REG); 156 outw(0xFFC4, dev->iobase + AM9513A_COM_REG); 157 outw(0xFF03, dev->iobase + AM9513A_COM_REG); 158 outw(0x4, dev->iobase [all...] |
H A D | addi_watchdog.c | 39 unsigned long iobase; member in struct:addi_watchdog_private 65 outl(reload, spriv->iobase + ADDI_WDOG_RELOAD_REG); 78 outl(spriv->wdog_ctrl, spriv->iobase + ADDI_WDOG_CTRL_REG); 92 data[i] = inl(spriv->iobase + ADDI_WDOG_STATUS_REG); 113 spriv->iobase + ADDI_WDOG_CTRL_REG); 119 void addi_watchdog_reset(unsigned long iobase) argument 121 outl(0x0, iobase + ADDI_WDOG_CTRL_REG); 122 outl(0x0, iobase + ADDI_WDOG_RELOAD_REG); 126 int addi_watchdog_init(struct comedi_subdevice *s, unsigned long iobase) argument 134 spriv->iobase [all...] |
H A D | multiq3.c | 85 status = inw(dev->iobase + MULTIQ3_STATUS); 102 dev->iobase + MULTIQ3_CONTROL); 110 outw(0, dev->iobase + MULTIQ3_AD_CS); 117 hi = inb(dev->iobase + MULTIQ3_AD_CS); 118 lo = inb(dev->iobase + MULTIQ3_AD_CS); 137 dev->iobase + MULTIQ3_CONTROL); 138 outw(val, dev->iobase + MULTIQ3_DAC_DATA); 139 outw(MULTIQ3_CONTROL_MUST, dev->iobase + MULTIQ3_CONTROL); 150 data[1] = inw(dev->iobase + MULTIQ3_DIGIN_PORT); 161 outw(s->state, dev->iobase [all...] |
H A D | ni_daq_700.c | 97 outb(s->state & 0xff, dev->iobase + DIO_W); 101 val |= inb(dev->iobase + DIO_R) << 8; 132 status = inb(dev->iobase + STA_R2); 135 status = inb(dev->iobase + STA_R1); 161 outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3); 165 outb(chan | 0x80, dev->iobase + CMD_R1); 172 outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */ 173 outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */ 174 outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */ 176 inw(dev->iobase 210 unsigned long iobase = dev->iobase; local [all...] |
H A D | dmm32at.c | 167 status = inb(dev->iobase + context); 190 outb(DMM32AT_FIFORESET, dev->iobase + DMM32AT_FIFOCNTRL); 193 outb(chan, dev->iobase + DMM32AT_AILOW); 194 outb(chan, dev->iobase + DMM32AT_AIHIGH); 196 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AICONF); 206 outb(0xff, dev->iobase + DMM32AT_CONV); 215 lsb = inb(dev->iobase + DMM32AT_AILSB); 216 msb = inb(dev->iobase + DMM32AT_AIMSB); 388 outb(0, dev->iobase + DMM32AT_CNTRDIO); 391 outb(DMM32AT_CLKACC, dev->iobase [all...] |
H A D | adv_pci_dio.c | 426 data[1] |= inb(dev->iobase + d->addr + i) << (8 * i); 444 data[1] |= inw(dev->iobase + d->addr + 2 * i) << (16 * i); 460 dev->iobase + d->addr + i); 479 dev->iobase + d->addr + 2 * i); 502 data[0] = i8254_read(dev->iobase + d->addr + (SIZE_8254 * chip), 523 i8254_write(dev->iobase + d->addr + (SIZE_8254 * chip), 538 unsigned long iobase; local 545 iobase = dev->iobase + d->addr + (SIZE_8254 * chip); 549 ret = i8254_set_mode(iobase, [all...] |
/drivers/staging/comedi/drivers/addi-data/ |
H A D | hwdrv_apci3501.c | 32 outl(0x0, dev->iobase + APCI3501_TIMER_CTRL_REG); 36 outl(0x02, dev->iobase + APCI3501_TIMER_CTRL_REG); 39 outl(0x0, dev->iobase + APCI3501_TIMER_CTRL_REG); 42 outl(data[2], dev->iobase + APCI3501_TIMER_TIMEBASE_REG); 43 outl(data[3], dev->iobase + APCI3501_TIMER_RELOAD_REG); 46 ul_Command1 = inl(dev->iobase + APCI3501_TIMER_CTRL_REG) | 0xFFF819E0UL; 47 outl(ul_Command1, dev->iobase + APCI3501_TIMER_CTRL_REG); 52 ul_Command1 = inl(dev->iobase + APCI3501_TIMER_CTRL_REG); 54 outl(ul_Command1, dev->iobase + APCI3501_TIMER_CTRL_REG); 58 outl(0x02, dev->iobase [all...] |
H A D | addi_eeprom.c | 48 static void addi_eeprom_clk_93c76(unsigned long iobase, unsigned int val) argument 50 outl(val & ~EE93C76_CLK_BIT, iobase); 53 outl(val | EE93C76_CLK_BIT, iobase); 57 static unsigned int addi_eeprom_cmd_93c76(unsigned long iobase, argument 65 outl(val, iobase); 76 outl(val, iobase); 79 addi_eeprom_clk_93c76(iobase, val); 84 static unsigned short addi_eeprom_readw_93c76(unsigned long iobase, argument 94 cmd = addi_eeprom_cmd_93c76(iobase, cmd, EE93C76_CMD_LEN); 98 addi_eeprom_clk_93c76(iobase, cm 115 addi_eeprom_nvram_wait(unsigned long iobase) argument 124 addi_eeprom_readw_nvram(unsigned long iobase, unsigned short addr) argument 160 addi_eeprom_readw(unsigned long iobase, char *type, unsigned short addr) argument 178 addi_eeprom_read_di_info(struct comedi_device *dev, unsigned long iobase, unsigned short addr) argument 199 addi_eeprom_read_do_info(struct comedi_device *dev, unsigned long iobase, unsigned short addr) argument 215 addi_eeprom_read_timer_info(struct comedi_device *dev, unsigned long iobase, unsigned short addr) argument 258 addi_eeprom_read_ao_info(struct comedi_device *dev, unsigned long iobase, unsigned short addr) argument 277 addi_eeprom_read_ai_info(struct comedi_device *dev, unsigned long iobase, unsigned short addr) argument 315 addi_eeprom_read_info(struct comedi_device *dev, unsigned long iobase) argument [all...] |
H A D | hwdrv_apci1500.c | 169 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER); 171 outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER); 283 devpriv->iobase + 287 devpriv->iobase + 291 devpriv->iobase + 294 devpriv->iobase + 300 devpriv->iobase + 303 devpriv->iobase + 308 devpriv->iobase + 311 devpriv->iobase [all...] |
H A D | hwdrv_apci035.c | 136 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 138 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 141 outl(data[3], devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 4); 144 outl(data[2], devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 8); 174 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 176 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 184 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 186 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 194 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); 196 ui_Command = inl(devpriv->iobase [all...] |
/drivers/net/irda/ |
H A D | w83977af_ir.c | 34 * bank = inb( iobase+BSR); 38 * outb( bank, iobase+BSR); 86 static int w83977af_open(int i, unsigned int iobase, unsigned int irq, 89 static int w83977af_probe(int iobase, int irq, int dma); 94 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size); 95 static void w83977af_dma_write(struct w83977af_ir *self, int iobase); 148 * Function w83977af_open (iobase, irq) 153 static int w83977af_open(int i, unsigned int iobase, unsigned int irq, argument 163 if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) { 164 IRDA_DEBUG(0, "%s(), can't get iobase o 269 int iobase; local 308 w83977af_probe(int iobase, int irq, int dma) argument 410 int iobase; local 492 int iobase; local 559 w83977af_dma_write(struct w83977af_ir *self, int iobase) argument 592 w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size) argument 636 int iobase; local 687 int iobase; local 762 int iobase; local 881 int iobase; local 908 int iobase; local 977 int iobase; local 1057 int iobase; local 1094 int iobase; local 1125 int iobase; local 1189 int iobase; local [all...] |
H A D | via-ircc.c | 83 int iobase); 92 static int via_ircc_read_dongle_id(int iobase); 98 static void via_ircc_change_dongle_speed(int iobase, int speed, 100 static int RxTimerHandler(struct via_ircc_cb *self, int iobase); 102 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase); 103 static int upload_rxdata(struct via_ircc_cb *self, int iobase); 281 * Function via_ircc_open(pdev, iobase, irq) 319 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n", 423 int iobase; local 427 iobase 458 int iobase = self->io.fir_base; local 511 via_ircc_read_dongle_id(int iobase) argument 522 via_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) argument 669 u16 iobase; local 770 u16 iobase; local 841 u16 iobase; local 886 via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase) argument 926 int iobase; local 994 int iobase; local 1036 via_ircc_dma_receive_complete(struct via_ircc_cb *self, int iobase) argument 1157 upload_rxdata(struct via_ircc_cb *self, int iobase) argument 1207 RxTimerHandler(struct via_ircc_cb *self, int iobase) argument 1299 int iobase; local 1402 int iobase; local 1442 int iobase; local 1465 int iobase; local 1533 int iobase; local [all...] |
H A D | via-ircc.h | 285 static void SetMaxRxPacketSize(__u16 iobase, __u16 size) argument 291 WriteReg(iobase, I_CF_L_2, low); 292 WriteReg(iobase, I_CF_H_2, high); 300 static void SetFIFO(__u16 iobase, __u16 value) argument 304 WriteRegBit(iobase, 0x11, 0, 0); 305 WriteRegBit(iobase, 0x11, 7, 1); 308 WriteRegBit(iobase, 0x11, 0, 0); 309 WriteRegBit(iobase, 0x11, 7, 0); 312 WriteRegBit(iobase, 0x11, 0, 1); 313 WriteRegBit(iobase, 411 SetTimer(__u16 iobase, __u8 count) argument 419 SetSendByte(__u16 iobase, __u32 count) argument 431 ResetChip(__u16 iobase, __u8 type) argument 439 CkRxRecv(__u16 iobase, struct via_ircc_cb *self) argument 460 RxCurCount(__u16 iobase, struct via_ircc_cb * self) argument 476 GetRecvByte(__u16 iobase, struct via_ircc_cb * self) argument 533 ActClk(__u16 iobase, __u8 value) argument 543 ClkTx(__u16 iobase, __u8 Clk, __u8 Tx) argument 565 Wr_Byte(__u16 iobase, __u8 data) argument 591 Rd_Indx(__u16 iobase, __u8 addr, __u8 index) argument 655 Wr_Indx(__u16 iobase, __u8 addr, __u8 index, __u8 data) argument 676 ResetDongle(__u16 iobase) argument 690 SetSITmode(__u16 iobase) argument 702 SI_SetMode(__u16 iobase, int mode) argument 717 InitCard(__u16 iobase) argument 725 CommonInit(__u16 iobase) argument 750 SetBaudRate(__u16 iobase, __u32 rate) argument 787 SetPulseWidth(__u16 iobase, __u8 width) argument 801 SetSendPreambleCount(__u16 iobase, __u8 count) argument [all...] |
H A D | nsc-ircc.c | 33 * bank = inb(iobase+BSR); 37 * outb(bank, iobase+BSR); 176 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase); 181 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size); 182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase); 185 static int nsc_ircc_read_dongle_id (int iobase); 186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id); 352 * Function nsc_ircc_open (iobase, irq) 411 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", 517 int iobase; local 985 int iobase = info->fir_base; local 1042 nsc_ircc_read_dongle_id(int iobase) argument 1081 nsc_ircc_init_dongle_interface(int iobase, int dongle_id) argument 1166 nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) argument 1255 int iobase; local 1364 int iobase; local 1437 int iobase; local 1569 nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase) argument 1607 nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) argument 1650 int iobase; local 1715 int iobase; local 1765 nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) argument 1928 int iobase; local 2011 nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, int eir) argument 2097 int iobase; local 2138 int iobase; local 2173 int iobase; local 2236 int iobase; local 2327 int iobase = self->io.fir_base; local [all...] |
H A D | ali-ircc.c | 120 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len); 138 static void SIR2FIR(int iobase); 139 static void FIR2SIR(int iobase); 331 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__, 422 int iobase; local 428 iobase = self->io.fir_base; 559 int iobase = info->fir_base; local 569 SIR2FIR(iobase); 572 outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM 575 switch_bank(iobase, BANK 702 int iobase, tmp; local 823 int iobase; local 877 int iobase; local 912 int iobase; local 968 int iobase; local 1017 int iobase; local 1055 int iobase; local 1123 int iobase,dongle_id; local 1306 ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) argument 1339 int iobase; local 1444 int iobase; local 1588 int iobase, tmp; local 1658 int iobase; local 1730 int iobase, tmp; local 1791 int len, i, iobase, val; local 1967 int iobase; local 2093 int iobase; local 2165 int iobase = self->io.fir_base; /* or sir_base */ local 2211 SIR2FIR(int iobase) argument 2234 FIR2SIR(int iobase) argument [all...] |
/drivers/char/tpm/ |
H A D | tpm_atmel.c | 50 status = ioread8(chip->vendor.iobase + 1); 55 *buf++ = ioread8(chip->vendor.iobase); 66 status = ioread8(chip->vendor.iobase + 1); 77 status = ioread8(chip->vendor.iobase + 1); 82 *buf++ = ioread8(chip->vendor.iobase); 86 status = ioread8(chip->vendor.iobase + 1); 103 iowrite8(buf[i], chip->vendor.iobase); 111 iowrite8(ATML_STATUS_ABORT, chip->vendor.iobase + 1); 116 return ioread8(chip->vendor.iobase + 1); 144 atmel_put_base_addr(chip->vendor.iobase); 163 void __iomem *iobase = NULL; local [all...] |
/drivers/bluetooth/ |
H A D | bluecard_cs.c | 161 unsigned int iobase = info->p_dev->resource[0]->start; local 168 outb(0x08 | 0x20, iobase + 0x30); 171 outb(0x00, iobase + 0x30); 178 unsigned int iobase = info->p_dev->resource[0]->start; local 185 outb(0x10 | 0x40, iobase + 0x30); 191 outb(0x08 | 0x20, iobase + 0x30); 203 static int bluecard_write(unsigned int iobase, unsigned int offset, __u8 *buf, int len) argument 209 outb_p(actual, iobase + offset); 212 outb_p(buf[i], iobase + offset + i + 1); 234 unsigned int iobase local 343 bluecard_read(unsigned int iobase, unsigned int offset, __u8 *buf, int size) argument 374 unsigned int iobase; local 502 unsigned int iobase; local 635 unsigned int iobase = info->p_dev->resource[0]->start; local 655 unsigned int iobase = info->p_dev->resource[0]->start; local 697 unsigned int iobase = info->p_dev->resource[0]->start; local 812 unsigned int iobase = info->p_dev->resource[0]->start; local [all...] |
H A D | bt3c_cs.c | 116 static inline void bt3c_address(unsigned int iobase, unsigned short addr) argument 118 outb(addr & 0xff, iobase + ADDR_L); 119 outb((addr >> 8) & 0xff, iobase + ADDR_H); 123 static inline void bt3c_put(unsigned int iobase, unsigned short value) argument 125 outb(value & 0xff, iobase + DATA_L); 126 outb((value >> 8) & 0xff, iobase + DATA_H); 130 static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value) argument 132 bt3c_address(iobase, addr); 133 bt3c_put(iobase, value); 137 static inline unsigned short bt3c_get(unsigned int iobase) argument 147 bt3c_read(unsigned int iobase, unsigned short addr) argument 159 bt3c_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) argument 189 unsigned int iobase = info->p_dev->resource[0]->start; local 219 unsigned int iobase; local 340 unsigned int iobase; local 460 unsigned int iobase, size, addr, fcs, tmp; local [all...] |
H A D | btuart_cs.c | 111 static int btuart_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) argument 116 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) 122 outb(buf[actual], iobase + UART_TX); 143 unsigned int iobase = info->p_dev->resource[0]->start; local 157 len = btuart_write(iobase, 16, skb->data, skb->len); 177 unsigned int iobase; local 185 iobase = info->p_dev->resource[0]->start; 203 bt_cb(info->rx_skb)->pkt_type = inb(iobase + UART_RX); 236 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX); 283 } while (inb(iobase 290 unsigned int iobase; local 347 unsigned int iobase; local 462 unsigned int iobase = info->p_dev->resource[0]->start; local 528 unsigned int iobase = info->p_dev->resource[0]->start; local [all...] |
/drivers/i2c/busses/ |
H A D | i2c-xlr.c | 68 u32 __iomem *iobase; member in struct:xlr_i2c_private 81 xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset); 82 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr); 83 xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, XLR_I2C_CFG_ADDR); 84 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1); 92 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, 95 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos]); 96 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, 102 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); 108 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOU [all...] |
/drivers/mtd/maps/ |
H A D | l440gx.c | 21 static u32 iobase; variable 22 #define IOBASE iobase 90 /* Setup the pm iobase resource 97 pm_iobase->name = "pm iobase"; 103 pci_read_config_dword(pm_dev, 0x40, &iobase); 104 iobase &= ~1; 105 pm_iobase->start += iobase & ~1; 106 pm_iobase->end += iobase & ~1; 114 printk(KERN_WARNING "Could not allocate pm iobase resource\n"); 119 /* Set the iobase */ [all...] |