137dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj/* 237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * TI DaVinci DM365 EVM board support 337dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * 437dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * Copyright (C) 2009 Texas Instruments Incorporated 537dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * 637dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * This program is free software; you can redistribute it and/or 737dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * modify it under the terms of the GNU General Public License as 837dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * published by the Free Software Foundation version 2. 937dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * 1037dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * This program is distributed "as is" WITHOUT ANY WARRANTY of any 1137dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * kind, whether express or implied; without even the implied warranty 1237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1337dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj * GNU General Public License for more details. 1437dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj */ 1537dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <linux/kernel.h> 1637dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <linux/init.h> 1742d399e4189346b495fec8a9a267e8b7f744ee48Sergei Shtylyov#include <linux/err.h> 1837dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <linux/i2c.h> 1937dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <linux/io.h> 2037dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <linux/clk.h> 2125f73ed5c67d17ecf8cefd560f55211cce726086Vivien Didelot#include <linux/platform_data/at24.h> 22ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#include <linux/leds.h> 2337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj#include <linux/mtd/mtd.h> 2437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj#include <linux/mtd/partitions.h> 255a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/slab.h> 2637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj#include <linux/mtd/nand.h> 27990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar#include <linux/input.h> 285f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj#include <linux/spi/spi.h> 295f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj#include <linux/spi/eeprom.h> 30542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar#include <linux/v4l2-dv-timings.h> 3142d399e4189346b495fec8a9a267e8b7f744ee48Sergei Shtylyov 3237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <asm/mach-types.h> 3337dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <asm/mach/arch.h> 3442d399e4189346b495fec8a9a267e8b7f744ee48Sergei Shtylyov 358ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj#include <mach/mux.h> 3637dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <mach/common.h> 37ec2a0833e5157fab6cac5f57a49b2f31eb418a39Arnd Bergmann#include <linux/platform_data/i2c-davinci.h> 3837dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj#include <mach/serial.h> 39ec2a0833e5157fab6cac5f57a49b2f31eb418a39Arnd Bergmann#include <linux/platform_data/mmc-davinci.h> 40ec2a0833e5157fab6cac5f57a49b2f31eb418a39Arnd Bergmann#include <linux/platform_data/mtd-davinci.h> 41ec2a0833e5157fab6cac5f57a49b2f31eb418a39Arnd Bergmann#include <linux/platform_data/keyscan-davinci.h> 4237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 43542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar#include <media/ths7303.h> 44f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri#include <media/tvp514x.h> 45f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri 4639c6d2d1d743b8c925abae7043acc35e6cdc0051Manjunath Hadli#include "davinci.h" 4739c6d2d1d743b8c925abae7043acc35e6cdc0051Manjunath Hadli 48ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic inline int have_imager(void) 49ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 50ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* REVISIT when it's supported, trigger via Kconfig */ 51ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return 0; 52ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 53ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 54ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic inline int have_tvp7002(void) 55ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 56ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* REVISIT when it's supported, trigger via Kconfig */ 57ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return 0; 58ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 59ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 60f6f97588a42373a0181215a5f70958756f2492c2Sekhar Nori#define DM365_EVM_PHY_ID "davinci_mdio-0:01" 61ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell/* 62ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * A MAX-II CPLD is used for various board control functions. 63ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell */ 64ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_OFFSET(a13a8,a2a1) (((a13a8) << 10) + ((a2a1) << 3)) 65ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 66ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_VERSION CPLD_OFFSET(0,0) /* r/o */ 67ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_TEST CPLD_OFFSET(0,1) 68ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_LEDS CPLD_OFFSET(0,2) 69ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_MUX CPLD_OFFSET(0,3) 70ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_SWITCH CPLD_OFFSET(1,0) /* r/o */ 71ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_POWER CPLD_OFFSET(1,1) 72ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_VIDEO CPLD_OFFSET(1,2) 73ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CARDSTAT CPLD_OFFSET(1,3) /* r/o */ 74ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 75ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_DILC_OUT CPLD_OFFSET(2,0) 76ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_DILC_IN CPLD_OFFSET(2,1) /* r/o */ 77ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 78ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_DIR0 CPLD_OFFSET(2,2) 79ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_MUX0 CPLD_OFFSET(2,3) 80ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_MUX1 CPLD_OFFSET(3,0) 81ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_DIR1 CPLD_OFFSET(3,1) 82ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_MUX2 CPLD_OFFSET(3,2) 83ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_MUX3 CPLD_OFFSET(3,3) 84ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_DIR2 CPLD_OFFSET(4,0) 85ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_MUX4 CPLD_OFFSET(4,1) 86ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_IMG_MUX5 CPLD_OFFSET(4,2) 87ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 88ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_RESETS CPLD_OFFSET(4,3) 89ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 90ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CCD_DIR1 CPLD_OFFSET(0x3e,0) 91ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CCD_IO1 CPLD_OFFSET(0x3e,1) 92ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CCD_DIR2 CPLD_OFFSET(0x3e,2) 93ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CCD_IO2 CPLD_OFFSET(0x3e,3) 94ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CCD_DIR3 CPLD_OFFSET(0x3f,0) 95ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#define CPLD_CCD_IO3 CPLD_OFFSET(0x3f,1) 96ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 97ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic void __iomem *cpld; 98ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 99ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 10037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj/* NOTE: this is geared for the standard config, with a socketed 10137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you 10237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj * swap chips with a different block size, partitioning will 10337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj * need to be changed. This NAND chip MT29F16G08FAA is the default 10437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj * NAND shipped with the Spectrum Digital DM365 EVM 10537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj */ 10637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj#define NAND_BLOCK_SIZE SZ_128K 10737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 10837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulrajstatic struct mtd_partition davinci_nand_partitions[] = { 10937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj { 11037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj /* UBL (a few copies) plus U-Boot */ 11137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .name = "bootloader", 11237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .offset = 0, 11345fc4cce939adc883fba5e02f1f3e0e9ff020c30Shankarmurthy,Akshay .size = 30 * NAND_BLOCK_SIZE, 11437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .mask_flags = MTD_WRITEABLE, /* force read-only */ 11537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, { 11637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj /* U-Boot environment */ 11737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .name = "params", 11837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .offset = MTDPART_OFS_APPEND, 11937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .size = 2 * NAND_BLOCK_SIZE, 12037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .mask_flags = 0, 12137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, { 12237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .name = "kernel", 12337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .offset = MTDPART_OFS_APPEND, 12437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .size = SZ_4M, 12537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .mask_flags = 0, 12637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, { 12737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .name = "filesystem1", 12837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .offset = MTDPART_OFS_APPEND, 12937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .size = SZ_512M, 13037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .mask_flags = 0, 13137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, { 13237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .name = "filesystem2", 13337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .offset = MTDPART_OFS_APPEND, 13437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .size = MTDPART_SIZ_FULL, 13537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .mask_flags = 0, 13637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj } 13737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj /* two blocks with bad block table (and mirror) at the end */ 13837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj}; 13937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 14037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulrajstatic struct davinci_nand_pdata davinci_nand_data = { 14137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .mask_chipsel = BIT(14), 14237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .parts = davinci_nand_partitions, 14337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 14437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .ecc_mode = NAND_ECC_HW, 145bb9ebd4e714385a2592a482845865ef2d58b2868Brian Norris .bbt_options = NAND_BBT_USE_FLASH, 146dc4c05a5131d691ccbc06c2e670385127871bdbeSneha Narnakaje .ecc_bits = 4, 14737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj}; 14837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 14937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulrajstatic struct resource davinci_nand_resources[] = { 15037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj { 15137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .start = DM365_ASYNC_EMIF_DATA_CE0_BASE, 15237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, 15337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .flags = IORESOURCE_MEM, 15437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, { 15537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .start = DM365_ASYNC_EMIF_CONTROL_BASE, 15637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 15737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .flags = IORESOURCE_MEM, 15837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, 15937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj}; 16037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 16137b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulrajstatic struct platform_device davinci_nand_device = { 16237b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .name = "davinci_nand", 16337b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .id = 0, 16437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .num_resources = ARRAY_SIZE(davinci_nand_resources), 16537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .resource = davinci_nand_resources, 16637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .dev = { 16737b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj .platform_data = &davinci_nand_data, 16837b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj }, 16937b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj}; 17037b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 1718ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulrajstatic struct at24_platform_data eeprom_info = { 1728ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj .byte_len = (256*1024) / 8, 1738ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj .page_size = 64, 1748ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj .flags = AT24_FLAG_ADDR16, 1758ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj .setup = davinci_get_mac_addr, 1768ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj .context = (void *)0x7f00, 1778ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj}; 1788ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj 179016b9eb0c52ed7349ffdb42b4e51c93ad1f5d90aBrian Norrisstatic struct snd_platform_data dm365_evm_snd_data __maybe_unused = { 18013d36a923da6a1e0584e07d91320373c790c01c3Sekhar Nori .asp_chan_q = EVENTQ_3, 18113d36a923da6a1e0584e07d91320373c790c01c3Sekhar Nori}; 182e9ab3214a8fc546d62e22064caa559b912620106Miguel Aguilar 1838ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulrajstatic struct i2c_board_info i2c_info[] = { 1848ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj { 1858ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj I2C_BOARD_INFO("24c256", 0x50), 1868ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj .platform_data = &eeprom_info, 1878ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj }, 188e9ab3214a8fc546d62e22064caa559b912620106Miguel Aguilar { 189e9ab3214a8fc546d62e22064caa559b912620106Miguel Aguilar I2C_BOARD_INFO("tlv320aic3x", 0x18), 190e9ab3214a8fc546d62e22064caa559b912620106Miguel Aguilar }, 1918ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj}; 1928ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj 19337dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulrajstatic struct davinci_i2c_platform_data i2c_pdata = { 19437dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj .bus_freq = 400 /* kHz */, 19537dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj .bus_delay = 0 /* usec */, 19637dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj}; 19737dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj 198c92b29ec4a7a197199b8b937b909d80dc79d8e5bMiguel Aguilarstatic int dm365evm_keyscan_enable(struct device *dev) 199c92b29ec4a7a197199b8b937b909d80dc79d8e5bMiguel Aguilar{ 200c92b29ec4a7a197199b8b937b909d80dc79d8e5bMiguel Aguilar return davinci_cfg_reg(DM365_KEYSCAN); 201c92b29ec4a7a197199b8b937b909d80dc79d8e5bMiguel Aguilar} 202c92b29ec4a7a197199b8b937b909d80dc79d8e5bMiguel Aguilar 203990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilarstatic unsigned short dm365evm_keymap[] = { 204990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_KP2, 205990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_LEFT, 206990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_EXIT, 207990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_DOWN, 208990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_ENTER, 209990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_UP, 210990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_KP1, 211990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_RIGHT, 212990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_MENU, 213990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_RECORD, 214990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_REWIND, 215990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_KPMINUS, 216990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_STOP, 217990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_FASTFORWARD, 218990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_KPPLUS, 219990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar KEY_PLAYPAUSE, 220990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar 0 221990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar}; 222990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar 223990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilarstatic struct davinci_ks_platform_data dm365evm_ks_data = { 224c92b29ec4a7a197199b8b937b909d80dc79d8e5bMiguel Aguilar .device_enable = dm365evm_keyscan_enable, 225990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar .keymap = dm365evm_keymap, 226990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar .keymapsize = ARRAY_SIZE(dm365evm_keymap), 227990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar .rep = 1, 228990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar /* Scan period = strobe + interval */ 229990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar .strobe = 0x5, 230990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar .interval = 0x2, 231990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, 232990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar}; 233990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar 234ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic int cpld_mmc_get_cd(int module) 235ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 236ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (!cpld) 237ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return -ENXIO; 238ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 239ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* low == card present */ 240ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0)); 241ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 242ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 243ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic int cpld_mmc_get_ro(int module) 244ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 245ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (!cpld) 246ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return -ENXIO; 247ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 248ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* high == card's write protect switch active */ 249ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1)); 250ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 251ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 252a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulrajstatic struct davinci_mmc_config dm365evm_mmc_config = { 253ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell .get_cd = cpld_mmc_get_cd, 254ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell .get_ro = cpld_mmc_get_ro, 255a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj .wires = 4, 256a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj .max_freq = 50000000, 257a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 258a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj}; 259a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj 2608ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulrajstatic void dm365evm_emac_configure(void) 2618ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj{ 2628ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj /* 2638ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj * EMAC pins are multiplexed with GPIO and UART 2648ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj * Further details are available at the DM365 ARM 2658ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj * Subsystem Users Guide(sprufg5.pdf) pages 125 - 127 2668ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj */ 2678ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_TX_EN); 2688ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_TX_CLK); 2698ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_COL); 2708ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_TXD3); 2718ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_TXD2); 2728ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_TXD1); 2738ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_TXD0); 2748ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RXD3); 2758ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RXD2); 2768ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RXD1); 2778ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RXD0); 2788ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RX_CLK); 2798ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RX_DV); 2808ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_RX_ER); 2818ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_CRS); 2828ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_MDIO); 2838ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_EMAC_MDCLK); 2848ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj 2858ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj /* 2868ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj * EMAC interrupts are multiplexed with GPIO interrupts 2878ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj * Details are available at the DM365 ARM 2888ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj * Subsystem Users Guide(sprufg5.pdf) pages 133 - 134 2898ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj */ 2908ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_INT_EMAC_RXTHRESH); 2918ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_INT_EMAC_RXPULSE); 2928ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_INT_EMAC_TXPULSE); 2938ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj davinci_cfg_reg(DM365_INT_EMAC_MISCPULSE); 2948ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj} 2958ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj 296a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulrajstatic void dm365evm_mmc_configure(void) 297a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj{ 298a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj /* 299a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj * MMC/SD pins are multiplexed with GPIO and EMIF 300a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj * Further details are available at the DM365 ARM 301a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj * Subsystem Users Guide(sprufg5.pdf) pages 118, 128 - 131 302a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj */ 303a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_cfg_reg(DM365_SD1_CLK); 304a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_cfg_reg(DM365_SD1_CMD); 305a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_cfg_reg(DM365_SD1_DATA3); 306a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_cfg_reg(DM365_SD1_DATA2); 307a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_cfg_reg(DM365_SD1_DATA1); 308a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_cfg_reg(DM365_SD1_DATA0); 309a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj} 310a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj 311f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheristatic struct tvp514x_platform_data tvp5146_pdata = { 312f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .clk_polarity = 0, 313f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .hs_polarity = 1, 314f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .vs_polarity = 1 315f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri}; 316f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri 317f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) 318f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri/* Inputs available at the TVP5146 */ 319f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheristatic struct v4l2_input tvp5146_inputs[] = { 320f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri { 321f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .index = 0, 322f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .name = "Composite", 323f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .type = V4L2_INPUT_TYPE_CAMERA, 324f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .std = TVP514X_STD_ALL, 325f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 326f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri { 327f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .index = 1, 328f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .name = "S-Video", 329f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .type = V4L2_INPUT_TYPE_CAMERA, 330f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .std = TVP514X_STD_ALL, 331f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 332f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri}; 333f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri 334f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri/* 335f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri * this is the route info for connecting each input to decoder 336f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri * ouput that goes to vpfe. There is a one to one correspondence 337f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri * with tvp5146_inputs 338f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri */ 339f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheristatic struct vpfe_route tvp5146_routes[] = { 340f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri { 341f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .input = INPUT_CVBS_VI2B, 342f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, 343f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 344f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri{ 345f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .input = INPUT_SVIDEO_VI2C_VI1C, 346f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, 347f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 348f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri}; 349f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri 350f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheristatic struct vpfe_subdev_info vpfe_sub_devs[] = { 351f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri { 352f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .name = "tvp5146", 353f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .grp_id = 0, 354f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .num_inputs = ARRAY_SIZE(tvp5146_inputs), 355f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .inputs = tvp5146_inputs, 356f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .routes = tvp5146_routes, 357f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .can_route = 1, 358f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .ccdc_if_params = { 359f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .if_type = VPFE_BT656, 360f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .hdpol = VPFE_PINPOL_POSITIVE, 361f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .vdpol = VPFE_PINPOL_POSITIVE, 362f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 363f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .board_info = { 364f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri I2C_BOARD_INFO("tvp5146", 0x5d), 365f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .platform_data = &tvp5146_pdata, 366f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 367f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri }, 368f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri}; 369f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri 370f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheristatic struct vpfe_config vpfe_cfg = { 371f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), 372f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .sub_devs = vpfe_sub_devs, 373f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .i2c_adapter_id = 1, 374f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .card_name = "DM365 EVM", 375f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri .ccdc = "ISIF", 376f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri}; 377f2a4c59df62f4493c7cf7dfd349ec66bdd4b9fecMurali Karicheri 378542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar/* venc standards timings */ 379542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakarstatic struct vpbe_enc_mode_info dm365evm_enc_std_timing[] = { 380542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 381542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "ntsc", 382542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .timings_type = VPBE_ENC_STD, 38389cdbba84157a41404ee2de30142d839596eece9Lad, Prabhakar .std_id = V4L2_STD_NTSC, 384542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .interlaced = 1, 385542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .xres = 720, 386542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .yres = 480, 387542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .aspect = {11, 10}, 388542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .fps = {30000, 1001}, 389542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .left_margin = 0x79, 390542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .upper_margin = 0x10, 391542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 392542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 393542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "pal", 394542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .timings_type = VPBE_ENC_STD, 39589cdbba84157a41404ee2de30142d839596eece9Lad, Prabhakar .std_id = V4L2_STD_PAL, 396542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .interlaced = 1, 397542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .xres = 720, 398542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .yres = 576, 399542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .aspect = {54, 59}, 400542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .fps = {25, 1}, 401542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .left_margin = 0x7E, 402542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .upper_margin = 0x16, 403542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 404542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar}; 405542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 406542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar/* venc dv timings */ 407542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakarstatic struct vpbe_enc_mode_info dm365evm_enc_preset_timing[] = { 408542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 409542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "480p59_94", 410542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .timings_type = VPBE_ENC_DV_TIMINGS, 411542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .dv_timings = V4L2_DV_BT_CEA_720X480P59_94, 412542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .interlaced = 0, 413542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .xres = 720, 414542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .yres = 480, 415542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .aspect = {1, 1}, 416542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .fps = {5994, 100}, 417542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .left_margin = 0x8F, 418542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .upper_margin = 0x2D, 419542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 420542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 421542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "576p50", 422542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .timings_type = VPBE_ENC_DV_TIMINGS, 423542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .dv_timings = V4L2_DV_BT_CEA_720X576P50, 424542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .interlaced = 0, 425542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .xres = 720, 426542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .yres = 576, 427542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .aspect = {1, 1}, 428542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .fps = {50, 1}, 429542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .left_margin = 0x8C, 430542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .upper_margin = 0x36, 431542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 432542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 433542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "720p60", 434542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .timings_type = VPBE_ENC_DV_TIMINGS, 435542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .dv_timings = V4L2_DV_BT_CEA_1280X720P60, 436542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .interlaced = 0, 437542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .xres = 1280, 438542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .yres = 720, 439542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .aspect = {1, 1}, 440542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .fps = {60, 1}, 441542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .left_margin = 0x117, 442542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .right_margin = 70, 443542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .upper_margin = 38, 444542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .lower_margin = 3, 445542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .hsync_len = 80, 446542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .vsync_len = 5, 447542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 448542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 449542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "1080i60", 450542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .timings_type = VPBE_ENC_DV_TIMINGS, 451542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .dv_timings = V4L2_DV_BT_CEA_1920X1080I60, 452542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .interlaced = 1, 453542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .xres = 1920, 454542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .yres = 1080, 455542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .aspect = {1, 1}, 456542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .fps = {30, 1}, 457542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .left_margin = 0xc9, 458542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .right_margin = 80, 459542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .upper_margin = 30, 460542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .lower_margin = 3, 461542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .hsync_len = 88, 462542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .vsync_len = 5, 463542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 464542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar}; 465542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 466542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) 467542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 468542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar/* 469542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar * The outputs available from VPBE + ecnoders. Keep the 470542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar * the order same as that of encoders. First those from venc followed by that 471542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar * from encoders. Index in the output refers to index on a particular 472542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar * encoder.Driver uses this index to pass it to encoder when it supports more 473542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar * than one output. Application uses index of the array to set an output. 474542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar */ 475542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakarstatic struct vpbe_output dm365evm_vpbe_outputs[] = { 476542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 477542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .output = { 478542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .index = 0, 479542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "Composite", 480542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .type = V4L2_OUTPUT_TYPE_ANALOG, 481542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .std = VENC_STD_ALL, 482542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .capabilities = V4L2_OUT_CAP_STD, 483542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 484542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .subdev_name = DM365_VPBE_VENC_SUBDEV_NAME, 485542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .default_mode = "ntsc", 486542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .num_modes = ARRAY_SIZE(dm365evm_enc_std_timing), 487542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .modes = dm365evm_enc_std_timing, 488542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .if_params = V4L2_MBUS_FMT_FIXED, 489542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 490542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar { 491542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .output = { 492542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .index = 1, 493542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .name = "Component", 494542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .type = V4L2_OUTPUT_TYPE_ANALOG, 495542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .capabilities = V4L2_OUT_CAP_DV_TIMINGS, 496542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 497542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .subdev_name = DM365_VPBE_VENC_SUBDEV_NAME, 498542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .default_mode = "480p59_94", 499542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .num_modes = ARRAY_SIZE(dm365evm_enc_preset_timing), 500542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .modes = dm365evm_enc_preset_timing, 501542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .if_params = V4L2_MBUS_FMT_FIXED, 502542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 503542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar}; 504542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 505542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar/* 506542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar * Amplifiers on the board 507542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar */ 5089c559708b6cda71d8fdabc3f98cb7e98edbd4f0bSekhar Noristatic struct ths7303_platform_data ths7303_pdata = { 509542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .ch_1 = 3, 510542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .ch_2 = 3, 511542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .ch_3 = 3, 512542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar}; 513542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 514542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakarstatic struct amp_config_info vpbe_amp = { 515542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .module_name = "ths7303", 516542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .is_i2c = 1, 517542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .board_info = { 518542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar I2C_BOARD_INFO("ths7303", 0x2c), 519542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .platform_data = &ths7303_pdata, 520542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar } 521542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar}; 522542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 523542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakarstatic struct vpbe_config dm365evm_display_cfg = { 524542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .module_name = "dm365-vpbe-display", 525542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .i2c_adapter_id = 1, 526542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .amp = &vpbe_amp, 527542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .osd = { 528542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .module_name = DM365_VPBE_OSD_SUBDEV_NAME, 529542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 530542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .venc = { 531542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .module_name = DM365_VPBE_VENC_SUBDEV_NAME, 532542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar }, 533542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .num_outputs = ARRAY_SIZE(dm365evm_vpbe_outputs), 534542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar .outputs = dm365evm_vpbe_outputs, 535542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar}; 536542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar 53737dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulrajstatic void __init evm_init_i2c(void) 53837dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj{ 53937dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj davinci_init_i2c(&i2c_pdata); 5408ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); 54137dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj} 54237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj 543ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic struct platform_device *dm365_evm_nand_devices[] __initdata = { 54437b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj &davinci_nand_device, 54537b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj}; 54637b798da5df377521a8cd32a82467aa2d431f33eSandeep Paulraj 547ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic inline int have_leds(void) 548ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 549ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#ifdef CONFIG_LEDS_CLASS 550ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return 1; 551ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#else 552ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return 0; 553ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell#endif 554ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 555ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 556ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstruct cpld_led { 557ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell struct led_classdev cdev; 558ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell u8 mask; 559ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell}; 560ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 561ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic const struct { 562ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell const char *name; 563ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell const char *trigger; 564ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} cpld_leds[] = { 565ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds2", }, 566ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds3", }, 567ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds4", }, 568ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds5", }, 569ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds6", "nand-disk", }, 570ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds7", "mmc1", }, 571ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds8", "mmc0", }, 572ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell { "dm365evm::ds9", "heartbeat", }, 573ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell}; 574ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 575ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic void cpld_led_set(struct led_classdev *cdev, enum led_brightness b) 576ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 577ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell struct cpld_led *led = container_of(cdev, struct cpld_led, cdev); 578ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell u8 reg = __raw_readb(cpld + CPLD_LEDS); 579ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 580ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (b != LED_OFF) 581ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell reg &= ~led->mask; 582ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell else 583ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell reg |= led->mask; 584ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell __raw_writeb(reg, cpld + CPLD_LEDS); 585ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 586ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 587ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic enum led_brightness cpld_led_get(struct led_classdev *cdev) 588ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 589ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell struct cpld_led *led = container_of(cdev, struct cpld_led, cdev); 590ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell u8 reg = __raw_readb(cpld + CPLD_LEDS); 591ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 592ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return (reg & led->mask) ? LED_OFF : LED_FULL; 593ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 594ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 595ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic int __init cpld_leds_init(void) 596ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 597ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell int i; 598ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 599ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (!have_leds() || !cpld) 600ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return 0; 601ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 602ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* setup LEDs */ 603ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell __raw_writeb(0xff, cpld + CPLD_LEDS); 604ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell for (i = 0; i < ARRAY_SIZE(cpld_leds); i++) { 605ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell struct cpld_led *led; 606ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 607ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell led = kzalloc(sizeof(*led), GFP_KERNEL); 608ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (!led) 609ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell break; 610ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 611ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell led->cdev.name = cpld_leds[i].name; 612ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell led->cdev.brightness_set = cpld_led_set; 613ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell led->cdev.brightness_get = cpld_led_get; 614ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell led->cdev.default_trigger = cpld_leds[i].trigger; 615ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell led->mask = BIT(i); 616ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 617ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (led_classdev_register(NULL, &led->cdev) < 0) { 618ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell kfree(led); 619ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell break; 620ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } 621ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } 622ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 623ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return 0; 624ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 625ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell/* run after subsys_initcall() for LEDs */ 626ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellfs_initcall(cpld_leds_init); 627ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 628ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 629ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellstatic void __init evm_init_cpld(void) 630ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell{ 631ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell u8 mux, resets; 632ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell const char *label; 633ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell struct clk *aemif_clk; 634ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 635ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* Make sure we can configure the CPLD through CS1. Then 636ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * leave it on for later access to MMC and LED registers. 637ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell */ 638ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell aemif_clk = clk_get(NULL, "aemif"); 639ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (IS_ERR(aemif_clk)) 640ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return; 641b6f1ffed9d8a830ab94fd3fc6182e2fc8c77cba0m-karicheri clk_prepare_enable(aemif_clk); 642ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 643ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, 644ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell "cpld") == NULL) 645ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell goto fail; 646ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell cpld = ioremap(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE); 647ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (!cpld) { 648ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell release_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, 649ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell SECTION_SIZE); 650ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownellfail: 651ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell pr_err("ERROR: can't map CPLD\n"); 652b6f1ffed9d8a830ab94fd3fc6182e2fc8c77cba0m-karicheri clk_disable_unprepare(aemif_clk); 653ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell return; 654ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } 655ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 656ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* External muxing for some signals */ 657ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell mux = 0; 658ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 659ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* Read SW5 to set up NAND + keypad _or_ OneNAND (sync read). 660ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * NOTE: SW4 bus width setting must match! 661ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell */ 662ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) { 663ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* external keypad mux */ 664ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell mux |= BIT(7); 665ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 666ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell platform_add_devices(dm365_evm_nand_devices, 667ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell ARRAY_SIZE(dm365_evm_nand_devices)); 668ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } else { 669ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* no OneNAND support yet */ 670ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } 671ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 672ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* Leave external chips in reset when unused. */ 673ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell resets = BIT(3) | BIT(2) | BIT(1) | BIT(0); 674ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 675ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* Static video input config with SN74CBT16214 1-of-3 mux: 676ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * - port b1 == tvp7002 (mux lowbits == 1 or 6) 677ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * - port b2 == imager (mux lowbits == 2 or 7) 678ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * - port b3 == tvp5146 (mux lowbits == 5) 679ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * 680ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell * Runtime switching could work too, with limitations. 681ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell */ 682ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (have_imager()) { 683ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell label = "HD imager"; 6849daedd833a38edd90cf7baa1b1fcf61c3a0721e3Jon Povey mux |= 2; 685ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 686ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* externally mux MMC1/ENET/AIC33 to imager */ 687ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell mux |= BIT(6) | BIT(5) | BIT(3); 688ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } else { 689ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell struct davinci_soc_info *soc_info = &davinci_soc_info; 690ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 691ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* we can use MMC1 ... */ 692ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell dm365evm_mmc_configure(); 693ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell davinci_setup_mmc(1, &dm365evm_mmc_config); 694ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 695ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* ... and ENET ... */ 696ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell dm365evm_emac_configure(); 697782f2d782771484bb951be1c394ca2128ed7774eCyril Chemparathy soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID; 698ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell resets &= ~BIT(3); 699ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 700ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* ... and AIC33 */ 701ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell resets &= ~BIT(1); 702ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 703ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell if (have_tvp7002()) { 7049daedd833a38edd90cf7baa1b1fcf61c3a0721e3Jon Povey mux |= 1; 705ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell resets &= ~BIT(2); 706ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell label = "tvp7002 HD"; 707ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } else { 708ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* default to tvp5146 */ 709ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell mux |= 5; 710ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell resets &= ~BIT(0); 711ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell label = "tvp5146 SD"; 712ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } 713ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell } 714ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell __raw_writeb(mux, cpld + CPLD_MUX); 715ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell __raw_writeb(resets, cpld + CPLD_RESETS); 716ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell pr_info("EVM: %s video input\n", label); 717ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 718ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */ 719ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell} 720ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell 72137dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulrajstatic void __init dm365_evm_map_io(void) 72237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj{ 72337dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj dm365_init(); 72437dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj} 72537dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj 7265f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulrajstatic struct spi_eeprom at25640 = { 7275f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .byte_len = SZ_64K / 8, 7285f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .name = "at25640", 7295f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .page_size = 32, 7305f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .flags = EE_ADDR2, 7315f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj}; 7325f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj 7335f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulrajstatic struct spi_board_info dm365_evm_spi_info[] __initconst = { 7345f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj { 7355f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .modalias = "at25", 7365f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .platform_data = &at25640, 7375f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .max_speed_hz = 10 * 1000 * 1000, 7385f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .bus_num = 0, 7395f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .chip_select = 0, 7405f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj .mode = SPI_MODE_0, 7415f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj }, 7425f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj}; 7435f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj 74437dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulrajstatic __init void dm365_evm_init(void) 74537dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj{ 746834acb2af6e8255a026c754fac3d1bc3f32b0c1aPhilip Avinash int ret; 747834acb2af6e8255a026c754fac3d1bc3f32b0c1aPhilip Avinash 748834acb2af6e8255a026c754fac3d1bc3f32b0c1aPhilip Avinash ret = dm365_gpio_register(); 749834acb2af6e8255a026c754fac3d1bc3f32b0c1aPhilip Avinash if (ret) 750834acb2af6e8255a026c754fac3d1bc3f32b0c1aPhilip Avinash pr_warn("%s: GPIO init failed: %d\n", __func__, ret); 751834acb2af6e8255a026c754fac3d1bc3f32b0c1aPhilip Avinash 75237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj evm_init_i2c(); 753fcf7157ba3b50e57653544421250ebbe81a33d81Manjunathappa, Prakash davinci_serial_init(dm365_serial_device); 7548ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj 7558ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj dm365evm_emac_configure(); 756a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj dm365evm_mmc_configure(); 757a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj 758a45c8ba30bca0c3257785cae28680781fd356a85Sandeep Paulraj davinci_setup_mmc(0, &dm365evm_mmc_config); 7598ed0a9d4e7cfff439f95d08c882841f25a12bf54Sandeep Paulraj 760542b5bd226b0f5d5e9190cb96e6d96a912394795Lad, Prabhakar dm365_init_video(&vpfe_cfg, &dm365evm_display_cfg); 761120c66046cc8931259867ac1cdc6de0d0e742fb5Lad, Prabhakar 762ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell /* maybe setup mmc1/etc ... _after_ mmc0 */ 763ff255c6caa389c90c68f5421f60ebfc40b68ea1bDavid Brownell evm_init_cpld(); 764e9ab3214a8fc546d62e22064caa559b912620106Miguel Aguilar 765aa9b88ee80d3985ebae9567a8f4e0d07ce15b5a7Miguel Aguilar#ifdef CONFIG_SND_DM365_AIC3X_CODEC 766e9ab3214a8fc546d62e22064caa559b912620106Miguel Aguilar dm365_init_asp(&dm365_evm_snd_data); 767aa9b88ee80d3985ebae9567a8f4e0d07ce15b5a7Miguel Aguilar#elif defined(CONFIG_SND_DM365_VOICE_CODEC) 768aa9b88ee80d3985ebae9567a8f4e0d07ce15b5a7Miguel Aguilar dm365_init_vc(&dm365_evm_snd_data); 769aa9b88ee80d3985ebae9567a8f4e0d07ce15b5a7Miguel Aguilar#endif 77099381b4f114d00ccfe2495aa79755b6094bdd0c9Miguel Aguilar dm365_init_rtc(); 771990c09d5f5b2079e8bf3c6615c78fa5ed2b97147Miguel Aguilar dm365_init_ks(&dm365evm_ks_data); 7725f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj 7735f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj dm365_init_spi0(BIT(0), dm365_evm_spi_info, 7745f19daa16ffca55db5b0253eba2bd0f71ee7f7f4Sandeep Paulraj ARRAY_SIZE(dm365_evm_spi_info)); 77537dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj} 77637dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj 77737dd00956361528776d1dd76eb303a55b91fb23aSandeep PaulrajMACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") 778e7e5601458a49fdcb1b49b4696e7530c25f86f25Nicolas Pitre .atag_offset = 0x100, 77937dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj .map_io = dm365_evm_map_io, 780bd808947040ba53b2b0e52dde598a9414fb27bbaCyril Chemparathy .init_irq = davinci_irq_init, 7816bb27d7349db51b50c40534710fe164ca0d58902Stephen Warren .init_time = davinci_timer_init, 78237dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj .init_machine = dm365_evm_init, 7833aa3e8407ae9023c5ff59bf5c81fc2553c31eb70Shawn Guo .init_late = davinci_init_late, 784f68deabf3dc6c13fb80ec28575d0153c59f7ecceNicolas Pitre .dma_zone_size = SZ_128M, 785c6121ddd1f75278ab77504af2914d07831558672Sekhar Nori .restart = davinci_restart, 78637dd00956361528776d1dd76eb303a55b91fb23aSandeep PaulrajMACHINE_END 78737dd00956361528776d1dd76eb303a55b91fb23aSandeep Paulraj 788