b1760c847ff9d04fba7cdbef005a0ad805311c6d |
|
30-Mar-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: remove bogus performance optimization We were re-homing the initial task's kernel stack on the boot cpu, but in fact it's better to let it stay globally homed, since that task isn't bound to the boot cpu anyway. This is more of a general cleanup than an actual performance optimization, but it removes code, which is a good thing. :-) Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
7a7039ee71811222310b431aee246eb78dd0d401 |
|
29-Mar-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: fix bug in loading kernels larger than 16 MB Previously we only handled kernels up to a single huge page in size. Now we create additional PTEs appropriately. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
bd119c69239322caafdb64517a806037d0d0c70a |
|
28-Mar-2012 |
David Howells <dhowells@redhat.com> |
Disintegrate asm/system.h for Tile Disintegrate asm/system.h for Tile. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com>
|
d1afa65ca59d4e6a5f1a8c1ab9bfa73f2fa8b777 |
|
02-Aug-2011 |
Julia Lawall <julia@diku.dk> |
arch/tile/mm/init.c: trivial: use BUG_ON Use BUG_ON(x) rather than if(x) BUG(); The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ identifier x; @@ -if (x) BUG(); +BUG_ON(x); @@ identifier x; @@ -if (!x) BUG(); +BUG_ON(!x); // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
1c395176962176660bb108f90e97e1686cfe0d85 |
|
25-May-2011 |
Peter Zijlstra <a.p.zijlstra@chello.nl> |
mm: now that all old mmu_gather code is gone, remove the storage Fold all the mmu_gather rework patches into one for submission Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Reported-by: Hugh Dickins <hughd@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: David Miller <davem@davemloft.net> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Richard Weinberger <richard@nod.at> Cc: Tony Luck <tony.luck@intel.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: Nick Piggin <npiggin@kernel.dk> Cc: Namhyung Kim <namhyung@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
76c567fbba50c3da2f4d40e2e551bab26cfd4381 |
|
28-Feb-2011 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: support 4KB page size as well as 64KB The Tilera architecture traditionally supports 64KB page sizes to improve TLB utilization and improve performance when the hardware is being used primarily to run a single application. For more generic server scenarios, it can be beneficial to run with 4KB page sizes, so this commit allows that to be specified (by modifying the arch/tile/include/hv/pagesize.h header). As part of this change, we also re-worked the PTE management slightly so that PTE writes all go through a __set_pte() function where we can do some additional validation. The set_pte_order() function was eliminated since the "order" argument wasn't being used. One bug uncovered was in the PCI DMA code, which wasn't properly flushing the specified range. This was benign with 64KB pages, but with 4KB pages we were getting some larger flushes wrong. The per-cpu memory reservation code also needed updating to conform with the newer percpu stuff; before it always chose 64KB, and that was always correct, but with 4KB granularity we now have to pay closer attention and reserve the amount of memory that will be requested when the percpu code starts allocating. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
00dce03134689a257120ae2aa18ba7d1a736bef7 |
|
28-Feb-2011 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: export some additional module symbols This adds a grab bag of symbols that have been missing for various modules. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
ed54d38f0852b2e685393ddae2405d59ef44bed4 |
|
28-Feb-2011 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: fix reversed test of strict_strtol() return value This fixes the "initfree" boot argument. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
401586e9164d225d24bb9d3ddfeb03ef2e931ee3 |
|
28-Feb-2011 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: avoid a simulator warning during bootup As the added comment says, we can sometimes see a coherence warning from our simulator if the "swapper_pgprot" variable on the boot cpu has not been evicted from cache by the time the other cpus come up. Force it to be evicted so we never see the warning. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
2cb82400719e085a3c226cf7cce8950208f09a06 |
|
28-Feb-2011 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: catch up with section naming convention in 2.6.35 The convention changed to, e.g., ".data..page_aligned". This commit fixes the places in the tile architecture that were still using the old convention. One tile-specific section (.init.page) was dropped in favor of just using an "aligned" attribute. Sam Ravnborg <sam@ravnborg.org> pointed out __PAGE_ALIGNED_BSS, etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
e5a06939736277c54a68ae275433db55b99d187c |
|
01-Nov-2010 |
Chris Metcalf <cmetcalf@tilera.com> |
drivers/net/tile/: on-chip network drivers for the tile architecture This change adds the first network driver for the tile architecture, supporting the on-chip XGBE and GBE shims. The infrastructure is present for the TILE-Gx networking drivers (another three source files in the new directory) but for now the the actual tilegx sources are waiting on releasing hardware to initial customers. Note that arch/tile/include/hv/* are "upstream" headers from the Tilera hypervisor and will probably benefit less from LKML review. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
d59e609d6568ba5ab23c256f412ac5ec360722c1 |
|
01-Nov-2010 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: avoid __must_check warning on one strict_strtol check For the "initfree" boot argument it's not that big a deal, but to avoid warnings in the code, we check for a valid value before allowing the specified argument to override the kernel default. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
a78c942df64ef4cf495fd4d8715e48501bd7f8a4 |
|
14-Oct-2010 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: parameterize system PLs to support KVM port While not a port to KVM (yet), this change modifies the kernel to be able to build either at PL1 or at PL2 with a suitable config switch. Pushing up this change avoids handling branch merge issues going forward with the KVM work. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
|
0707ad30d10110aebc01a5a64fb63f4b32d20b73 |
|
25-Jun-2010 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: Miscellaneous cleanup changes. This commit is primarily changes caused by reviewing "sparse" and "checkpatch" output on our sources, so is somewhat noisy, since things like "printk() -> pr_err()" (or whatever) throughout the codebase tend to get tedious to read. Rather than trying to tease apart precisely which things changed due to which type of code review, this commit includes various cleanups in the code: - sparse: Add declarations in headers for globals. - sparse: Fix __user annotations. - sparse: Using gfp_t consistently instead of int. - sparse: removing functions not actually used. - checkpatch: Clean up printk() warnings by using pr_info(), etc.; also avoid partial-line printks except in bootup code. - checkpatch: Use exposed structs rather than typedefs. - checkpatch: Change some C99 comments to C89 comments. In addition, a couple of minor other changes are rolled in to this commit: - Add support for a "raise" instruction to cause SIGFPE, etc., to be raised. - Remove some compat code that is unnecessary when we fully eliminate some of the deprecated syscalls from the generic syscall ABI. - Update the tile_defconfig to reflect current config contents. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
|
867e359b97c970a60626d5d76bbe2a8fadbf38fb |
|
29-May-2010 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: core support for Tilera 32-bit chips. This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org>
|