| d04525ed0323709711277563a2c76e446a017423 |
|
11-Apr-2012 |
Shawn Guo <shawn.guo@linaro.org> |
dma: mxs-dma: enable channel in device_issue_pending call
Enable channel in device_issue_pending call, so that the order between
cookie assignment and channel enabling can be ensured naturally.
It fixes the mxs gpmi-nand breakage which is caused by the incorrect
order of cookie assigning and channel enabling.
Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Huang Shijie <b32955@freescale.com>
Tested-by <samgandhi9@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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| 921de864b7c6413f15224d8f5e677541e8e1ac6d |
|
16-Feb-2012 |
Huang Shijie <b32955@freescale.com> |
mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()
[1] Background :
The GPMI does ECC read page operation with a DMA chain consist of three DMA
Command Structures. The middle one of the chain is used to enable the BCH,
and read out the NAND page.
The WAIT4END(wait for command end) is a comunication signal between
the GPMI and MXS-DMA.
[2] The current DMA code sets the WAIT4END bit at the last one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^
|
|
set WAIT4END here
This chain works fine in the mx23/mx28.
[3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should
be set not only at the last DMA Command Structure,
but also at the middle one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^ ^
| |
| |
set WAIT4END here too set WAIT4END here
If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state.
In the next ECC write page operation, a DMA-timeout occurs.
This has been catched in the MX6Q board.
[4] In order to fix the bug, rewrite the last parameter of mxs_dma_prep_slave_sg(),
and use the dma_ctrl_flags:
---------------------------------------------------------
DMA_PREP_INTERRUPT : append a new DMA Command Structrue.
DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure.
---------------------------------------------------------
[5] changes to the relative drivers:
<1> For mxs-mmc driver, just use the new flags, do not change any logic.
<2> For gpmi-nand driver, and use the new flags to set the DMA
chain, especially for ecc read page.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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| 3946860409130038ef6e0e5c50f2203053eae2b7 |
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16-Feb-2012 |
Huang Shijie <b32955@freescale.com> |
mxs-dma : move the mxs dma.h to a more common place
Move the header to a more common place.
The mxs dma engine is not only used in mx23/mx28, but also used
in mx50/mx6q. It will also be used in the future chips.
Rename it to mxs-dma.h, and create a new folder include/linux/fsl/ to
store the Freescale's header files.
change mxs-dma driver, mxs-mmc driver, gpmi-nand driver, mxs-saif driver
to the new header file.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
Acked-by: Chris Ball <cjb@laptop.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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| 16052827d98fbc13c31ebad560af4bd53e2b4dd5 |
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08-Mar-2012 |
Alexandre Bounine <alexandre.bounine@idt.com> |
dmaengine/dma_slave: introduce inline wrappers
Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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| d1f81a64a4250bdd776978be06ae2b8e13ec7471 |
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25-Nov-2011 |
Axel Lin <axel.lin@gmail.com> |
mmc: convert drivers/mmc/host/* to use module_platform_driver()
This patch converts the drivers in drivers/mmc/host/* to use the
module_platform_driver() macro which makes the code smaller and a bit
simpler.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Acked-by: David Brown <davidb@codeaurora.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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| efdfc52c0470fb650cb2ee44cf030ec04e97b954 |
|
20-Dec-2011 |
Shawn Guo <shawn.guo@linaro.org> |
mmc: mxs-mmc: convert to clk_prepare/clk_unprepare
The patch converts mxs-mmc driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Chris Ball <cjb@laptop.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
|
| a4e3e86d66ffc640ac54acffa29450e327a80ae2 |
|
13-Dec-2011 |
Shawn Guo <shawn.guo@linaro.org> |
mmc: mxs-mmc: fix the dma_transfer_direction migration
The commit 05f5799 (mmc-host: move to dma_transfer_direction) left out
the DMA_NONE, in turn breaks the driver as below.
[ 0.650000] mxs-mmc mxs-mmc.0: initialized
[ 0.650000] mxs-mmc mxs-mmc.1: initialized
[ 0.690000] mxs-dma mxs-dma-apbh: maximum bytes for sg entry exceeded: -55906
7475 > 65280
[ 0.690000] mxs-mmc mxs-mmc.0: mxs_mmc_ac: failed to prep dma
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
|
| 05f5799cbe5c9e2c03f604b3de5783cf4d726227 |
|
14-Oct-2011 |
Vinod Koul <vinod.koul@linux.intel.com> |
mmc-host: move to dma_transfer_direction
fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves mmc drivers to use new enum
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Chris Ball <cjb@laptop.org>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
|
| 88b47679746b81534002bcba42da97ab82b5d12a |
|
03-Jul-2011 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
mmc: Add module.h to drivers/mmc users assuming implicit presence.
We are cleaning up the implicit presence of module.h; these guys are
some of the people who just assume it will be there. Call it out
explitly for those that really need it.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| d982dcdc4e64eb1881df44b0035a8268bf1ab067 |
|
15-Jul-2011 |
Koen Beel <koen.beel@barco.com> |
mmc: mxs-mmc: fix clock rate setting
Fix clock rate setting in the mxs-mmc driver. Previously, if div2 was 0
then the value for TIMING_CLOCK_RATE would have been 255 instead of 0.
The limits for div1 (TIMING_CLOCK_DIVIDE) and div2 (TIMING_CLOCK_RATE+1)
were also not correctly defined.
Can easily be reproduced on mx23evk: default clock for high speed sdio
cards is 50 MHz. With a SSP_CLK of 28.8 MHz default), this resulted in
an actual clock rate of about 56 kHz. Tested on mx23evk.
Signed-off-by: Koen Beel <koen.beel@barco.com>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| e4243f13d10e5fbe2b84e211dcac3bc6e0792167 |
|
21-Feb-2011 |
Shawn Guo <shawn.guo@freescale.com> |
mmc: mxs-mmc: add mmc host driver for i.MX23/28
This adds the mmc host driver for Freescale MXS-based SoC i.MX23/28.
The driver calls into mxs-dma via generic dmaengine api for both pio
and data transfer.
Thanks Chris Ball for the indentation patch.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|