Searched defs:reg2 (Results 1 - 25 of 28) sorted by relevance

12

/drivers/media/dvb/frontends/
H A Dtua6100.c78 u8 reg2[] = { 0x02, 0x00, 0x00 }; local
81 struct i2c_msg msg2 = { .addr = priv->i2c_address, .flags = 0, .buf = reg2, .len = 3 };
105 reg2[1] = (_R >> 8) & 0x03;
106 reg2[2] = _R;
108 reg2[1] |= 0x1c;
110 reg2[1] |= 0x0c;
112 reg2[1] |= 0x1c;
H A Drtl2830.c93 u8 reg2 = (reg >> 0) & 0xff; local
105 return rtl2830_wr(priv, reg2, val, len);
112 u8 reg2 = (reg >> 0) & 0xff; local
124 return rtl2830_rd(priv, reg2, val, len);
H A Dnxt200x.c116 u8 reg2 [] = { reg }; local
118 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
H A Ds5h1409.c568 u16 reg, reg1, reg2; local
584 reg2 = s5h1409_readreg(state, 0xad);
588 (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)));
606 u16 reg, reg1, reg2; local
615 reg2 = s5h1409_readreg(state, 0xad);
619 (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)));
H A Dsi21xx.c485 u8 reg2[2]; local
517 reg2[0] =
523 reg2[1] = 0;
528 status |= si21_writeregs(state, TS_CTRL_REG_1, reg2, 0x02);
/drivers/ide/
H A Dali14xx.c72 static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = { member in struct:__anon891
139 outReg(param2, regTab[driveNum].reg2);
/drivers/power/
H A Dwm831x_power.c220 int ret, reg1, reg2; local
231 reg2 = 0;
240 reg2 |= WM831X_CHG_OFF_MSK;
246 pdata->trickle_ilim, &reg2,
250 pdata->vsel, &reg2,
254 pdata->fast_ilim, &reg2,
262 pdata->timeout, &reg2,
286 reg2);
/drivers/staging/keucr/
H A Dsmilecc.c55 * reg2; * LP14,LP12,LP10,...
60 static void trans_result(BYTE reg2, BYTE reg3, BYTE *ecc1, BYTE *ecc2) argument
62 BYTE a; /* Working for reg2,reg3 */
72 if ((reg2&a) != 0)
83 if ((reg2&a) != 0)
103 BYTE reg2; /* LP14,LP12,L10,... */ local
106 reg1 = reg2 = reg3 = 0; /* Clear parameter */
112 reg2 ^= ~((BYTE)i); /* XOR with inv. of counter */
118 trans_result(reg2, reg3, ecc1, ecc2);
/drivers/media/common/tuners/
H A Dtda827x.c254 unsigned char reg2[2]; local
292 msg.buf = reg2;
294 reg2[0] = 0x80;
295 reg2[1] = 0;
298 reg2[0] = 0x60;
299 reg2[1] = 0xbf;
302 reg2[0] = 0x30;
303 reg2[1] = tuner_reg[4] + 0x80;
307 reg2[0] = 0x30;
308 reg2[
[all...]
/drivers/gpu/drm/nouveau/
H A Dnouveau_hw.c221 uint32_t reg2 = reg1 + ((reg1 == NV_RAMDAC_VPLL2) ? 0x5c : 0x70); local
223 uint32_t oldpll2 = !nv3035 ? NVReadRAMDAC(dev, 0, reg2) : 0;
283 NVWriteRAMDAC(dev, 0, reg2, pll2);
442 uint32_t reg2 = reg1 + (reg1 == NV_RAMDAC_VPLL2 ? 0x5c : 0x70); local
444 pll2 = nvReadMC(dev, reg2);
H A Dnv50_crtc.c334 uint32_t reg1, reg2; local
350 reg2 = nv_rd32(dev, pll.reg + 8) & 0x8000ff00;
353 nv_wr32(dev, pll.reg + 8, reg2 | (P << 28) | (M2 << 16) | N2);
/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_ctx.c205 u32 cap, reg, val, reg2; local
318 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
321 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
/drivers/net/irda/
H A Dnsc-ircc.c875 int reg1, reg2, irq, irqt, dma1, dma2; local
892 reg2 = inb(cfg_base+1);
893 info->fir_base = (reg1 << 8) | reg2;
913 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
/drivers/staging/rts_pstor/
H A Drtsx_card.c101 u8 reg1 = 0, reg2 = 0; local
104 rtsx_read_register(chip, 0xFF38, &reg2);
105 RTSX_DEBUGP("reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n", reg1, reg2);
106 if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
/drivers/net/wireless/rt2x00/
H A Drt2400pci.c1033 u32 reg, reg2; local
1054 rt2x00pci_register_read(rt2x00dev, PWRCSR1, &reg2);
1055 bbp_state = rt2x00_get_field32(reg2, PWRCSR1_BBP_CURR_STATE);
1056 rf_state = rt2x00_get_field32(reg2, PWRCSR1_RF_CURR_STATE);
H A Drt2500pci.c1187 u32 reg, reg2; local
1208 rt2x00pci_register_read(rt2x00dev, PWRCSR1, &reg2);
1209 bbp_state = rt2x00_get_field32(reg2, PWRCSR1_BBP_CURR_STATE);
1210 rf_state = rt2x00_get_field32(reg2, PWRCSR1_RF_CURR_STATE);
H A Drt2500usb.c1010 u16 reg2; local
1032 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1033 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1034 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
H A Drt73usb.c1390 u32 reg, reg2; local
1407 rt2x00usb_register_read(rt2x00dev, MAC_CSR12, &reg2);
1408 state = rt2x00_get_field32(reg2, MAC_CSR12_BBP_CURRENT_STATE);
H A Drt61pci.c1802 u32 reg, reg2; local
1819 rt2x00pci_register_read(rt2x00dev, MAC_CSR12, &reg2);
1820 state = rt2x00_get_field32(reg2, MAC_CSR12_BBP_CURRENT_STATE);
/drivers/video/i810/
H A Di810_main.c402 u16 reg2; local
405 reg2 = i810_readw(BLTCNTL, mmio) & ~0x30;
408 reg2 |= par->bltcntl;
410 i810_writew(BLTCNTL, mmio, reg2);
/drivers/ata/
H A Dpata_macio.c261 u32 reg2; /* Bits to set in second timing reg */ member in struct:pata_macio_timing
420 if (t == NULL || (t->reg1 == 0 && t->reg2 == 0)) {
428 priv->treg[adev->devno][1] |= t->reg2;
/drivers/media/video/
H A Dov6650.c313 uint8_t reg, reg2; local
325 ret = ov6650_reg_read(client, REG_RED, &reg2);
328 priv->red->val = reg2;
/drivers/net/ethernet/marvell/
H A Dskge.c788 u32 reg2; local
790 pci_read_config_dword(skge->hw->pdev, PCI_DEV_REG2, &reg2);
791 return 1 << (((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
H A Dsky2.c4256 u16 reg2; local
4258 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4259 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4460 u16 reg2; local
4462 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4463 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
/drivers/net/ethernet/qlogic/
H A Dqla3xxx.c977 u16 reg2; local
989 err = ql_mii_read_reg(qdev, PHY_ID_1_REG, &reg2);
996 if ((reg1 == 0xffff) || (reg2 == 0xffff)) {
1012 err = ql_mii_read_reg_ex(qdev, PHY_ID_1_REG, &reg2, miiAddr);
1024 qdev->phyType = getPhyType(qdev, reg1, reg2);

Completed in 1624 milliseconds

12