| /drivers/cpuidle/governors/ |
| H A D | ladder.c | 41 struct ladder_device_state states[CPUIDLE_STATE_MAX]; member in struct:ladder_device
56 ldev->states[old_idx].stats.promotion_count = 0;
57 ldev->states[old_idx].stats.demotion_count = 0;
80 last_state = &ldev->states[last_idx];
82 if (drv->states[last_idx].flags & CPUIDLE_FLAG_TIME_VALID) {
84 drv->states[last_idx].exit_latency;
92 drv->states[last_idx + 1].exit_latency <= latency_req) {
103 drv->states[last_idx].exit_latency > latency_req) {
107 if (drv->states[i].exit_latency <= latency_req)
144 state = &drv->states[
[all...] |
| /drivers/pinctrl/ |
| H A D | core.h | 53 * @states: a list of states for this device
59 struct list_head states; member in struct:pinctrl
65 * @node: list not for struct pinctrl's @states field
|
| /drivers/cpufreq/ |
| H A D | e_powersaver.c | 220 int states; local
360 /* Calc number of p-states supported */
362 states = max_multiplier - min_multiplier + 1;
364 states = 2;
368 + (states + 1) * sizeof(struct cpufreq_frequency_table),
|
| /drivers/net/ethernet/mellanox/mlx4/ |
| H A D | qp.c | 485 enum mlx4_qp_state states[] = { local
492 for (i = 0; i < ARRAY_SIZE(states) - 1; i++) {
494 context->flags |= cpu_to_be32(states[i + 1] << 28);
495 err = mlx4_qp_modify(dev, mtt, states[i], states[i + 1],
500 states[i + 1], err);
504 *qp_state = states[i + 1];
|
| /drivers/regulator/ |
| H A D | gpio-regulator.c | 48 struct gpio_regulator_state *states; member in struct:gpio_regulator_data
98 if (data->states[ptr].gpios == data->state)
99 return data->states[ptr].value;
112 if (data->states[ptr].value >= min &&
113 data->states[ptr].value <= max)
114 target = data->states[ptr].gpios;
143 return data->states[selector].value;
199 drvdata->states = kmemdup(config->states,
203 if (drvdata->states
[all...] |
| /drivers/acpi/ |
| H A D | sleep.c | 660 suspend_state_t states[] = { local
666 if (acpi_state < 6 && states[acpi_state])
667 return pm_suspend(states[acpi_state]);
679 * @d_min_p: used to store the upper limit of allowed states range
718 * state) we can use for the corresponding S-states. Otherwise, the
|
| /drivers/input/ |
| H A D | ff-memless.c | 62 struct ml_effect_state states[FF_MEMLESS_EFFECTS]; member in struct:ml_device
136 state = &ml->states[i];
340 state = &ml->states[i];
426 __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags);
437 struct ml_effect_state *state = &ml->states[effect_id];
468 struct ml_effect_state *state = &ml->states[effect->id];
542 ml->states[i].effect = &ff->effects[i];
|
| /drivers/iommu/ |
| H A D | amd_iommu_v2.c | 51 struct pri_queue pri[PRI_QUEUE_SIZE]; /* PRI tag states */
61 struct pasid_state **states; member in struct:device_state
192 root = dev_state->states;
386 free_pasid_states_level2(dev_state->states);
388 free_pasid_states_level1(dev_state->states);
392 free_page((unsigned long)dev_state->states);
782 dev_state->states = (void *)get_zeroed_page(GFP_KERNEL);
783 if (dev_state->states == NULL)
818 free_page((unsigned long)dev_state->states);
850 /* Get rid of any remaining pasid states */
[all...] |
| /drivers/infiniband/hw/cxgb3/ |
| H A D | iwch_cm.c | 51 static char *states[] = { variable
261 PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]);
286 PDBG("%s ep %p state %s\n", __func__, ep, states[state_read(&ep->com)]);
2063 states[ep->com.state], abrupt);
|
| /drivers/block/ |
| H A D | pktcdvd.c | 1542 static void pkt_count_states(struct pktcdvd_device *pd, int *states) argument
1548 states[i] = 0;
1552 states[pkt->state]++;
1596 int states[PACKET_NUM_STATES]; local
1597 pkt_count_states(pd, states);
1599 states[0], states[1], states[2], states[3],
1600 states[
2630 int states[PACKET_NUM_STATES]; local
[all...] |
| /drivers/infiniband/hw/cxgb4/ |
| H A D | cm.c | 48 static char *states[] = { variable
239 PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]);
264 PDBG("%s ep %p state %s\n", __func__, ep, states[state_read(&ep->com)]);
2414 states[ep->com.state], abrupt);
|
| /drivers/isdn/hardware/mISDN/ |
| H A D | hfcpci.c | 99 unsigned char states; member in struct:hfcPCI_hw
188 hc->hw.states = 1; /* G1 */
192 hc->hw.states = 2; /* F2 */
195 Write_hfc(hc, HFCPCI_STATES, HFCPCI_LOAD_STATE | hc->hw.states);
197 Write_hfc(hc, HFCPCI_STATES, hc->hw.states | 0x40); /* Deactivate */
|
| /drivers/power/ |
| H A D | abx500_chargalg.c | 109 static const char *states[] = { variable
304 states[di->charge_state],
306 states[state]);
1297 states[di->charge_state],
|
| /drivers/scsi/qla2xxx/ |
| H A D | qla_mbx.c | 1404 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states) argument
1422 /* Return firmware states. */
1423 states[0] = mcp->mb[1];
1425 states[1] = mcp->mb[2];
1426 states[2] = mcp->mb[3];
1427 states[3] = mcp->mb[4];
1428 states[4] = mcp->mb[5];
|
| /drivers/mtd/nand/ |
| H A D | nandsim.c | 214 /* After a command is input, the simulator goes to one of the following states */
229 #define STATE_CMD_MASK 0x0000000F /* command states mask */
231 /* After an address is input, the simulator goes to one of these states */
236 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
238 /* During data input/output the simulator is in these states */
240 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
246 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
264 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
281 * Maximum previous states which need to be saved. Currently saving is
312 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
377 uint32_t states[NS_OPER_STATES]; /* operation's states */ member in struct:nandsim_operations
[all...] |
| /drivers/scsi/ |
| H A D | aha152x.c | 447 * internal states of the host
659 * driver states
668 } states[] = { variable in typeref:struct:__anon4044
2542 DPRINTK(debug_phases, LEAD "start %s %s(%s)\n", CMDINFO(CURRENT_SC), states[STATE].name, states[PREVSTATE].name, states[LASTSTATE].name);
2548 if(PREVSTATE!=STATE && states[PREVSTATE].end)
2549 states[PREVSTATE].end(shpnt);
2556 if(states[PREVSTATE].spio && !states[STAT
[all...] |
| /drivers/scsi/lpfc/ |
| H A D | lpfc_hbadisc.c | 3955 static char *states[] = { local
3966 if (state < NLP_STE_MAX_STATE && states[state])
3967 strlcpy(buffer, states[state], size);
4168 * FC spec states we need 3 * ratov for CT requests
5861 /* Reset HBA FCF states after successful unregister FCF */
5919 /* Set proper HBA FCF states after successful unregister FCF */
|
| /drivers/staging/speakup/ |
| H A D | main.c | 1181 int i = 0, states, key_data_len; local
1189 states = (int)cp[1];
1190 key_data_len = (states + 1) * (num_keys + 1);
1199 /* get num_keys, states and data */
1200 cp1 += 2; /* now pointing at shift states */
1201 for (i = 1; i <= states; i++) {
1212 cp1 += states + 1;
|
| /drivers/gpu/drm/radeon/ |
| H A D | atombios.h | 2801 =0: Multiple power states supported from PowerPlay table.
2804 Bit[5]=1: Enable CDLW for all driver control power states. Max HT width is from SBIOS, while Min HT width is determined by display requirement.
2806 Bit[6]=1: High Voltage requested for all power states. In this case, voltage will be forced at 1.1v and powerplay table voltage drop/throttling request will be ignored.
7623 //how many states we have
7626 ATOM_PPLIB_STATE_V2 states[1]; member in struct:_StateArray
7642 //how many non-clock levels we have. normally should be same as number of states
7733 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
7748 // ATOM_PPLIB_VCE_State_Table states;
7779 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
7794 // ATOM_PPLIB_UVD_State_Table states;
[all...] |