Searched refs:start (Results 126 - 150 of 1532) sorted by relevance

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/arch/s390/kvm/
H A Ddiag.c20 unsigned long start, end; local
23 start = vcpu->run->s.regs.gprs[(vcpu->arch.sie_block->ipa & 0xf0) >> 4];
26 if (start & ~PAGE_MASK || end & ~PAGE_MASK || start > end
27 || start < 2 * PAGE_SIZE)
30 VCPU_EVENT(vcpu, 5, "diag release pages %lX %lX", start, end);
33 /* we checked for start > end above */
34 if (end < prefix || start >= prefix + 2 * PAGE_SIZE) {
35 gmap_discard(start, end, vcpu->arch.gmap);
37 if (start < prefi
[all...]
/arch/sh/kernel/cpu/sh5/
H A Dsetup-sh5.c38 .start = PHYS_PERIPHERAL_BLOCK + 0x01040000,
44 .start = IRQ_PRI,
49 .start = IRQ_CUI,
54 .start = IRQ_ATI,
80 .start = TMU0_BASE,
85 .start = IRQ_TUNI0,
108 .start = TMU1_BASE,
113 .start = IRQ_TUNI1,
135 .start = TMU2_BASE,
140 .start
[all...]
/arch/x86/pci/
H A Dbus_numa.c56 void __devinit update_res(struct pci_root_info *info, resource_size_t start, argument
62 if (start > end)
65 if (start == MAX_RESOURCE)
80 common_start = max(res->start, start);
85 final_start = min(res->start, start);
88 res->start = final_start;
102 res->start = start;
[all...]
/arch/blackfin/mach-bf548/boards/
H A Dezkit.c45 .start = 0x2C0C0000,
50 .start = IRQ_PG7,
91 .start = IRQ_EPPI0_ERR,
141 .start = IRQ_KEY,
172 .start = IRQ_CNT,
239 .start = UART0_DLL,
244 .start = IRQ_UART0_TX,
249 .start = IRQ_UART0_RX,
254 .start = IRQ_UART0_ERROR,
259 .start
[all...]
/arch/blackfin/mach-bf537/boards/
H A Dpnav10.c36 .start = 0x20310000, /* IO PORT */
40 .start = 0x20311000, /* Attribute Memory */
44 .start = IRQ_PF4,
48 .start = 6, /* Card Detect PF6 */
81 .start = 0x20300300,
86 .start = IRQ_PF7,
138 .start = 0x20300000,
142 .start = IRQ_PF7,
263 .start = SPI0_REGBASE,
268 .start
[all...]
/arch/blackfin/mach-bf533/boards/
H A DH8606.c45 .start = 0x20300000,
50 .start = 0x20300004,
55 .start = IRQ_PF10,
82 .start = 0x20300300,
86 .start = IRQ_PROG_INTB,
90 .start = IRQ_PF7,
110 .start = 0x20300000,
114 .start = IRQ_PF10,
197 .start = SPI0_REGBASE,
202 .start
[all...]
H A Dcm_bf533.c109 .start = SPI0_REGBASE,
114 .start = CH_SPI,
119 .start = IRQ_SPI,
161 .start = 0x20200300,
165 .start = IRQ_PF0,
187 .start = 0x20308000,
191 .start = IRQ_PF8,
219 .start = BFIN_UART_THR,
224 .start = IRQ_UART0_TX,
229 .start
[all...]
/arch/arm/mach-davinci/
H A Ddevices-da8xx.c177 .start = DA8XX_TPCC_BASE,
183 .start = DA8XX_TPTC0_BASE,
189 .start = DA8XX_TPTC1_BASE,
195 .start = IRQ_DA8XX_CCINT0,
200 .start = IRQ_DA8XX_CCERRINT,
208 .start = DA8XX_TPCC_BASE,
214 .start = DA8XX_TPTC0_BASE,
220 .start = DA8XX_TPTC1_BASE,
226 .start = DA850_TPCC1_BASE,
232 .start
[all...]
H A Ddevices.c53 .start = DAVINCI_I2C_BASE,
58 .start = IRQ_I2C,
81 .start = DAVINCI_ATA_BASE,
86 .start = IRQ_IDE,
129 .start = DAVINCI_MMCSD0_BASE,
135 .start = IRQ_MMCINT,
139 .start = IRQ_SDIOINT,
144 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
147 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
167 .start
[all...]
H A Ddevices-tnetv107x.c93 .start = TNETV107X_TPCC_BASE,
99 .start = TNETV107X_TPTC0_BASE,
105 .start = TNETV107X_TPTC1_BASE,
111 .start = IRQ_TNETV107X_TPCC,
116 .start = IRQ_TNETV107X_TPCC_ERR,
170 .start = TNETV107X_SDIO0_BASE,
175 .start = IRQ_TNETV107X_MMC0,
179 .start = IRQ_TNETV107X_SDIO0,
183 .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
187 .start
[all...]
/arch/arm/mach-omap1/
H A Dgpio7xx.c32 .start = OMAP1_MPUIO_VBASE,
37 .start = INT_7XX_MPUIO,
74 .start = OMAP7XX_GPIO1_BASE,
79 .start = INT_7XX_GPIO_BANK1,
114 .start = OMAP7XX_GPIO2_BASE,
119 .start = INT_7XX_GPIO_BANK2,
143 .start = OMAP7XX_GPIO3_BASE,
148 .start = INT_7XX_GPIO_BANK3,
172 .start = OMAP7XX_GPIO4_BASE,
177 .start
[all...]
/arch/frv/mb93090-mb00/
H A Dpci-frv.c39 resource_size_t start = res->start; local
41 if ((res->flags & IORESOURCE_IO) && (start & 0x300))
42 start = (start + 0x3ff) & ~0x3ff;
44 return start;
95 if (!r->start)
117 if (!r->start) /* Address not assigned at all */
125 r->start, r->end, r->flags, disabled, pass);
128 r->end -= r->start;
[all...]
/arch/mips/mm/
H A Dtlb-r8k.c62 void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, argument
73 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
88 start &= PAGE_MASK;
91 while (start < end) {
94 write_c0_vaddr(start);
95 write_c0_entryhi(start);
96 start += PAGE_SIZE;
112 void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) argument
116 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
128 start
[all...]
/arch/mips/bcm63xx/
H A Ddev-pcmcia.c22 /* start & end filled at runtime */
28 .start = BCM_PCMCIA_COMMON_BASE_PA,
33 .start = BCM_PCMCIA_ATTR_BASE_PA,
38 .start = BCM_PCMCIA_IO_BASE_PA,
45 /* start filled at runtime */
51 .start = BCM_PCMCIA_IO_BASE_PA,
125 pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
126 pcmcia_resources[0].end = pcmcia_resources[0].start +
128 pcmcia_resources[4].start = bcm63xx_get_irq_number(IRQ_PCMCIA);
/arch/mips/vr41xx/common/
H A Dgiu.c32 .start = 0x0b000100,
37 .start = 0x0b0002e0,
42 .start = GIUINT_IRQ,
50 .start = 0x0f000140,
55 .start = GIUINT_IRQ,
63 .start = 0x0f000140,
68 .start = GIUINT_IRQ,
/arch/sh/include/asm/
H A Dcacheflush.h15 * - flush_cache_range(vma, start, end) flushes a range of pages
18 * - flush_icache_range(start, end) flushes(invalidates) a range for icache
34 extern void (*__flush_wback_region)(void *start, int size);
35 extern void (*__flush_purge_region)(void *start, int size);
36 extern void (*__flush_invalidate_region)(void *start, int size);
44 unsigned long start, unsigned long end);
47 extern void flush_icache_range(unsigned long start, unsigned long end);
89 #define flush_cache_vmap(start, end) local_flush_cache_all(NULL)
90 #define flush_cache_vunmap(start, end) local_flush_cache_all(NULL)
/arch/x86/include/asm/
H A De820.h59 __u64 addr; /* start of memory segment */
84 extern int e820_any_mapped(u64 start, u64 end, unsigned type);
85 extern int e820_all_mapped(u64 start, u64 end, unsigned type);
86 extern void e820_add_region(u64 start, u64 size, int type);
90 extern u64 e820_update_range(u64 start, u64 size, unsigned old_type,
92 extern u64 e820_remove_range(u64 start, u64 size, unsigned old_type,
111 extern void early_memtest(unsigned long start, unsigned long end);
113 static inline void early_memtest(unsigned long start, unsigned long end) argument
/arch/x86/kernel/
H A Dtsc_sync.c47 cycles_t start, now, prev, end; local
51 start = get_cycles();
56 end = start + (cycles_t) tsc_khz * timeout;
57 now = start;
96 WARN(!(now-start),
98 now-start, end-start);
199 * source CPU to start the measurement:
/arch/x86/mm/
H A Ddump_pagetables.c205 * such as the start of vmalloc space etc.
223 pte_t *start; local
225 start = (pte_t *) pmd_page_vaddr(addr);
227 pgprot_t prot = pte_pgprot(*start);
231 start++;
241 pmd_t *start; local
243 start = (pmd_t *) pud_page_vaddr(addr);
246 if (!pmd_none(*start)) {
247 pgprotval_t prot = pmd_val(*start) & PTE_FLAGS_MASK;
249 if (pmd_large(*start) || !pmd_presen
272 pud_t *start; local
302 pgd_t *start = (pgd_t *) &init_level4_pgt; local
[all...]
/arch/unicore32/kernel/
H A Dsetup.c69 .start = 0,
75 .start = 0,
130 static int __init uc32_add_memory(unsigned long start, unsigned long size) argument
136 "ignoring memory at %#lx\n", start);
141 * Ensure that start/size are aligned to a page boundary.
142 * Size is appropriately rounded down, start is rounded up.
144 size -= start & ~PAGE_MASK;
146 bank->start = PAGE_ALIGN(start);
161 * Pick out the memory size. We look for mem=size@start,
167 unsigned long size, start; local
[all...]
/arch/m68k/include/asm/
H A Dcacheflush_mm.h20 static inline void flush_cf_icache(unsigned long start, unsigned long end) argument
24 for (set = start; set <= end; set += (0x10 - 3)) {
38 static inline void flush_cf_dcache(unsigned long start, unsigned long end) argument
42 for (set = start; set <= end; set += (0x10 - 3)) {
56 static inline void flush_cf_bcache(unsigned long start, unsigned long end) argument
60 for (set = start; set <= end; set += (0x10 - 3)) {
151 #define flush_cache_vmap(start, end) flush_cache_all()
152 #define flush_cache_vunmap(start, end) flush_cache_all()
165 unsigned long start,
184 unsigned long addr, start, en local
164 flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) argument
[all...]
/arch/arm/mach-dove/
H A Dmpp.c19 int start; member in struct:dove_mpp_grp
26 .start = 24,
30 .start = 40,
34 .start = 46,
38 .start = 58,
42 .start = 62,
49 static void dove_mpp_gpio_mode(int start, int end, int gpio_mode) argument
53 for (i = start; i <= end; i++)
139 dove_mpp_gpio_mode(dove_mpp_grp[num].start,
/arch/cris/arch-v32/drivers/pci/
H A Dbios.c48 resource_size_t start = res->start; local
50 if ((res->flags & IORESOURCE_IO) && (start & 0x300))
51 start = (start + 0x3ff) & ~0x3ff;
53 return start;
70 if (!r->start && r->end) {
79 if (dev->resource[PCI_ROM_RESOURCE].start)
122 if (!r->start && r->end)
/arch/ia64/sn/pci/pcibr/
H A Dpcibr_ate.c20 static void mark_ate(struct ate_resource *ate_resource, int start, int number, argument
27 for (index = start; length < number; index++, length++)
35 static int find_free_ate(struct ate_resource *ate_resource, int start, argument
42 for (index = start; index < ate_resource->num_ate;) {
47 start_free = index; /* Found start free ate */
70 int start)
72 mark_ate(ate_resource, start, ate_resource->ate[start], 0);
73 if ((ate_resource->lowest_free_index > start) ||
75 ate_resource->lowest_free_index = start;
69 free_ate_resource(struct ate_resource *ate_resource, int start) argument
[all...]
/arch/m32r/include/asm/
H A Dcacheflush.h13 #define flush_cache_range(vma, start, end) do { } while (0)
20 #define flush_icache_range(start, end) _flush_cache_copyback_all()
26 #define flush_icache_range(start, end) smp_flush_cache_all()
35 #define flush_cache_range(vma, start, end) do { } while (0)
41 #define flush_icache_range(start, end) _flush_cache_all()
49 #define flush_cache_range(vma, start, end) do { } while (0)
55 #define flush_icache_range(start, end) do { } while (0)
61 #define flush_cache_vmap(start, end) do { } while (0)
62 #define flush_cache_vunmap(start, end) do { } while (0)

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