/drivers/watchdog/ |
H A D | it87_wdt.c | 138 static unsigned int base, gpact, ciract, max_units, chip_type; variable 258 inb(base); 261 outb(0x55, CIR_DR(base)); 646 base = superio_inw(BASEREG); 647 if (!base) { 648 base = GP_BASE_DEFAULT; 649 superio_outw(base, BASEREG); 653 if (request_region(base, 1, WATCHDOG_NAME)) 664 base, CIR_BASE); 671 base [all...] |
/drivers/isdn/hardware/avm/ |
H A D | b1.c | 102 int b1_detect(unsigned int base, enum avmcardtype cardtype) argument 109 if ((inb(base + B1_INSTAT) & 0xfc) 110 || (inb(base + B1_OUTSTAT) & 0xfc)) 115 b1outp(base, B1_INSTAT, 0x2); /* enable irq */ 116 /* b1outp(base, B1_OUTSTAT, 0x2); */ 117 if ((inb(base + B1_INSTAT) & 0xfe) != 0x2 118 /* || (inb(base + B1_OUTSTAT) & 0xfe) != 0x2 */) 123 b1outp(base, B1_INSTAT, 0x0); /* disable irq */ 124 b1outp(base, B1_OUTSTAT, 0x0); 125 if ((inb(base 157 unsigned int base = card->port; local 198 unsigned int base = card->port; local 247 unsigned int base = card->port; local [all...] |
/drivers/mmc/host/ |
H A D | pxamci.c | 54 void __iomem *base; member in struct:pxamci_host 135 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) { 139 writel(STOP_CLOCK, host->base + MMC_STRPCL); 142 v = readl(host->base + MMC_STAT); 159 writel(host->imask, host->base + MMC_I_MASK); 169 writel(host->imask, host->base + MMC_I_MASK); 187 writel(nob, host->base + MMC_NOB); 188 writel(data->blksz, host->base + MMC_BLKLEN); 193 writel((timeout + 255) / 256, host->base + MMC_RDTO); 277 writel(cmd->opcode, host->base [all...] |
H A D | mxs-mmc.c | 147 void __iomem *base; member in struct:mxs_mmc_host 185 return !(readl(host->base + HW_SSP_STATUS) & 193 mxs_reset_block(host->base); 209 host->base + HW_SSP_TIMING); 216 writel(ctrl0, host->base + HW_SSP_CTRL0); 217 writel(ctrl1, host->base + HW_SSP_CTRL1); 231 cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0); 232 cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1); 233 cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2); 234 cmd->resp[0] = readl(host->base [all...] |
/drivers/crypto/amcc/ |
H A D | crypto4xx_alg.c | 74 struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); 81 return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, 88 struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); 95 return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, 238 struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); 244 __crypto_ahash_cast(req->base.tfm)); 255 struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); 262 return crypto4xx_build_pd(&req->base, ctx, req->src, 274 struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); 280 return crypto4xx_build_pd(&req->base, ct [all...] |
/drivers/gpio/ |
H A D | gpio-cs5535.c | 47 resource_size_t base; member in struct:cs5535_gpio_chip 62 unsigned long addr = chip->base + 0x80 + reg; 87 outl(1 << offset, chip->base + reg); 109 outl(1 << (offset + 16), chip->base + reg); 135 val = inl(chip->base + reg); 138 val = inl(chip->base + 0x80 + reg); 181 val = inl(chip->base + offset); 193 outl(val, chip->base + offset); 290 .base = 0, 309 /* There are two ways to get the GPIO base addres [all...] |
/drivers/gpu/drm/udl/ |
H A D | udl_modeset.c | 61 static char *udl_set_base16bpp(char *wrptr, u32 base) argument 63 /* the base pointer is 16 bits wide, 0x20 is hi byte. */ 64 wrptr = udl_set_register(wrptr, 0x20, base >> 16); 65 wrptr = udl_set_register(wrptr, 0x21, base >> 8); 66 return udl_set_register(wrptr, 0x22, base); 73 static char *udl_set_base8bpp(char *wrptr, u32 base) argument 75 wrptr = udl_set_register(wrptr, 0x26, base >> 16); 76 wrptr = udl_set_register(wrptr, 0x27, base >> 8); 77 return udl_set_register(wrptr, 0x28, base); 297 /* This first section has to do with setting the base addres [all...] |
/drivers/misc/sgi-xp/ |
H A D | xpc_partition.c | 41 xpc_kmalloc_cacheline_aligned(size_t size, gfp_t flags, void **base) argument 44 *base = kmalloc(size, flags); 45 if (*base == NULL) 48 if ((u64)*base == L1_CACHE_ALIGN((u64)*base)) 49 return *base; 51 kfree(*base); 54 *base = kmalloc(size + L1_CACHE_BYTES, flags); 55 if (*base == NULL) 58 return (void *)L1_CACHE_ALIGN((u64)*base); [all...] |
/drivers/net/ethernet/natsemi/ |
H A D | ibmlana.c | 143 printk(" %02x", readb(priv->base + start + z)); 164 static void getaddrs(struct mca_device *mdev, int *base, int *memlen, argument 172 *base = 0xc0000 + ((pos1 & 0xf0) << 9); 244 memset_io(priv->base, 0xaa, 264 memcpy_toio(priv->base + addr, &tda, sizeof(tda_t)); 284 memcpy_toio(priv->base + raddr, &rra, sizeof(rra_t)); 296 memcpy_toio(priv->base + addr, &rda, sizeof(rda_t)); 434 memcpy_toio(priv->base, cams, sizeof(camentry_t) * camcnt); 435 memcpy_toio(priv->base + (sizeof(camentry_t) * camcnt), &cammask, sizeof(cammask)); 571 memcpy_fromio(&rda, priv->base 924 int base = 0, irq = 0, iobase = 0, memlen = 0; local [all...] |
/drivers/video/ |
H A D | sa1100fb.c | 708 if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 || 709 readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 || 710 readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 || 711 readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 || 712 readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 || 713 readl_relaxed(fbi->base + DBAR2) != fbi->dbar2) 795 writel_relaxed(fbi->reg_lccr3, fbi->base + LCCR3); 796 writel_relaxed(fbi->reg_lccr2, fbi->base + LCCR2); 797 writel_relaxed(fbi->reg_lccr1, fbi->base + LCCR1); 798 writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base [all...] |
/drivers/scsi/arm/ |
H A D | eesox.c | 74 void __iomem *base; member in struct:eesoxscsi_info 194 static void eesoxscsi_buffer_in(void *buf, int length, void __iomem *base) argument 196 const void __iomem *reg_fas = base + EESOX_FAS216_OFFSET; 197 const void __iomem *reg_dmastat = base + EESOX_DMASTAT; 198 const void __iomem *reg_dmadata = base + EESOX_DMADATA; 272 static void eesoxscsi_buffer_out(void *buf, int length, void __iomem *base) argument 274 const void __iomem *reg_fas = base + EESOX_FAS216_OFFSET; 275 const void __iomem *reg_dmastat = base + EESOX_DMASTAT; 276 const void __iomem *reg_dmadata = base + EESOX_DMADATA; 358 eesoxscsi_buffer_in(SCp->ptr, SCp->this_residual, info->base); 523 void __iomem *base; local [all...] |
/drivers/ata/ |
H A D | sata_svw.c | 78 /* DMA base */ 81 /* SCRs base */ 395 static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base) argument 397 port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET; 398 port->data_addr = base + K2_SATA_TF_DATA_OFFSET; 400 port->error_addr = base + K2_SATA_TF_ERROR_OFFSET; 401 port->nsect_addr = base + K2_SATA_TF_NSECT_OFFSET; 402 port->lbal_addr = base + K2_SATA_TF_LBAL_OFFSET; 403 port->lbam_addr = base + K2_SATA_TF_LBAM_OFFSET; 404 port->lbah_addr = base [all...] |
/drivers/isdn/hardware/eicon/ |
H A D | s_4bri.c | 48 byte __iomem *base; local 58 base = DIVA_OS_MEM_ATTACH_CONTROL(IoAdapter); 61 TrapID = READ_DWORD(&base[0x80]); 65 dump_trap_frame(IoAdapter, &base[0x90]); 69 regs[0] = READ_DWORD((base + offset) + 0x70); 70 regs[1] = READ_DWORD((base + offset) + 0x74); 71 regs[2] = READ_DWORD((base + offset) + 0x78); 72 regs[3] = READ_DWORD((base + offset) + 0x7c); 79 DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base); 86 memcpy_fromio(Xlog, &base[reg [all...] |
/drivers/char/tpm/ |
H A D | tpm.h | 76 unsigned long base; /* TPM base address */ member in struct:tpm_vendor_specific 135 static inline int tpm_read_index(int base, int index) argument 137 outb(index, base); 138 return inb(base+1) & 0xFF; 141 static inline void tpm_write_index(int base, int index, int value) argument 143 outb(index, base); 144 outb(value & 0xFF, base+1);
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H A D | tpm_atmel.c | 163 atmel_release_region(chip->vendor.base, 194 unsigned long base; local 201 if ((iobase = atmel_get_base_addr(&base, ®ion_size)) == NULL) { 208 (tpm_atmel.base, region_size, "tpm_atmel0") == NULL) ? 0 : 1; 222 chip->vendor.base = base; 233 atmel_release_region(base,
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/drivers/gpu/drm/gma500/ |
H A D | oaktrail_hdmi_i2c.c | 253 void *base; local 258 base = ioremap((resource_size_t)gpio_base, gpio_len); 259 if (base == NULL) { 264 temp = readl(base + 0x44); 266 writel((temp | 0x00000a00), (base + 0x44)); 267 temp = readl(base + 0x44); 270 iounmap(base);
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H A D | psb_intel_drv.h | 135 struct drm_encoder base; member in struct:psb_intel_encoder 150 struct drm_connector base; member in struct:psb_intel_connector 175 struct drm_crtc base; member in struct:psb_intel_crtc 201 container_of(x, struct psb_intel_crtc, base) 203 container_of(x, struct psb_intel_connector, base) 205 container_of(x, struct psb_intel_encoder, base) 207 container_of(x, struct psb_intel_framebuffer, base)
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H A D | psb_intel_sdvo.c | 69 struct psb_intel_encoder base; member in struct:psb_intel_sdvo 141 struct psb_intel_connector base; member in struct:psb_intel_sdvo_connector 196 return container_of(encoder, struct psb_intel_sdvo, base.base); 202 struct psb_intel_sdvo, base); 207 return container_of(to_psb_intel_connector(connector), struct psb_intel_sdvo_connector, base); 227 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 1423 psb_intel_sdvo->base.needs_tv_clock = false; 1427 psb_intel_sdvo->base [all...] |
/drivers/net/wireless/iwlwifi/ |
H A D | iwl-trans-pcie-rx.c | 595 u32 base; local 600 base = trans->shrd->device_pointers.error_event_table; 602 if (!base) 603 base = trans->shrd->fw->init_errlog_ptr; 605 if (!base) 606 base = trans->shrd->fw->inst_errlog_ptr; 609 if (!iwlagn_hw_valid_rtc_data_addr(base)) { 612 base, 618 iwl_read_targ_mem_words(trans, base, &table, sizeof(table)); 715 u32 base; /* SRA local 828 u32 base; /* SRAM byte address of event log header */ local [all...] |
/drivers/spi/ |
H A D | spi-ath79.c | 37 void __iomem *base; member in struct:ath79_spi 42 return ioread32(sp->base + reg); 47 iowrite32(val, sp->base + reg); 236 sp->base = ioremap(r->start, resource_size(r)); 237 if (!sp->base) { 249 iounmap(sp->base); 262 iounmap(sp->base);
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/drivers/staging/usbip/ |
H A D | vhci_rx.c | 74 urb = pickup_urb_and_free_priv(vdev, pdu->base.seqnum); 78 pr_err("cannot find a urb of seqnum %u\n", pdu->base.seqnum); 124 if (unlink->seqnum == pdu->base.seqnum) { 151 pdu->base.seqnum); 166 pdu->base.seqnum); 240 switch (pdu.base.command) { 249 pr_err("unknown pdu %u\n", pdu.base.command);
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/drivers/acpi/acpica/ |
H A D | utmisc.c | 722 acpi_status acpi_ut_strtoul64(char *string, u32 base, u64 * ret_integer) argument 728 u32 to_integer_op = (base == ACPI_ANY_BASE); 736 switch (base) { 763 base = 16; 768 base = 10; 796 } else if (base == 10) { 842 base, "ient, NULL); 852 return_value *= base; 870 if (base == 10) {
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/drivers/base/regmap/ |
H A D | regcache.c | 411 bool regcache_set_val(void *base, unsigned int idx, argument 416 u8 *cache = base; 423 u16 *cache = base; 430 u32 *cache = base; 442 unsigned int regcache_get_val(const void *base, unsigned int idx, argument 445 if (!base) 450 const u8 *cache = base; 454 const u16 *cache = base; 458 const u32 *cache = base;
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/drivers/gpu/drm/i915/ |
H A D | i915_gem_execbuffer.c | 166 if (obj->base.pending_write_domain == 0) 167 obj->base.pending_read_domains |= obj->base.read_domains; 175 if (obj->base.write_domain && 176 (((obj->base.write_domain != obj->base.pending_read_domains || 179 flush_domains |= obj->base.write_domain; 181 obj->base.pending_read_domains & ~obj->base.write_domain; 187 invalidate_domains |= obj->base [all...] |
H A D | intel_dvo.c | 81 struct intel_encoder base; member in struct:intel_dvo 91 return container_of(encoder, struct intel_dvo, base.base); 97 struct intel_dvo, base); 363 intel_encoder = &intel_dvo->base; 364 drm_encoder_init(dev, &intel_encoder->base, 369 struct drm_connector *connector = &intel_connector->base; 423 drm_encoder_helper_add(&intel_encoder->base, 444 drm_encoder_cleanup(&intel_encoder->base);
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