Searched refs:byte (Results 226 - 250 of 283) sorted by relevance

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/drivers/i2c/busses/
H A Di2c-i801.c316 /* Use 32-byte buffer to process this transaction */
520 outb_p(data->byte, SMBHSTDAT0(priv));
586 data->byte = inb_p(SMBHSTDAT0(priv));
H A Di2c-pxa.c107 #define ICR_TB (1 << 3) /* transfer byte bit */
499 writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c)); /* allow next byte */
505 unsigned int byte = readl(_IDBR(i2c)); local
508 i2c->slave->write(i2c->slave->data, byte);
870 * Read mode. We have just sent the address byte, and
880 * Write mode. Write the next data byte.
887 * If this is the last byte of the last message, send
903 * go back and try to send the next byte. Note that
915 * And trigger a repeated start, and send the byte.
942 * Read the byte
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/drivers/net/wireless/ath/ath6kl/
H A Dsdio.c135 unsigned char byte)
140 ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
289 /* Fixup the address so that the last byte will fall on MBOX EOM */
957 /* set the window address register (using 4-byte register access ). */
971 * Fill the buffer with the address byte value we want to
977 * Hit each byte of the register address with a 4-byte
996 * 4-byte value. The effect here is that the LSB write causes the
997 * cycle to start, the extra 3 byte write to bytes 1,2,3 has no
1070 * Hit the credit counter with a 4-byte acces
133 ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, unsigned int address, unsigned char byte) argument
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H A Dmain.c673 stats->tx_byte += le32_to_cpu(tgt_stats->stats.tx.byte);
698 stats->rx_byte += le32_to_cpu(tgt_stats->stats.rx.byte);
/drivers/usb/atm/
H A Dspeedtch.c117 module_param(ModemMode, byte, S_IRUGO | S_IWUSR);
121 module_param_array(ModemOption, byte, &num_ModemOption, S_IRUGO);
/drivers/video/
H A DKconfig137 byte order to bytes in long order.
/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c233 u32 offset, u8 byte);
524 /* flash_base_addr is byte-aligned */
2082 * Reads signature byte from the NVM using the flash access registers.
2326 * e1000_read_flash_byte_ich8lan - Read byte from flash
2328 * @offset: The offset of the byte to read.
2329 * @data: Pointer to a byte to store the value read.
2331 * Reads a single byte from the NVM using the flash access registers.
2349 * e1000_read_flash_data_ich8lan - Read byte or word from NVM
2351 * @offset: The offset (in bytes) of the byte or word to read.
2352 * @size: Size of data to read, 1=byte
2800 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u8 byte) argument
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/drivers/scsi/
H A Dmegaraid.c133 * Allocates a 8 byte aligned memory for the handshake mailbox.
765 * 6-byte READ(0x08) or WRITE(0x0A) cdb
795 * 10-byte READ(0x28) or WRITE(0x2A) cdb
821 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1188 u8 byte; local
1240 while (!((byte = irq_state(adapter)) & INTR_VALID))
1243 set_irq_state(adapter, byte);
1274 u8 byte; local
1285 byte = irq_state(adapter);
1286 if( (byte
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/drivers/media/video/uvc/
H A Duvc_ctrl.c709 __u8 byte = *data & mask; local
710 value |= offset > 0 ? (byte >> offset) : (byte << (-offset));
/drivers/mtd/nand/
H A Ddiskonchip.c416 uint8_t byte[4]; member in union:__anon1794
429 if (((ident.byte[0] << 8) | ident.byte[1]) == ret) {
/drivers/net/ethernet/amd/
H A Ddepca.c73 NICSR accesses have been changed to byte accesses for all the cards
87 and 0x200). The I/O address is detected by searching for a byte sequence
1048 skb_reserve(skb, 2); /* 16 byte align the IP header */
1273 int i, j, bit, byte; local
1293 byte = hashcode >> 3; /* bit[3-5] -> byte in filter */
1294 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1295 lp->init_block.mcast_table[byte] |= bit;
/drivers/net/ethernet/sgi/
H A Dioc3-eth.c277 * Read a byte from an iButton device
291 * Write a byte to an iButton device
293 static void nic_write_byte(struct ioc3 *ioc3, int byte) argument
298 bit = byte & 1;
299 byte >>= 1;
/drivers/net/irda/
H A Dnsc-ircc.c1630 /* Transmit next byte */
1929 __u8 byte; local
1936 byte = inb(iobase+RXD);
1938 &self->rx_buff, byte);
/drivers/staging/panel/
H A Dpanel.c730 /* send a serial byte to the LCD panel. The caller is responsible for locking
732 static void lcd_send_serial(int byte) argument
741 bits.da = byte & 1;
747 byte >>= 1;
/drivers/i2c/
H A Di2c-dev.c358 datasize = sizeof(data_arg.data->byte);
/drivers/infiniband/hw/ehca/
H A Dehca_qp.c1524 mqpcb->dest_gid.byte[cnt] =
1634 mqpcb->dest_gid_al.byte[cnt] =
2001 qpcb->dest_gid.byte[cnt];
2021 qpcb->dest_gid_al.byte[cnt];
/drivers/net/ethernet/sfc/
H A Dnet_driver.h627 u8 byte[EFX_MCAST_HASH_ENTRIES / 8]; member in union:efx_multicast_hash
1103 * The 10G MAC requires 8-byte alignment on the frame
/drivers/net/wireless/
H A Dat76c50x-usb.c870 priv->mib_buf.data.byte = priv->pm_mode;
887 priv->mib_buf.data.byte = type;
937 priv->mib_buf.data.byte = onoff;
1496 priv->mib_buf.data.byte = priv->promisc ? 1 : 0;
/drivers/net/wireless/rtlwifi/rtl8192se/
H A Dfw.c378 firmware->firmwareversion = byte(pfwheader->version, 0);
/drivers/scsi/be2iscsi/
H A Dbe_cmds.h206 * as a byte - used to calculate offset/shift/mask of each field
365 * as a byte - used to calculate offset/shift/mask of each field
407 * as a byte - used to calculate offset/shift/mask of each field
456 u8 byte[ETH_ALEN]; member in struct:macaddr
862 /* Returns byte size of given field with a structure. */
/drivers/net/wireless/bcmdhd/
H A Ddhd_sdio.c1495 DHD_ERROR(("%s: couldn't allocate new %d-byte packet\n",
1521 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1541 /* 2byte frame length, 1byte-, 1byte frame flag,
1542 * 2byte-hdrlength, 2byte padlenght
1574 /* 2byte frame length, 1byte
6296 uint byte, tag, tdata; local
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/drivers/media/video/gspca/
H A Dsunplus.c295 * except for one byte. Possibly a typo?
350 /* write one byte */
355 u16 byte)
361 gspca_dev->usb_buf[0] = byte;
351 reg_w_1(struct gspca_dev *gspca_dev, u8 req, u16 value, u16 index, u16 byte) argument
/drivers/mmc/host/
H A Dmmc_spi.c197 unsigned n, u8 byte)
211 if (cp[i] != byte)
242 * hosts return! The low byte holds R1_SPI bits. The next byte may hold
245 * cmd->resp[1] holds any four-byte response, for R3 (READ_OCR) and on
278 * command and the first byte we read after it. We ignore that
279 * first byte. After STOP_TRANSMISSION command it may include
292 * status byte ... and we already scanned 2 bytes.
294 * REVISIT block read paths use nasty byte-at-a-time I/O
318 /* read the next byte */
196 mmc_spi_skip(struct mmc_spi_host *host, unsigned long timeout, unsigned n, u8 byte) argument
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/drivers/net/ethernet/sun/
H A Dsunbmac.c105 /* 64byte bursts do not work at the moment, do
340 unsigned int byte)
345 write_tcvr_bit(bp, tregs, ((byte >> shift) & 1));
338 put_tcvr_byte(struct bigmac *bp, void __iomem *tregs, unsigned int byte) argument
/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.c104 * byte a few times before giving up as a workaround
590 * The IO flag condition entry has 2 bytes for the CRTC port; 1 byte
591 * for the CRTC index; 1 byte for the mask to apply to the value
592 * retrieved from the CRTC; 1 byte for the shift right to apply to the
594 * which the shifted value is added; 1 byte for the mask applied to the
595 * value read from the flag array; and 1 byte for the value to compare
596 * against the masked byte from the flag table.
655 * The IO condition entry has 2 bytes for the IO port address; 1 byte
656 * for the index to write to io_port; 1 byte for the mask to apply to
657 * the byte rea
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