Searched refs:PHASE_MASK (Results 1 - 17 of 17) sorted by relevance

/drivers/scsi/
H A DNCR5380.c470 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && (phases[i].value != (status & PHASE_MASK)); ++i);
1633 if ((tmp & PHASE_MASK) != p) {
1697 *phase = tmp & PHASE_MASK;
1721 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1769 if ((tmp & PHASE_MASK) != PHASE_MSGOUT) {
1828 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1953 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
2065 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
2114 phase = (tmp & PHASE_MASK);
H A DNCR5380.h199 #define PHASE_MASK (SR_MSG | SR_CD | SR_IO) macro
H A Datari_NCR5380.c623 (phases[i].value != (status & PHASE_MASK)); ++i)
1254 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
1768 if ((tmp & PHASE_MASK) != p) {
1841 *phase = tmp & PHASE_MASK;
1883 if ((tmp & PHASE_MASK) != PHASE_MSGOUT) {
1937 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
2022 phase = (tmp & PHASE_MASK);
H A Dsun3_NCR5380.c570 (phases[i].value != (status & PHASE_MASK)); ++i);
1713 if ((tmp & PHASE_MASK) != p) {
1785 *phase = tmp & PHASE_MASK;
1826 if ((tmp & PHASE_MASK) != PHASE_MSGOUT) {
1958 phase = (tmp & PHASE_MASK);
H A Dg_NCR5380.c882 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && (phases[i].value != (status & PHASE_MASK)); ++i);
H A Daic7xxx_old.c5539 phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK) != P_MESGOUT;
5590 phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK ) != P_MESGIN;
6280 if ( ((aic_inb(p, LASTPHASE) & PHASE_MASK) != P_BUSFREE) &&
/drivers/scsi/aic7xxx_old/
H A Daic7xxx.reg114 mask PHASE_MASK CDI|IOI|MSGI
143 mask PHASE_MASK CDI|IOI|MSGI
1237 mask PHASE_MASK CDI|IOI|MSGI
H A Daic7xxx.seq1067 and LASTPHASE, PHASE_MASK, SCSISIGI;
1300 and SCSISIGO, PHASE_MASK, SCSISIGI;
1301 and LASTPHASE, PHASE_MASK, SCSISIGI ret;
H A Daic7xxx_reg.h251 #define PHASE_MASK 0xe0 macro
/drivers/scsi/aic7xxx/
H A Daic7xxx.reg132 mask PHASE_MASK CDI|IOI|MSGI
163 mask PHASE_MASK CDI|IOI|MSGI
1508 mask PHASE_MASK CDI|IOI|MSGI
H A Daic7xxx.seq1987 and LASTPHASE, PHASE_MASK, SCSISIGI;
2119 and SCSISIGO, PHASE_MASK, SCSISIGI;
2121 and LASTPHASE, PHASE_MASK, SCSISIGI ret;
H A Daic79xx.reg1747 enum PHASE_MASK CDO|IOO|MSGO {
1778 enum PHASE_MASK CDO|IOO|MSGO {
3867 enum PHASE_MASK CDO|IOO|MSGO {
H A Daic79xx.seq1416 and LASTPHASE, PHASE_MASK, SCSISIGI ret;
1443 and LASTPHASE, PHASE_MASK, SCSISIGI;
H A Daic7xxx_reg.h_shipped460 #define PHASE_MASK 0xe0
H A Daic7xxx_core.c1257 bus_phase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
1333 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
1629 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
3152 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
3243 bus_phase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
H A Daic79xx_core.c1898 bus_phase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
2082 bus_phase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
2711 curphase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
3335 curphase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
H A Daic79xx_reg.h_shipped2464 #define PHASE_MASK 0xe0

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