Searched refs:ah (Results 1 - 25 of 139) sorted by relevance

123456

/drivers/net/wireless/ath/ath9k/
H A Dhw-ops.h24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, argument
27 if (!ah->aspm_enabled)
30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
33 static inline void ath9k_hw_rxena(struct ath_hw *ah) argument
35 ath9k_hw_ops(ah)->rx_enable(ah);
38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, argument
41 ath9k_hw_ops(ah)->set_desc_link(ds, link);
44 static inline bool ath9k_hw_calibrate(struct ath_hw *ah, argument
52 ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked) argument
57 ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i) argument
63 ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, struct ath_tx_status *ts) argument
69 ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
75 ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
85 ath9k_hw_rf_set_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
91 ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
97 ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah) argument
105 ath9k_hw_rf_free_ext_banks(struct ath_hw *ah) argument
113 ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) argument
123 ath9k_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
129 ath9k_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
135 ath9k_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
141 ath9k_olc_init(struct ath_hw *ah) argument
149 ath9k_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
155 ath9k_hw_mark_phy_inactive(struct ath_hw *ah) argument
160 ath9k_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
166 ath9k_hw_rfbus_req(struct ath_hw *ah) argument
171 ath9k_hw_rfbus_done(struct ath_hw *ah) argument
176 ath9k_hw_restore_chainmask(struct ath_hw *ah) argument
184 ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
190 ath9k_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
196 ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
202 ath9k_hw_setup_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal) argument
208 ath9k_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
216 ath9k_hw_set_radar_params(struct ath_hw *ah) argument
[all...]
H A Dar9003_hw.c34 static void ar9003_hw_init_mode_regs(struct ath_hw *ah) argument
44 if (AR_SREV_9330_11(ah)) {
46 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
47 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
50 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
55 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
56 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
59 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
64 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
65 INIT_INI_ARRAY(&ah
456 ar9003_tx_gain_table_mode0(struct ath_hw *ah) argument
495 ar9003_tx_gain_table_mode1(struct ath_hw *ah) argument
534 ar9003_tx_gain_table_mode2(struct ath_hw *ah) argument
568 ar9003_tx_gain_table_mode3(struct ath_hw *ah) argument
602 ar9003_tx_gain_table_apply(struct ath_hw *ah) argument
621 ar9003_rx_gain_table_mode0(struct ath_hw *ah) argument
660 ar9003_rx_gain_table_mode1(struct ath_hw *ah) argument
699 ar9003_rx_gain_table_mode2(struct ath_hw *ah) argument
707 ar9003_rx_gain_table_apply(struct ath_hw *ah) argument
724 ar9003_hw_init_mode_gain_regs(struct ath_hw *ah) argument
739 ar9003_hw_configpcipowersave(struct ath_hw *ah, bool power_off) argument
774 ar9003_hw_attach_ops(struct ath_hw *ah) argument
[all...]
H A Dar9002_hw.c30 static void ar9002_hw_init_mode_regs(struct ath_hw *ah) argument
32 if (AR_SREV_9271(ah)) {
33 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
35 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
37 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
42 if (ah->config.pcie_clock_req)
43 INIT_INI_ARRAY(&ah->iniPcieSerdes,
47 INIT_INI_ARRAY(&ah->iniPcieSerdes,
51 if (AR_SREV_9287_11_OR_LATER(ah)) {
52 INIT_INI_ARRAY(&ah
160 ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah) argument
187 ar9280_20_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) argument
206 ar9271_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) argument
218 ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) argument
276 ar9002_hw_configpcipowersave(struct ath_hw *ah, bool power_off) argument
405 ar9002_hw_get_radiorev(struct ath_hw *ah) argument
424 ar9002_hw_rf_claim(struct ath_hw *ah) argument
452 ar9002_hw_enable_async_fifo(struct ath_hw *ah) argument
466 ar9002_hw_attach_ops(struct ath_hw *ah) argument
484 ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dhw.c28 static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
49 static void ath9k_hw_init_cal_settings(struct ath_hw *ah) argument
51 ath9k_hw_private_ops(ah)->init_cal_settings(ah);
54 static void ath9k_hw_init_mode_regs(struct ath_hw *ah) argument
56 ath9k_hw_private_ops(ah)->init_mode_regs(ah);
59 static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah, argument
62 return ath9k_hw_private_ops(ah)->compute_pll_control(ah, cha
65 ath9k_hw_init_mode_gain_regs(struct ath_hw *ah) argument
73 ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
86 ath9k_hw_set_clockrate(struct ath_hw *ah) argument
117 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) argument
124 ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) argument
145 ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array, int column, unsigned int *writecnt) argument
171 ath9k_hw_computetxtime(struct ath_hw *ah, u8 phy, int kbps, u32 frameLen, u16 rateix, bool shortPreamble) argument
224 ath9k_hw_get_channel_centers(struct ath_hw *ah, struct ath9k_channel *chan, struct chan_centers *centers) argument
258 ath9k_hw_read_revisions(struct ath_hw *ah) argument
310 ath9k_hw_disablepcie(struct ath_hw *ah) argument
328 ath9k_hw_aspm_init(struct ath_hw *ah) argument
337 ath9k_hw_chip_test(struct ath_hw *ah) argument
387 ath9k_hw_init_config(struct ath_hw *ah) argument
432 ath9k_hw_init_defaults(struct ath_hw *ah) argument
455 ath9k_hw_init_macaddr(struct ath_hw *ah) argument
476 ath9k_hw_post_init(struct ath_hw *ah) argument
516 ath9k_hw_attach_ops(struct ath_hw *ah) argument
525 __ath9k_hw_init(struct ath_hw *ah) argument
656 ath9k_hw_init(struct ath_hw *ah) argument
700 ath9k_hw_init_qos(struct ath_hw *ah) argument
721 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah) argument
746 ath9k_hw_init_pll(struct ath_hw *ah, struct ath9k_channel *chan) argument
883 ath9k_hw_init_interrupt_masks(struct ath_hw *ah, enum nl80211_iftype opmode) argument
940 ath9k_hw_set_sifs_time(struct ath_hw *ah, u32 us) argument
947 ath9k_hw_setslottime(struct ath_hw *ah, u32 us) argument
954 ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us) argument
961 ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us) argument
968 ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu) argument
982 ath9k_hw_init_global_settings(struct ath_hw *ah) argument
1079 ath9k_hw_deinit(struct ath_hw *ah) argument
1115 ath9k_hw_set_dma(struct ath_hw *ah) argument
1184 ath9k_hw_set_operating_mode(struct ath_hw *ah, int opmode) argument
1209 ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled, u32 *coef_mantissa, u32 *coef_exponent) argument
1226 ath9k_hw_set_reset(struct ath_hw *ah, int type) argument
1327 ath9k_hw_set_reset_power_on(struct ath_hw *ah) argument
1366 ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type) argument
1396 ath9k_hw_chip_reset(struct ath_hw *ah, struct ath9k_channel *chan) argument
1421 ath9k_hw_channel_change(struct ath_hw *ah, struct ath9k_channel *chan) argument
1492 ath9k_hw_apply_gpio_override(struct ath_hw *ah) argument
1506 ath9k_hw_check_alive(struct ath_hw *ah) argument
1544 ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan) argument
1599 ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_hw_cal_data *caldata, bool fastcc) argument
1887 ath9k_set_power_sleep(struct ath_hw *ah, int setChip) argument
1932 ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip) argument
1977 ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip) argument
2026 ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode) argument
2088 ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period) argument
2129 ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, const struct ath9k_beacon_state *bs) argument
2227 ath9k_hw_dfs_tested(struct ath_hw *ah) argument
2238 ath9k_hw_fill_cap_info(struct ath_hw *ah) argument
2463 ath9k_hw_gpio_cfg_output_mux(struct ath_hw *ah, u32 gpio, u32 type) argument
2491 ath9k_hw_cfg_gpio_input(struct ath_hw *ah, u32 gpio) argument
2513 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio) argument
2541 ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio, u32 ah_signal_type) argument
2563 ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val) argument
2580 ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna) argument
2590 ath9k_hw_getrxfilter(struct ath_hw *ah) argument
2604 ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits) argument
2631 ath9k_hw_phy_disable(struct ath_hw *ah) argument
2642 ath9k_hw_disable(struct ath_hw *ah) argument
2655 get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan) argument
2667 ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan, bool test) argument
2692 ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test) argument
2709 ath9k_hw_setopmode(struct ath_hw *ah) argument
2715 ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1) argument
2722 ath9k_hw_write_associd(struct ath_hw *ah) argument
2734 ath9k_hw_gettsf64(struct ath_hw *ah) argument
2754 ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64) argument
2761 ath9k_hw_reset_tsf(struct ath_hw *ah) argument
2772 ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting) argument
2781 ath9k_hw_set11nmac2040(struct ath_hw *ah) argument
2839 ath9k_hw_gettsf32(struct ath_hw *ah) argument
2845 ath_gen_timer_alloc(struct ath_hw *ah, void (*trigger)(void *), void (*overflow)(void *), void *arg, u8 timer_index) argument
2874 ath9k_hw_gen_timer_start(struct ath_hw *ah, struct ath_gen_timer *timer, u32 trig_timeout, u32 timer_period) argument
2925 ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) argument
2947 ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer) argument
2960 ath_gen_timer_isr(struct ath_hw *ah) argument
3065 ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len) argument
[all...]
H A Dar9003_rtt.h20 void ar9003_hw_rtt_enable(struct ath_hw *ah);
21 void ar9003_hw_rtt_disable(struct ath_hw *ah);
22 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);
23 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah);
24 void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table);
25 void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table);
26 void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);
H A Dar9002_calib.c29 static bool ar9002_hw_is_cal_supported(struct ath_hw *ah, argument
34 switch (ah->supp_cals & cal_type) {
44 !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
52 static void ar9002_hw_setup_calibration(struct ath_hw *ah, argument
55 struct ath_common *common = ath9k_hw_common(ah);
57 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
63 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
68 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
72 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
77 REG_SET_BIT(ah, AR_PHY_TIMING_CTRL
81 ar9002_hw_per_calibration(struct ath_hw *ah, struct ath9k_channel *ichan, u8 rxchainmask, struct ath9k_cal_list *currCal) argument
119 ar9002_hw_iqcal_collect(struct ath_hw *ah) argument
138 ar9002_hw_adc_gaincal_collect(struct ath_hw *ah) argument
162 ar9002_hw_adc_dccal_collect(struct ath_hw *ah) argument
186 ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) argument
263 ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains) argument
317 ar9002_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains) argument
371 ar9287_hw_olc_temp_compensation(struct ath_hw *ah) argument
401 ar9280_hw_olc_temp_compensation(struct ath_hw *ah) argument
431 ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
536 ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
640 ar9002_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
655 ar9002_hw_olc_temp_compensation(struct ath_hw *ah) argument
663 ar9002_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, u8 rxchainmask, bool longcal) argument
719 ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
759 ar9285_hw_clc(struct ath_hw *ah, struct ath9k_channel *chan) argument
815 ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
950 ar9002_hw_init_cal_settings(struct ath_hw *ah) argument
979 ar9002_hw_attach_calib_ops(struct ath_hw *ah) argument
[all...]
H A Dbtcoex.c54 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum) argument
56 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
71 if (AR_SREV_9300_20_OR_LATER(ah))
93 ah->hw_gen_timers.gen_timer_index[idx] = i;
98 void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah) argument
100 struct ath_common *common = ath9k_hw_common(ah);
101 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
111 if (AR_SREV_9462(ah)) {
113 } else if (AR_SREV_9300_20_OR_LATER(ah)) {
118 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
132 ath9k_hw_btcoex_init_2wire(struct ath_hw *ah) argument
154 ath9k_hw_btcoex_init_3wire(struct ath_hw *ah) argument
180 ath9k_hw_btcoex_init_mci(struct ath_hw *ah) argument
204 ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah) argument
213 ath9k_hw_btcoex_set_weight(struct ath_hw *ah, u32 bt_weight, u32 wlan_weight) argument
225 ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah) argument
263 ath9k_hw_btcoex_enable_mci(struct ath_hw *ah) argument
276 ath9k_hw_btcoex_enable(struct ath_hw *ah) argument
302 ath9k_hw_btcoex_disable(struct ath_hw *ah) argument
335 ar9003_btcoex_bt_stomp(struct ath_hw *ah, enum ath_stomp_type stomp_type) argument
352 ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah, enum ath_stomp_type stomp_type) argument
[all...]
H A Dhtc_drv_gpio.c33 struct ath_hw *ah = priv->ah; local
35 if (ath9k_hw_gpio_get(ah, ah->btcoex_hw.btpriority_gpio))
43 ath_dbg(ath9k_hw_common(ah), BTCOEX,
48 ath_dbg(ath9k_hw_common(ah), BTCOEX,
68 struct ath_common *common = ath9k_hw_common(priv->ah);
84 ath9k_hw_btcoex_bt_stomp(priv->ah, is_btscan ? ATH_BTCOEX_STOMP_ALL :
87 ath9k_hw_btcoex_enable(priv->ah);
104 struct ath_hw *ah local
138 struct ath_hw *ah = priv->ah; local
160 struct ath_hw *ah = priv->ah; local
172 struct ath_hw *ah = priv->ah; local
184 struct ath_hw *ah = priv->ah; local
317 struct ath_hw *ah = priv->ah; local
358 struct ath_hw *ah = priv->ah; local
[all...]
H A Dar5008_phy.c58 ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
60 static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array, argument
65 ENABLE_REGWRITE_BUFFER(ah);
68 REG_WRITE(ah, INI_RA(array, r, 0), data[r]);
72 REGWRITE_BUFFER_FLUSH(ah);
139 static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq) argument
141 struct ath_common *common = ath9k_hw_common(ah);
146 if (!AR_SREV_5416(ah) || synth_freq >= 3000)
149 BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
165 ar5008_hw_phy_modify_rx_buffer(ah
180 ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
261 ar5008_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
471 ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah) argument
504 ar5008_hw_rf_free_ext_banks(struct ath_hw *ah) argument
537 ar5008_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) argument
616 ar5008_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
637 ar5008_hw_init_chain_masks(struct ath_hw *ah) argument
680 ar5008_hw_override_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
726 ar5008_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
760 ar5008_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
883 ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
903 ar5008_hw_mark_phy_inactive(struct ath_hw *ah) argument
908 ar5008_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
942 ar5008_hw_rfbus_req(struct ath_hw *ah) argument
949 ar5008_hw_rfbus_done(struct ath_hw *ah) argument
962 ar5008_restore_chainmask(struct ath_hw *ah) argument
972 ar9160_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
992 ar5008_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
1012 ar5008_hw_ani_control_old(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
1185 ar5008_hw_ani_control_new(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
1431 ar5008_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
1463 ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
1515 ar5008_hw_set_nf_limits(struct ath_hw *ah) argument
1525 ar5008_hw_set_radar_params(struct ath_hw *ah, struct ath_hw_radar_conf *conf) argument
1556 ar5008_hw_set_radar_conf(struct ath_hw *ah) argument
1570 ar5008_hw_attach_phy_ops(struct ath_hw *ah) argument
[all...]
H A Dar9003_rtt.c37 void ar9003_hw_rtt_enable(struct ath_hw *ah) argument
39 REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
42 void ar9003_hw_rtt_disable(struct ath_hw *ah) argument
44 REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
47 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask) argument
49 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
53 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah) argument
55 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
60 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
63 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTR
71 ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain, u32 index, u32 data28) argument
103 ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table) argument
111 ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index) argument
136 ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table) argument
144 ar9003_hw_rtt_clear_hist(struct ath_hw *ah) argument
[all...]
H A Dani.c107 static bool use_new_ani(struct ath_hw *ah) argument
109 return AR_SREV_9300_20_OR_LATER(ah) || modparam_force_new_ani;
112 static void ath9k_hw_update_mibstats(struct ath_hw *ah, argument
115 stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);
116 stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);
117 stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);
118 stats->rts_good += REG_READ(ah, AR_RTS_OK);
119 stats->beacons += REG_READ(ah, AR_BEACON_CNT);
122 static void ath9k_ani_restart(struct ath_hw *ah) argument
125 struct ath_common *common = ath9k_hw_common(ah);
157 ath9k_hw_ani_ofdm_err_trigger_old(struct ath_hw *ah) argument
226 ath9k_hw_ani_cck_err_trigger_old(struct ath_hw *ah) argument
262 ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel) argument
309 ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) argument
330 ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel) argument
371 ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah) argument
389 ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah) argument
446 ath9k_hw_ani_lower_immunity(struct ath_hw *ah) argument
469 ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning) argument
540 ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) argument
629 ath9k_hw_ani_read_counters(struct ath_hw *ah) argument
692 ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) argument
744 ath9k_enable_mib_counters(struct ath_hw *ah) argument
766 ath9k_hw_disable_mib_counters(struct ath_hw *ah) argument
785 ath9k_hw_proc_mib_event(struct ath_hw *ah) argument
823 ath9k_hw_ani_setup(struct ath_hw *ah) argument
840 ath9k_hw_ani_init(struct ath_hw *ah) argument
[all...]
H A Dar9003_phy.c45 * @ah: atheros hardware structure
68 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
75 ath9k_hw_get_channel_centers(ah, chan, &centers);
79 if (AR_SREV_9330(ah)) {
83 if (ah->is_clk_25mhz)
91 } else if (AR_SREV_9485(ah)) {
102 } else if (AR_SREV_9340(ah)) {
103 if (ah->is_clk_25mhz) {
116 if (AR_SREV_9340(ah) && ah
170 ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, struct ath9k_channel *chan) argument
256 ar9003_hw_spur_ofdm_clear(struct ath_hw *ah) argument
299 ar9003_hw_spur_ofdm(struct ath_hw *ah, int freq_offset, int spur_freq_sd, int spur_delta_phase, int spur_subchannel_sd) argument
360 ar9003_hw_spur_ofdm_work(struct ath_hw *ah, struct ath9k_channel *chan, int freq_offset) argument
408 ar9003_hw_spur_mitigate_ofdm(struct ath_hw *ah, struct ath9k_channel *chan) argument
454 ar9003_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
461 ar9003_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
478 ar9003_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
517 ar9003_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
546 ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) argument
580 ar9003_hw_override_ini(struct ath_hw *ah) argument
606 ar9003_hw_prog_ini(struct ath_hw *ah, struct ar5416IniArray *iniArr, int column) argument
634 ar9003_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
715 ar9003_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
732 ar9003_hw_mark_phy_inactive(struct ath_hw *ah) argument
737 ar9003_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
784 ar9003_hw_rfbus_req(struct ath_hw *ah) argument
795 ar9003_hw_rfbus_done(struct ath_hw *ah) argument
808 ar9003_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
1069 ar9003_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
1097 ar9003_hw_set_nf_limits(struct ath_hw *ah) argument
1122 ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
1175 ar9003_hw_set_radar_params(struct ath_hw *ah, struct ath_hw_radar_conf *conf) argument
1206 ar9003_hw_set_radar_conf(struct ath_hw *ah) argument
1220 ar9003_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
1245 ar9003_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
1271 ar9003_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
1334 ar9003_hw_attach_phy_ops(struct ath_hw *ah) argument
1372 ar9003_hw_bb_watchdog_config(struct ath_hw *ah) argument
1431 ar9003_hw_bb_watchdog_read(struct ath_hw *ah) argument
1447 ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) argument
1486 ar9003_hw_disable_phy_restart(struct ath_hw *ah) argument
[all...]
H A Dar9003_mci.c23 static void ar9003_mci_reset_req_wakeup(struct ath_hw *ah) argument
25 REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
28 REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
32 static int ar9003_mci_wait_for_interrupt(struct ath_hw *ah, u32 address, argument
35 struct ath_common *common = ath9k_hw_common(ah);
38 if (REG_READ(ah, address) & bit_position) {
39 REG_WRITE(ah, address, bit_position);
44 ar9003_mci_reset_req_wakeup(ah);
49 REG_WRITE(ah, AR_MCI_INTERRUPT_RAW,
52 REG_WRITE(ah, AR_MCI_INTERRUPT_RA
79 ar9003_mci_remote_reset(struct ath_hw *ah, bool wait_done) argument
88 ar9003_mci_send_lna_transfer(struct ath_hw *ah, bool wait_done) argument
96 ar9003_mci_send_req_wake(struct ath_hw *ah, bool wait_done) argument
103 ar9003_mci_send_sys_waking(struct ath_hw *ah, bool wait_done) argument
109 ar9003_mci_send_lna_take(struct ath_hw *ah, bool wait_done) argument
117 ar9003_mci_send_sys_sleeping(struct ath_hw *ah, bool wait_done) argument
124 ar9003_mci_send_coex_version_query(struct ath_hw *ah, bool wait_done) argument
140 ar9003_mci_send_coex_version_response(struct ath_hw *ah, bool wait_done) argument
155 ar9003_mci_send_coex_wlan_channels(struct ath_hw *ah, bool wait_done) argument
172 ar9003_mci_send_coex_bt_status_query(struct ath_hw *ah, bool wait_done, u8 query_type) argument
202 ar9003_mci_send_coex_halt_bt_gpm(struct ath_hw *ah, bool halt, bool wait_done) argument
225 ar9003_mci_prep_interface(struct ath_hw *ah) argument
322 ar9003_mci_set_full_sleep(struct ath_hw *ah) argument
336 ar9003_mci_disable_interrupt(struct ath_hw *ah) argument
342 ar9003_mci_enable_interrupt(struct ath_hw *ah) argument
349 ar9003_mci_check_int(struct ath_hw *ah, u32 ints) argument
357 ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr, u32 *rx_msg_intr) argument
371 ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked) argument
396 ar9003_mci_2g5g_changed(struct ath_hw *ah, bool is_2g) argument
407 ar9003_mci_is_gpm_valid(struct ath_hw *ah, u32 msg_index) argument
427 ar9003_mci_observation_set_up(struct ath_hw *ah) argument
467 ar9003_mci_send_coex_bt_flags(struct ath_hw *ah, bool wait_done, u8 opcode, u32 bt_flags) argument
485 ar9003_mci_sync_bt_state(struct ath_hw *ah) argument
505 ar9003_mci_check_bt(struct ath_hw *ah) argument
525 ar9003_mci_process_gpm_extra(struct ath_hw *ah, u8 gpm_type, u8 gpm_opcode, u32 *p_gpm) argument
572 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type, u8 gpm_opcode, int time_out) argument
683 ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan) argument
723 ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_hw_cal_data *caldata) argument
771 ar9003_mci_mute_bt(struct ath_hw *ah) argument
796 ar9003_mci_osla_setup(struct ath_hw *ah, bool enable) argument
826 ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g, bool is_full_sleep) argument
925 ar9003_mci_stop_bt(struct ath_hw *ah, bool save_fullsleep) argument
941 ar9003_mci_send_2g5g_status(struct ath_hw *ah, bool wait_done) argument
968 ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header, u32 *payload, bool queue) argument
1017 ar9003_mci_2g5g_switch(struct ath_hw *ah, bool wait_done) argument
1052 ar9003_mci_send_message(struct ath_hw *ah, u8 header, u32 flag, u32 *payload, u8 len, bool wait_done, bool check_bt) argument
1117 ar9003_mci_init_cal_req(struct ath_hw *ah, bool *is_reusable) argument
1140 ar9003_mci_init_cal_done(struct ath_hw *ah) argument
1154 ar9003_mci_setup(struct ath_hw *ah, u32 gpm_addr, void *gpm_buf, u16 len, u32 sched_addr) argument
1168 ar9003_mci_cleanup(struct ath_hw *ah) argument
1176 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data) argument
[all...]
H A Dar9002_phy.c47 * @ah: atheros hardware structure
66 static int ar9002_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
73 ath9k_hw_get_channel_centers(ah, chan, &centers);
76 reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL);
88 if (AR_SREV_9287_11_OR_LATER(ah)) {
91 REG_WRITE_ARRAY(&ah->iniCckfirJapan2484,
94 REG_WRITE_ARRAY(&ah->iniCckfirNormal,
98 txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
101 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
104 REG_WRITE(ah, AR_PHY_CCK_TX_CTR
168 ar9002_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
426 ar9002_olc_init(struct ath_hw *ah) argument
450 ar9002_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
477 ar9002_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
500 ar9002_hw_set_nf_limits(struct ath_hw *ah) argument
524 ar9002_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
540 ar9002_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
559 ar9002_hw_attach_phy_ops(struct ath_hw *ah) argument
[all...]
/drivers/net/wireless/ath/ath5k/
H A Drfkill.c39 static inline void ath5k_rfkill_disable(struct ath5k_hw *ah) argument
41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
48 static inline void ath5k_rfkill_enable(struct ath5k_hw *ah) argument
56 ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable) argument
67 ath5k_is_rfkill_set(struct ath5k_hw *ah) argument
78 struct ath5k_hw *ah = (void *)data; local
87 ath5k_rfkill_hw_start(struct ath5k_hw *ah) argument
105 ath5k_rfkill_hw_stop(struct ath5k_hw *ah) argument
[all...]
H A Dattach.c31 * @ah: The &struct ath5k_hw
33 static int ath5k_hw_post(struct ath5k_hw *ah) argument
52 init_val = ath5k_hw_reg_read(ah, cur_reg);
56 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
57 cur_val = ath5k_hw_reg_read(ah, cur_reg);
60 ATH5K_ERR(ah, "POST Failed !!!\n");
66 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
71 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
72 cur_val = ath5k_hw_reg_read(ah, cur_reg);
75 ATH5K_ERR(ah, "POS
102 ath5k_hw_init(struct ath5k_hw *ah) argument
348 ath5k_hw_deinit(struct ath5k_hw *ah) argument
[all...]
H A Dani.c60 * @ah: The &struct ath5k_hw
64 ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) argument
84 ATH5K_ERR(ah, "noise immunity level %d out of range",
89 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_DESIRED_SIZE,
91 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE,
93 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE,
95 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
98 ah->ani_state.noise_imm_level = level;
99 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
104 * @ah
109 ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) argument
133 ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) argument
155 ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) argument
195 ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on) argument
221 ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, bool ofdm_trigger) argument
308 ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
372 ath5k_hw_ani_get_listen_time(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
404 ath5k_ani_save_and_clear_phy_errors(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
473 ath5k_ani_calibration(struct ath5k_hw *ah) argument
537 ath5k_ani_mib_intr(struct ath5k_hw *ah) argument
574 ath5k_ani_phy_error_report(struct ath5k_hw *ah, enum ath5k_phy_error_code phyerr) argument
602 ath5k_enable_phy_err_counters(struct ath5k_hw *ah) argument
623 ath5k_disable_phy_err_counters(struct ath5k_hw *ah) argument
643 ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode) argument
728 ath5k_ani_print_counters(struct ath5k_hw *ah) argument
[all...]
H A Dpcu.c79 * ah->ah_ack_bitrate_high to true else base rate is
103 * @ah: The &struct ath5k_hw
113 ath5k_hw_get_frame_duration(struct ath5k_hw *ah, argument
121 if (!ah->ah_bwmode) {
122 __le16 raw_dur = ieee80211_generic_frame_duration(ah->hw,
138 switch (ah->ah_bwmode) {
170 * @ah: The &struct ath5k_hw
173 ath5k_hw_get_default_slottime(struct ath5k_hw *ah) argument
175 struct ieee80211_channel *channel = ah->ah_current_channel;
178 switch (ah
204 ath5k_hw_get_default_sifs(struct ath5k_hw *ah) argument
241 ath5k_hw_update_mib_counters(struct ath5k_hw *ah) argument
275 ath5k_hw_write_rate_duration(struct ath5k_hw *ah) argument
324 ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) argument
342 ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) argument
367 ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac) argument
395 ath5k_hw_set_bssid(struct ath5k_hw *ah) argument
444 ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask) argument
462 ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1) argument
479 ath5k_hw_get_rx_filter(struct ath5k_hw *ah) argument
508 ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter) argument
558 ath5k_hw_get_tsf64(struct ath5k_hw *ah) argument
605 ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64) argument
618 ath5k_hw_reset_tsf(struct ath5k_hw *ah) argument
644 ath5k_hw_init_beacon_timers(struct ath5k_hw *ah, u32 next_beacon, u32 interval) argument
792 ath5k_hw_check_beacon_timers(struct ath5k_hw *ah, int intval) argument
819 ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class) argument
847 ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) argument
859 ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah) argument
872 ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode) argument
949 ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode) argument
[all...]
H A Dqcu.c57 * @ah: The &struct ath5k_hw
61 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) argument
64 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
67 if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)
71 if (ah->ah_version == AR5K_AR5210)
74 pending = ath5k_hw_reg_read(ah, AR5K_QUEUE_STATUS(queue));
80 if (!pending && AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
88 * @ah: The &struct ath5k_hw
92 ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
94 if (WARN_ON(queue >= ah
136 ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, struct ath5k_txq_info *queue_info) argument
152 ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, const struct ath5k_txq_info *qinfo) argument
201 ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, struct ath5k_txq_info *queue_info) argument
285 ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, unsigned int queue) argument
328 ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
563 ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) argument
669 ath5k_hw_init_queues(struct ath5k_hw *ah) argument
[all...]
H A Ddma.c43 * @ah: The &struct ath5k_hw
46 ath5k_hw_start_rx_dma(struct ath5k_hw *ah) argument
48 ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR);
49 ath5k_hw_reg_read(ah, AR5K_CR);
54 * @ah: The &struct ath5k_hw
57 ath5k_hw_stop_rx_dma(struct ath5k_hw *ah) argument
61 ath5k_hw_reg_write(ah, AR5K_CR_RXD, AR5K_CR);
67 (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) != 0;
72 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
80 * @ah
83 ath5k_hw_get_rxdp(struct ath5k_hw *ah) argument
96 ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) argument
128 ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue) argument
186 ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) argument
326 ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue) argument
351 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue) argument
394 ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr) argument
451 ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase) argument
504 ath5k_hw_is_intr_pending(struct ath5k_hw *ah) argument
525 ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) argument
744 ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask) argument
845 ath5k_hw_dma_init(struct ath5k_hw *ah) argument
885 ath5k_hw_dma_stop(struct ath5k_hw *ah) argument
[all...]
H A Dbase.c97 static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
193 static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp) argument
195 u64 tsf = ath5k_hw_get_tsf64(ah);
226 struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv; local
227 return ath5k_hw_reg_read(ah, reg_offset);
232 struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv; local
233 ath5k_hw_reg_write(ah, val, reg_offset);
248 struct ath5k_hw *ah = hw->priv; local
249 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
279 ath5k_setup_channels(struct ath5k_hw *ah, struc argument
328 ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b) argument
345 struct ath5k_hw *ah = hw->priv; local
431 ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan) argument
487 ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah, struct ieee80211_vif *vif) argument
543 ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix) argument
564 ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr) argument
596 ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
663 ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf, struct ath5k_txq *txq, int padsize) argument
774 ath5k_desc_alloc(struct ath5k_hw *ah) argument
839 ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
853 ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
869 ath5k_desc_free(struct ath5k_hw *ah) argument
895 ath5k_txq_setup(struct ath5k_hw *ah, int qtype, int subtype) argument
947 ath5k_beaconq_setup(struct ath5k_hw *ah) argument
963 ath5k_beaconq_config(struct ath5k_hw *ah) argument
1031 ath5k_drain_tx_buffs(struct ath5k_hw *ah) argument
1060 ath5k_txq_release(struct ath5k_hw *ah) argument
1081 ath5k_rx_start(struct ath5k_hw *ah) argument
1122 ath5k_rx_stop(struct ath5k_hw *ah) argument
1132 ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_rx_status *rs) argument
1161 ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb, struct ieee80211_rx_status *rxs) argument
1228 ath5k_update_beacon_rssi(struct ath5k_hw *ah, struct sk_buff *skb, int rssi) argument
1312 ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_rx_status *rs) argument
1384 ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs) argument
1434 ath5k_set_current_imask(struct ath5k_hw *ah) argument
1455 struct ath5k_hw *ah = (void *)data; local
1524 struct ath5k_hw *ah = hw->priv; local
1577 ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_txq *txq, struct ath5k_tx_status *ts) argument
1638 ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq) argument
1696 struct ath5k_hw *ah = (void *)data; local
1715 ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
1800 struct ath5k_hw *ah = hw->priv; local
1832 ath5k_beacon_send(struct ath5k_hw *ah) argument
1950 ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf) argument
2052 ath5k_beacon_config(struct ath5k_hw *ah) argument
2088 struct ath5k_hw *ah = (struct ath5k_hw *) data; local
2121 ath5k_intr_calibration_poll(struct ath5k_hw *ah) argument
2154 ath5k_schedule_rx(struct ath5k_hw *ah) argument
2161 ath5k_schedule_tx(struct ath5k_hw *ah) argument
2170 struct ath5k_hw *ah = dev_id; local
2313 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2359 struct ath5k_hw *ah = (void *)data; local
2370 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2417 ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops) argument
2567 ath5k_stop_locked(struct ath5k_hw *ah) argument
2605 struct ath5k_hw *ah = hw->priv; local
2669 ath5k_stop_tasklets(struct ath5k_hw *ah) argument
2687 struct ath5k_hw *ah = hw->priv; local
2737 ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan, bool skip_pcu) argument
2830 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2842 struct ath5k_hw *ah = hw->priv; local
2981 ath5k_deinit_ah(struct ath5k_hw *ah) argument
3015 ath5k_any_vif_assoc(struct ath5k_hw *ah) argument
3031 struct ath5k_hw *ah = hw->priv; local
[all...]
H A Dled.c88 void ath5k_led_enable(struct ath5k_hw *ah) argument
90 if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
91 ath5k_hw_set_gpio_output(ah, ah->led_pin);
92 ath5k_led_off(ah);
96 static void ath5k_led_on(struct ath5k_hw *ah) argument
98 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
100 ath5k_hw_set_gpio(ah, ah->led_pin, ah
103 ath5k_led_off(struct ath5k_hw *ah) argument
124 ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led, const char *name, char *trigger) argument
153 ath5k_unregister_leds(struct ath5k_hw *ah) argument
159 ath5k_init_leds(struct ath5k_hw *ah) argument
[all...]
H A Dreset.c51 * @ah: The &struct ath5k_hw
65 ath5k_hw_register_timeout(struct ath5k_hw *ah, u32 reg, u32 flag, u32 val, argument
72 data = ath5k_hw_reg_read(ah, reg);
90 * @ah: The &struct ath5k_hw
99 ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec) argument
101 struct ath_common *common = ath5k_hw_common(ah);
107 * @ah: The &struct ath5k_hw
116 ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) argument
118 struct ath_common *common = ath5k_hw_common(ah);
124 * @ah
130 ath5k_hw_init_core_clock(struct ath5k_hw *ah) argument
279 ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable) argument
395 ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val) argument
444 ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags) argument
512 ath5k_hw_set_power_mode(struct ath5k_hw *ah, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration) argument
605 ath5k_hw_on_hold(struct ath5k_hw *ah) argument
667 ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
846 ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
974 ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
1144 ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, struct ieee80211_channel *channel, bool fast, bool skip_pcu) argument
[all...]
H A Dani.h104 void ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode);
105 void ath5k_ani_mib_intr(struct ath5k_hw *ah);
106 void ath5k_ani_calibration(struct ath5k_hw *ah);
107 void ath5k_ani_phy_error_report(struct ath5k_hw *ah,
111 void ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level);
112 void ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level);
113 void ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level);
114 void ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on);
115 void ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on);
117 void ath5k_ani_print_counters(struct ath5k_hw *ah);
[all...]
H A Dmac80211-ops.c58 struct ath5k_hw *ah = hw->priv; local
61 if (WARN_ON(qnum >= ah->ah_capabilities.cap_queues.q_tx_num)) {
66 ath5k_tx_queue(hw, skb, &ah->txqs[qnum]);
73 struct ath5k_hw *ah = hw->priv; local
77 mutex_lock(&ah->lock);
81 && (ah->num_ap_vifs + ah->num_adhoc_vifs) >= ATH_BCBUF) {
91 if (ah->num_adhoc_vifs ||
92 (ah->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) {
93 ATH5K_ERR(ah, "Onl
158 struct ath5k_hw *ah = hw->priv; local
194 struct ath5k_hw *ah = hw->priv; local
253 struct ath5k_hw *ah = hw->priv; local
374 struct ath5k_hw *ah = hw->priv; local
483 struct ath5k_hw *ah = hw->priv; local
544 struct ath5k_hw *ah = hw->priv; local
553 struct ath5k_hw *ah = hw->priv; local
563 struct ath5k_hw *ah = hw->priv; local
581 struct ath5k_hw *ah = hw->priv; local
619 struct ath5k_hw *ah = hw->priv; local
628 struct ath5k_hw *ah = hw->priv; local
637 struct ath5k_hw *ah = hw->priv; local
653 struct ath5k_hw *ah = hw->priv; local
700 struct ath5k_hw *ah = hw->priv; local
711 struct ath5k_hw *ah = hw->priv; local
728 struct ath5k_hw *ah = hw->priv; local
745 struct ath5k_hw *ah = hw->priv; local
756 struct ath5k_hw *ah = hw->priv; local
[all...]

Completed in 863 milliseconds

123456