Searched refs:clks (Results 1 - 8 of 8) sorted by relevance

/drivers/sh/clk/
H A Dcpg.c35 int __init sh_clk_mstp32_register(struct clk *clks, int nr) argument
42 clkp = clks + k;
202 static int __init sh_clk_div6_register_ops(struct clk *clks, int nr, argument
220 clkp = clks + k;
235 int __init sh_clk_div6_register(struct clk *clks, int nr) argument
237 return sh_clk_div6_register_ops(clks, nr, &sh_clk_div6_clk_ops);
240 int __init sh_clk_div6_reparent_register(struct clk *clks, int nr) argument
242 return sh_clk_div6_register_ops(clks, nr,
343 static int __init sh_clk_div4_register_ops(struct clk *clks, int nr, argument
361 clkp = clks
375 sh_clk_div4_register(struct clk *clks, int nr, struct clk_div4_table *table) argument
381 sh_clk_div4_enable_register(struct clk *clks, int nr, struct clk_div4_table *table) argument
388 sh_clk_div4_reparent_register(struct clk *clks, int nr, struct clk_div4_table *table) argument
[all...]
/drivers/misc/sgi-gru/
H A Dgruhandles.c42 static void update_mcs_stats(enum mcs_op op, unsigned long clks) argument
46 nsec = CLKS2NSEC(clks);
/drivers/mmc/host/
H A Dsdhci-s3c.c437 int ret, irq, ptr, clks; local
483 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
493 clks++;
508 if (clks == 0) {
H A Dpxamci.c176 unsigned long long clks; local
190 clks = (unsigned long long)data->timeout_ns * host->clkrate;
191 do_div(clks, 1000000000UL);
192 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
H A Dmmci.c611 unsigned long long clks; local
622 clks = (unsigned long long)data->timeout_ns * host->cclk;
623 do_div(clks, 1000000000UL);
625 timeout = data->timeout_clks + (unsigned int)clks;
H A Dmsm_sdcc.c489 unsigned long long clks; local
520 clks = (unsigned long long)data->timeout_ns * host->clk_rate;
521 do_div(clks, NSEC_PER_SEC);
522 timeout = data->timeout_clks + (unsigned int)clks*2 ;
/drivers/ata/
H A Dsata_mv.c1084 unsigned int clks, is_dual_hc = hpriv->n_ports > MV_PORTS_PER_HC; local
1090 clks = count = 0;
1093 clks = usecs * COAL_CLOCKS_PER_USEC;
1094 if (clks > MAX_COAL_TIME_THRESHOLD)
1095 clks = MAX_COAL_TIME_THRESHOLD;
1108 writel(clks, mmio + IRQ_COAL_TIME_THRESHOLD);
1114 clks = count = 0; /* force clearing of regular regs below */
1121 writel(clks, hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD);
1128 writel(clks, hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD);
/drivers/net/ethernet/marvell/
H A Dsky2.c4060 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI); local
4061 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
4068 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI); local
4069 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
4076 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI); local
4077 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);

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