Searched refs:head (Results 1 - 25 of 583) sorted by relevance

1234567891011>>

/drivers/scsi/aic7xxx/
H A Dqueue.h40 * added to the list after an existing element or at the head of the list.
41 * Elements being removed from the head of the list should use the explicit
48 * head of the list and the other to the tail of the list. The elements are
51 * to the list after an existing element, at the head of the list, or at the
52 * end of the list. Elements being removed from the head of the tail queue
62 * or after an existing element or at the head of the list. A list
65 * A tail queue is headed by a pair of pointers, one to the head of the
69 * after an existing element, at the head of the list, or at the end of
72 * A circle queue is headed by a pair of pointers, one to the head of the
76 * an existing element, at the head o
[all...]
/drivers/infiniband/hw/amso1100/
H A Dc2_alloc.c40 struct sp_chunk **head)
55 new_head->head = 0;
67 *head = new_head;
89 __be16 *c2_alloc_mqsp(struct c2_dev *c2dev, struct sp_chunk *head, argument
94 while (head) {
95 mqsp = head->head;
97 head->head = head
39 c2_alloc_mqsp_chunk(struct c2_dev *c2dev, gfp_t gfp_mask, struct sp_chunk **head) argument
124 struct sp_chunk *head; local
[all...]
/drivers/scsi/sym53c8xx_2/
H A Dsym_misc.h55 static inline struct sym_quehead *sym_que_first(struct sym_quehead *head) argument
57 return (head->flink == head) ? 0 : head->flink;
60 static inline struct sym_quehead *sym_que_last(struct sym_quehead *head) argument
62 return (head->blink == head) ? 0 : head->blink;
82 static inline int sym_que_empty(struct sym_quehead *head) argument
84 return head
87 sym_que_splice(struct sym_quehead *list, struct sym_quehead *head) argument
132 sym_remque_head(struct sym_quehead *head) argument
145 sym_remque_tail(struct sym_quehead *head) argument
[all...]
/drivers/gpu/drm/nouveau/
H A Dnouveau_hw.h35 void NVWriteVgaSeq(struct drm_device *, int head, uint8_t index, uint8_t value);
36 uint8_t NVReadVgaSeq(struct drm_device *, int head, uint8_t index);
37 void NVWriteVgaGr(struct drm_device *, int head, uint8_t index, uint8_t value);
38 uint8_t NVReadVgaGr(struct drm_device *, int head, uint8_t index);
40 void NVBlankScreen(struct drm_device *, int head, bool blank);
48 void nouveau_hw_save_state(struct drm_device *, int head,
50 void nouveau_hw_load_state(struct drm_device *, int head,
52 void nouveau_hw_load_state_palette(struct drm_device *, int head,
122 int head, uint32_t reg)
125 if (head)
121 NVReadCRTC(struct drm_device *dev, int head, uint32_t reg) argument
132 NVWriteCRTC(struct drm_device *dev, int head, uint32_t reg, uint32_t val) argument
141 NVReadRAMDAC(struct drm_device *dev, int head, uint32_t reg) argument
153 NVWriteRAMDAC(struct drm_device *dev, int head, uint32_t reg, uint32_t val) argument
183 NVWriteVgaCrtc(struct drm_device *dev, int head, uint8_t index, uint8_t value) argument
192 NVReadVgaCrtc(struct drm_device *dev, int head, uint8_t index) argument
218 NVWriteVgaCrtc5758(struct drm_device *dev, int head, uint8_t index, uint8_t value) argument
224 NVReadVgaCrtc5758(struct drm_device *dev, int head, uint8_t index) argument
230 NVReadPRMVIO(struct drm_device *dev, int head, uint32_t reg) argument
246 NVWritePRMVIO(struct drm_device *dev, int head, uint32_t reg, uint8_t value) argument
261 NVSetEnablePalette(struct drm_device *dev, int head, bool enable) argument
267 NVGetEnablePalette(struct drm_device *dev, int head) argument
273 NVWriteVgaAttr(struct drm_device *dev, int head, uint8_t index, uint8_t value) argument
288 NVReadVgaAttr(struct drm_device *dev, int head, uint8_t index) argument
305 NVVgaSeqReset(struct drm_device *dev, int head, bool start) argument
310 NVVgaProtect(struct drm_device *dev, int head, bool protect) argument
338 nv_lock_vga_crtc_base(struct drm_device *dev, int head, bool lock) argument
353 nv_lock_vga_crtc_shadow(struct drm_device *dev, int head, int lock) argument
407 nv_fix_nv40_hw_cursor(struct drm_device *dev, int head) argument
419 nv_set_crtc_base(struct drm_device *dev, int head, uint32_t offset) argument
438 nv_show_cursor(struct drm_device *dev, int head, bool show) argument
[all...]
H A Dnouveau_hw.c37 NVWriteVgaSeq(struct drm_device *dev, int head, uint8_t index, uint8_t value) argument
39 NVWritePRMVIO(dev, head, NV_PRMVIO_SRX, index);
40 NVWritePRMVIO(dev, head, NV_PRMVIO_SR, value);
44 NVReadVgaSeq(struct drm_device *dev, int head, uint8_t index) argument
46 NVWritePRMVIO(dev, head, NV_PRMVIO_SRX, index);
47 return NVReadPRMVIO(dev, head, NV_PRMVIO_SR);
51 NVWriteVgaGr(struct drm_device *dev, int head, uint8_t index, uint8_t value) argument
53 NVWritePRMVIO(dev, head, NV_PRMVIO_GRX, index);
54 NVWritePRMVIO(dev, head, NV_PRMVIO_GX, value);
58 NVReadVgaGr(struct drm_device *dev, int head, uint8_ argument
108 NVBlankScreen(struct drm_device *dev, int head, bool blank) argument
512 nouveau_hw_fix_bad_vpll(struct drm_device *dev, int head) argument
635 rd_cio_state(struct drm_device *dev, int head, struct nv04_crtc_reg *crtcstate, int index) argument
642 wr_cio_state(struct drm_device *dev, int head, struct nv04_crtc_reg *crtcstate, int index) argument
649 nv_save_state_ramdac(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
724 nv_load_state_ramdac(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
795 nv_save_state_vga(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
819 nv_load_state_vga(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
845 nv_save_state_ext(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
920 nv_load_state_ext(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
1029 nv_save_state_palette(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
1047 nouveau_hw_load_state_palette(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
1064 nouveau_hw_save_state(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
1078 nouveau_hw_load_state(struct drm_device *dev, int head, struct nv04_mode_state *state) argument
[all...]
H A Dnv04_tv.c78 int head = nouveau_crtc(encoder->crtc)->index; local
79 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
81 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
87 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
95 static void nv04_tv_bind(struct drm_device *dev, int head, bool bind) argument
98 struct nv04_crtc_reg *state = &dev_priv->mode_reg.crtc_reg[head];
107 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
109 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
111 NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
118 int head local
[all...]
/drivers/net/wireless/ath/carl9170/
H A Dfwdesc.h116 struct carl9170fw_desc_head head; member in struct:carl9170fw_otus_desc
137 struct carl9170fw_desc_head head; member in struct:carl9170fw_motd_desc
154 struct carl9170fw_desc_head head; member in struct:carl9170fw_fix_desc
163 struct carl9170fw_desc_head head; member in struct:carl9170fw_dbg_desc
179 struct carl9170fw_desc_head head; member in struct:carl9170fw_chk_desc
189 struct carl9170fw_desc_head head; member in struct:carl9170fw_txsq_desc
199 struct carl9170fw_desc_head head; member in struct:carl9170fw_wol_desc
209 struct carl9170fw_desc_head head; member in struct:carl9170fw_last_desc
217 .head = { \
224 static inline void carl9170fw_fill_desc(struct carl9170fw_desc_head *head, argument
253 carl9170fw_desc_cmp(const struct carl9170fw_desc_head *head, const u8 descid[CARL9170FW_MAGIC_SIZE], u16 min_len, u8 compatible_revision) argument
[all...]
/drivers/gpu/drm/radeon/
H A Dmkregtable.c79 * @head: list head to add it after
81 * Insert a new entry after the specified head.
84 static inline void list_add(struct list_head *new, struct list_head *head) argument
86 __list_add(new, head, head->next);
92 * @head: list head to add it before
94 * Insert a new entry before the specified head.
97 static inline void list_add_tail(struct list_head *new, struct list_head *head) argument
169 list_move(struct list_head *list, struct list_head *head) argument
180 list_move_tail(struct list_head *list, struct list_head *head) argument
192 list_is_last(const struct list_head *list, const struct list_head *head) argument
202 list_empty(const struct list_head *head) argument
220 list_empty_careful(const struct list_head *head) argument
230 list_is_singular(const struct list_head *head) argument
235 __list_cut_position(struct list_head *list, struct list_head *head, struct list_head *entry) argument
262 list_cut_position(struct list_head *list, struct list_head *head, struct list_head *entry) argument
294 list_splice(const struct list_head *list, struct list_head *head) argument
306 list_splice_tail(struct list_head *list, struct list_head *head) argument
320 list_splice_init(struct list_head *list, struct list_head *head) argument
337 list_splice_tail_init(struct list_head *list, struct list_head *head) argument
[all...]
/drivers/staging/tidspbridge/rmgr/
H A Drmm.c298 struct rmm_header *head; local
305 head = target->free_list[segid];
308 while (head != NULL) {
309 max_free_size = max(max_free_size, head->size);
310 total_free_size += head->size;
312 head = head->next;
345 struct rmm_header *head; local
356 head = target->free_list[segid];
359 hsize = head
406 struct rmm_header *head; local
[all...]
/drivers/gpu/drm/
H A Ddrm_agpsupport.c223 list_add(&entry->head, &dev->agp->memory);
255 list_for_each_entry(entry, &dev->agp->memory, head) {
370 list_del(&entry->head);
399 struct drm_agp_head *head = NULL; local
401 if (!(head = kmalloc(sizeof(*head), GFP_KERNEL)))
403 memset((void *)head, 0, sizeof(*head));
404 head->bridge = agp_find_bridge(dev->pdev);
405 if (!head
[all...]
H A Ddrm_hashtab.c71 entry = hlist_entry(list, struct drm_hash_item, head);
87 entry = hlist_entry(list, struct drm_hash_item, head);
109 entry = hlist_entry(list, struct drm_hash_item, head);
117 hlist_add_after(parent, &item->head);
119 hlist_add_head(&item->head, h_list);
163 *item = hlist_entry(list, struct drm_hash_item, head);
182 hlist_del_init(&item->head);
/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_marker.c32 struct list_head head; member in struct:vmw_marker
39 INIT_LIST_HEAD(&queue->head);
50 list_for_each_entry_safe(marker, next, &queue->head, head) {
67 list_add_tail(&marker->head, &queue->head);
83 if (list_empty(&queue->head)) {
90 list_for_each_entry_safe(marker, next, &queue->head, head) {
97 list_del(&marker->head);
[all...]
/drivers/infiniband/hw/ipath/
H A Dipath_cq.c52 u32 head; local
58 * Note that the head pointer might be writable by user processes.
62 head = wc->head;
63 if (head >= (unsigned) cq->ibcq.cqe) {
64 head = cq->ibcq.cqe;
67 next = head + 1;
81 wc->uqueue[head].wr_id = entry->wr_id;
82 wc->uqueue[head].status = entry->status;
83 wc->uqueue[head]
376 u32 head, tail, n; local
[all...]
/drivers/infiniband/hw/qib/
H A Dqib_cq.c52 u32 head; local
58 * Note that the head pointer might be writable by user processes.
62 head = wc->head;
63 if (head >= (unsigned) cq->ibcq.cqe) {
64 head = cq->ibcq.cqe;
67 next = head + 1;
81 wc->uqueue[head].wr_id = entry->wr_id;
82 wc->uqueue[head].status = entry->status;
83 wc->uqueue[head]
383 u32 head, tail, n; local
[all...]
/drivers/mfd/
H A Dpcf50633-adc.c75 int head; local
77 head = adc->queue_head;
79 if (!adc->queue[head])
82 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg);
89 int head, tail; local
93 head = adc->queue_head;
103 if (head == tail)
178 int head, res; local
181 head
224 int i, head; local
[all...]
/drivers/staging/tidspbridge/include/dspbridge/
H A Dntfy.h27 * ntfy_object - head structure to nofify dspbridge events
28 * @head: List of notify objects
33 struct raw_notifier_head head;/* List of notifier objects */ member in struct:ntfy_object
74 RAW_INIT_NOTIFIER_HEAD(&no->head);
92 nb = ntfy_obj->head.head;
112 raw_notifier_call_chain(&ntfy_obj->head, event, NULL);
178 raw_notifier_chain_register(&ntfy_obj->head, &ne->noti_block);
209 raw_notifier_chain_unregister(&ntfy_obj->head,
/drivers/input/joystick/iforce/
H A Diforce-packets.c55 int head, tail; local
59 * Update head and tail of xmit buffer
63 head = iforce->xmit.head;
67 if (CIRC_SPACE(head, tail, XMIT_SIZE) < n+2) {
74 empty = head == tail;
75 XMIT_INC(iforce->xmit.head, n+2);
80 iforce->xmit.buf[head] = HI(cmd);
81 XMIT_INC(head, 1);
82 iforce->xmit.buf[head]
[all...]
/drivers/scsi/arm/
H A Dqueue.c64 INIT_LIST_HEAD(&queue->head);
69 * host-available list head, and we wouldn't
92 if (!list_empty(&queue->head))
99 * Function: int __queue_add(Queue_t *queue, struct scsi_cmnd *SCpnt, int head)
100 * Purpose : Add a new command onto a queue, adding REQUEST_SENSE to head.
103 * head - add command to head of queue
106 int __queue_add(Queue_t *queue, struct scsi_cmnd *SCpnt, int head) argument
126 if (head)
127 list_add(l, &queue->head);
[all...]
H A Dqueue.h14 struct list_head head; member in struct:__anon4152
57 * Function: int __queue_add(Queue_t *queue, struct scsi_cmnd *SCpnt, int head)
61 * head - add command to head of queue
64 extern int __queue_add(Queue_t *queue, struct scsi_cmnd *SCpnt, int head);
/drivers/staging/rtl8712/
H A Drtl871x_event.h98 /*volatile*/ int head; member in struct:c2hevent_queue
107 /*volatile*/ int head; member in struct:network_queue
/drivers/isdn/capi/
H A Dcapilib.c80 void capilib_new_ncci(struct list_head *head, u16 applid, u32 ncci, u32 winsize) argument
98 list_add_tail(&np->list, head);
104 void capilib_free_ncci(struct list_head *head, u16 applid, u32 ncci) argument
109 list_for_each(l, head) {
125 void capilib_release_appl(struct list_head *head, u16 applid) argument
130 list_for_each_safe(l, n, head) {
142 void capilib_release(struct list_head *head) argument
147 list_for_each_safe(l, n, head) {
157 u16 capilib_data_b3_req(struct list_head *head, u16 applid, u32 ncci, u16 msgid) argument
162 list_for_each(l, head) {
180 capilib_data_b3_conf(struct list_head *head, u16 applid, u32 ncci, u16 msgid) argument
[all...]
/drivers/isdn/gigaset/
H A Dasyncdata.c51 unsigned char *src = inbuf->data + inbuf->head;
123 unsigned char *src = inbuf->data + inbuf->head;
145 unsigned char *src = inbuf->data + inbuf->head;
291 unsigned char *src = inbuf->data + inbuf->head;
347 if (inbuf->data[inbuf->head] == DLE_FLAG &&
350 inbuf->head++;
351 if (inbuf->head == inbuf->tail ||
352 inbuf->head == RBUFSIZE) {
366 switch (inbuf->data[inbuf->head]) {
372 inbuf->head
[all...]
/drivers/tty/
H A Dtty_buffer.c33 while ((thead = tty->buf.head) != NULL) {
34 tty->buf.head = thead->next;
117 while ((thead = tty->buf.head) != NULL) {
118 tty->buf.head = thead->next;
222 tty->buf.head = n;
416 struct tty_buffer *head; local
417 while ((head = tty->buf.head) != NULL) {
422 count = head->commit - head
[all...]
/drivers/gpu/drm/mga/
H A Dmga_dma.c108 u32 head, tail; local
143 head = MGA_READ(MGA_PRIMADDRESS);
145 if (head <= tail)
148 primary->space = head - tail;
150 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
163 u32 head, tail; local
181 head = MGA_READ(MGA_PRIMADDRESS);
183 if (head == dev_priv->primary->offset)
186 primary->space = head
204 u32 head = dev_priv->primary->offset; local
330 u32 head, wrap; local
361 drm_mga_freelist_t *head, *entry, *prev; local
[all...]
/drivers/char/agp/
H A Disoch.c22 static void agp_3_5_dev_list_insert(struct list_head *head, struct list_head *new) argument
27 list_for_each(pos, head) {
39 struct list_head *pos, *tmp, *head = &list->list, *start = head->next; local
42 INIT_LIST_HEAD(head);
44 for (pos=start; pos!=head; ) {
53 agp_3_5_dev_list_insert(head, tmp);
80 struct list_head *head = &dev_list->list, *pos; local
135 list_for_each(pos, head) {
290 struct list_head *head local
325 struct list_head *head, *pos; local
[all...]

Completed in 534 milliseconds

1234567891011>>