Searched refs:offset (Results 1 - 25 of 2051) sorted by relevance

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/drivers/infiniband/hw/ehca/
H A Dhipz_fns.h50 #define hipz_galpa_store_eq(gal, offset, value) \
51 hipz_galpa_store(gal, EQTEMM_OFFSET(offset), value)
53 #define hipz_galpa_load_eq(gal, offset) \
54 hipz_galpa_load(gal, EQTEMM_OFFSET(offset))
56 #define hipz_galpa_store_qped(gal, offset, value) \
57 hipz_galpa_store(gal, QPEDMM_OFFSET(offset), value)
59 #define hipz_galpa_load_qped(gal, offset) \
60 hipz_galpa_load(gal, QPEDMM_OFFSET(offset))
62 #define hipz_galpa_store_mrmw(gal, offset, value) \
63 hipz_galpa_store(gal, MRMWMM_OFFSET(offset), valu
[all...]
H A Dhipz_fns_core.h50 #define hipz_galpa_store_cq(gal, offset, value) \
51 hipz_galpa_store(gal, CQTEMM_OFFSET(offset), value)
53 #define hipz_galpa_load_cq(gal, offset) \
54 hipz_galpa_load(gal, CQTEMM_OFFSET(offset))
56 #define hipz_galpa_store_qp(gal, offset, value) \
57 hipz_galpa_store(gal, QPTEMM_OFFSET(offset), value)
58 #define hipz_galpa_load_qp(gal, offset) \
59 hipz_galpa_load(gal, QPTEMM_OFFSET(offset))
/drivers/usb/musb/
H A Dmusb_io.h64 static inline u16 musb_readw(const void __iomem *addr, unsigned offset) argument
65 { return __raw_readw(addr + offset); }
67 static inline u32 musb_readl(const void __iomem *addr, unsigned offset) argument
68 { return __raw_readl(addr + offset); }
71 static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) argument
72 { __raw_writew(data, addr + offset); }
74 static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) argument
75 { __raw_writel(data, addr + offset); }
83 static inline u8 musb_readb(const void __iomem *addr, unsigned offset) argument
88 tmp = __raw_readw(addr + (offset
97 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument
112 musb_readb(const void __iomem *addr, unsigned offset) argument
115 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument
122 musb_readb(const void __iomem *addr, unsigned offset) argument
125 musb_readw(const void __iomem *addr, unsigned offset) argument
128 musb_readl(const void __iomem *addr, unsigned offset) argument
131 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument
134 musb_writew(void __iomem *addr, unsigned offset, u16 data) argument
137 musb_writel(void __iomem *addr, unsigned offset, u32 data) argument
[all...]
/drivers/net/wireless/b43/
H A Dtables_phy_ht.h9 #define B43_HTTAB8(table, offset) (((table) << 10) | (offset) | B43_HTTAB_8BIT)
10 #define B43_HTTAB16(table, offset) (((table) << 10) | (offset) | B43_HTTAB_16BIT)
11 #define B43_HTTAB32(table, offset) (((table) << 10) | (offset) | B43_HTTAB_32BIT)
13 u32 b43_httab_read(struct b43_wldev *dev, u32 offset);
14 void b43_httab_read_bulk(struct b43_wldev *dev, u32 offset,
16 void b43_httab_write(struct b43_wldev *dev, u32 offset, u32 value);
17 void b43_httab_write_few(struct b43_wldev *dev, u32 offset, size_
[all...]
H A Dtables_phy_lcn.h9 #define B43_LCNTAB8(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_8BIT)
10 #define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT)
11 #define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT)
15 u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset);
16 void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset,
18 void b43_lcntab_write(struct b43_wldev *dev, u32 offset, u32 value);
19 void b43_lcntab_write_bulk(struct b43_wldev *dev, u32 offset,
[all...]
H A Dtables_lpphy.h9 #define B43_LPTAB8(table, offset) (((table) << 10) | (offset) | B43_LPTAB_8BIT)
10 #define B43_LPTAB16(table, offset) (((table) << 10) | (offset) | B43_LPTAB_16BIT)
11 #define B43_LPTAB32(table, offset) (((table) << 10) | (offset) | B43_LPTAB_32BIT)
17 u32 b43_lptab_read(struct b43_wldev *dev, u32 offset);
18 void b43_lptab_write(struct b43_wldev *dev, u32 offset, u32 value);
23 void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset,
25 void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset,
[all...]
/drivers/pinctrl/
H A Dpinctrl-coh901.h2 unsigned offset,
4 int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset,
/drivers/usb/dwc3/
H A Dio.h44 static inline u32 dwc3_readl(void __iomem *base, u32 offset) argument
46 return readl(base + offset);
49 static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value) argument
51 writel(value, base + offset);
/drivers/gpio/
H A Dgpio-sa1100.c17 static int sa1100_gpio_get(struct gpio_chip *chip, unsigned offset) argument
19 return GPLR & GPIO_GPIO(offset);
22 static void sa1100_gpio_set(struct gpio_chip *chip, unsigned offset, int value) argument
25 GPSR = GPIO_GPIO(offset);
27 GPCR = GPIO_GPIO(offset);
30 static int sa1100_direction_input(struct gpio_chip *chip, unsigned offset) argument
35 GPDR &= ~GPIO_GPIO(offset);
40 static int sa1100_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument
45 sa1100_gpio_set(chip, offset, value);
46 GPDR |= GPIO_GPIO(offset);
51 sa1100_to_irq(struct gpio_chip *chip, unsigned offset) argument
[all...]
H A Dgpio-cs5535.c82 static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset, argument
85 if (offset < 16)
87 outl(1 << offset, chip->base + reg);
90 errata_outl(chip, 1 << (offset - 16), reg);
93 void cs5535_gpio_set(unsigned offset, unsigned int reg) argument
99 __cs5535_gpio_set(chip, offset, reg);
104 static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset, argument
107 if (offset < 16)
109 outl(1 << (offset + 16), chip->base + reg);
112 errata_outl(chip, 1 << offset, re
115 cs5535_gpio_clear(unsigned offset, unsigned int reg) argument
126 cs5535_gpio_isset(unsigned offset, unsigned int reg) argument
164 cs5535_gpio_setup_event(unsigned offset, int pair, int pme) argument
202 chip_gpio_request(struct gpio_chip *c, unsigned offset) argument
229 chip_gpio_get(struct gpio_chip *chip, unsigned offset) argument
234 chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) argument
242 chip_direction_input(struct gpio_chip *c, unsigned offset) argument
255 chip_direction_output(struct gpio_chip *c, unsigned offset, int val) argument
[all...]
H A Dgpio-max730x.c51 static int max7301_direction_input(struct gpio_chip *chip, unsigned offset) argument
59 offset += 4;
60 offset_bits = (offset & 3) << 1;
62 config = &ts->port_config[offset >> 2];
64 if (ts->input_pullup_active & BIT(offset))
74 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
81 static int __max7301_set(struct max7301 *ts, unsigned offset, int value) argument
84 ts->out_level |= 1 << offset;
85 return ts->write(ts->dev, 0x20 + offset, 0x01);
87 ts->out_level &= ~(1 << offset);
92 max7301_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument
121 max7301_get(struct gpio_chip *chip, unsigned offset) argument
149 max7301_set(struct gpio_chip *chip, unsigned offset, int value) argument
209 int offset = (i - 1) * 4 + j; local
[all...]
/drivers/scsi/pm8001/
H A Dpm8001_chips.h49 static inline void pm8001_write_32(void *addr, u32 offset, __le32 val) argument
51 *((__le32 *)(addr + offset)) = val;
55 u32 offset)
57 return readl(pm8001_ha->io_mem[bar].memvirtaddr + offset);
65 static inline u32 pm8001_mr32(void __iomem *addr, u32 offset) argument
67 return readl(addr + offset);
69 static inline void pm8001_mw32(void __iomem *addr, u32 offset, u32 val) argument
71 writel(val, addr + offset);
54 pm8001_cr32(struct pm8001_hba_info *pm8001_ha, u32 bar, u32 offset) argument
/drivers/xen/xen-pciback/
H A Dconf_space.h14 typedef void *(*conf_field_init) (struct pci_dev *dev, int offset);
15 typedef void (*conf_field_reset) (struct pci_dev *dev, int offset, void *data);
16 typedef void (*conf_field_free) (struct pci_dev *dev, int offset, void *data);
18 typedef int (*conf_dword_write) (struct pci_dev *dev, int offset, u32 value,
20 typedef int (*conf_word_write) (struct pci_dev *dev, int offset, u16 value,
22 typedef int (*conf_byte_write) (struct pci_dev *dev, int offset, u8 value,
24 typedef int (*conf_dword_read) (struct pci_dev *dev, int offset, u32 *value,
26 typedef int (*conf_word_read) (struct pci_dev *dev, int offset, u16 *value,
28 typedef int (*conf_byte_read) (struct pci_dev *dev, int offset, u8 *value,
36 unsigned int offset; member in struct:config_field
94 xen_pcibk_config_add_fields_offset(struct pci_dev *dev, const struct config_field *field, unsigned int offset) argument
[all...]
H A Dconf_space_header.c21 static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data) argument
26 ret = xen_pcibk_read_config_word(dev, offset, value, data);
40 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data) argument
86 return pci_write_config_word(dev, offset, value);
89 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data) argument
106 pci_read_config_dword(dev, offset, &tmpval);
109 pci_write_config_dword(dev, offset, bar->val);
123 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data) argument
140 pci_read_config_dword(dev, offset, &tmpval);
143 pci_write_config_dword(dev, offset, ba
151 bar_read(struct pci_dev *dev, int offset, u32 * value, void *data) argument
166 read_dev_bar(struct pci_dev *dev, struct pci_bar_info *bar_info, int offset, u32 len_mask) argument
192 bar_init(struct pci_dev *dev, int offset) argument
205 rom_init(struct pci_dev *dev, int offset) argument
218 bar_reset(struct pci_dev *dev, int offset, void *data) argument
225 bar_release(struct pci_dev *dev, int offset, void *data) argument
230 xen_pcibk_read_vendor(struct pci_dev *dev, int offset, u16 *value, void *data) argument
238 xen_pcibk_read_device(struct pci_dev *dev, int offset, u16 *value, void *data) argument
246 interrupt_read(struct pci_dev *dev, int offset, u8 * value, void *data) argument
254 bist_write(struct pci_dev *dev, int offset, u8 value, void *data) argument
[all...]
/drivers/mtd/nand/
H A Dbcm_umi_bch.c39 {.offset = 0, .length = 2}
41 {.offset = 0, .length = 5},
42 {.offset = 6, .length = 7}
55 {.offset = 1, .length = 2},
57 {.offset = 1, .length = 5},
58 {.offset = 16, .length = 6},
59 {.offset = 32, .length = 6},
60 {.offset = 48, .length = 6}
62 {.offset = 1, .length = 8},
63 {.offset
[all...]
/drivers/mtd/maps/
H A Dtsunami_flash.c17 static inline map_word tsunami_flash_read8(struct map_info *map, unsigned long offset) argument
20 val.x[0] = tsunami_tig_readb(offset);
24 static void tsunami_flash_write8(struct map_info *map, map_word value, unsigned long offset) argument
26 tsunami_tig_writeb(value.x[0], offset);
30 struct map_info *map, void *addr, unsigned long offset, ssize_t len)
34 while(len && (offset < MAX_TIG_FLASH_SIZE)) {
35 *dest = tsunami_tig_readb(offset);
36 offset++;
43 struct map_info *map, unsigned long offset,
48 while(len && (offset < MAX_TIG_FLASH_SIZ
29 tsunami_flash_copy_from( struct map_info *map, void *addr, unsigned long offset, ssize_t len) argument
42 tsunami_flash_copy_to( struct map_info *map, unsigned long offset, const void *addr, ssize_t len) argument
[all...]
/drivers/net/ethernet/intel/e1000/
H A De1000_osdep.h48 #define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \
49 (iowrite16_rep(base + offset, data, count))
51 #define GBE_CONFIG_FLASH_READ(base, offset, count, data) \
52 (ioread16_rep(base + (offset << 1), data, count))
62 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
65 ((offset) << 2))))
67 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
70 ((offset) << 2)))
75 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
78 ((offset) <<
[all...]
/drivers/net/wireless/rt2x00/
H A Drt2x00pci.h42 const unsigned int offset,
45 *value = readl(rt2x00dev->csr.base + offset);
49 const unsigned int offset,
52 memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
56 const unsigned int offset,
59 writel(value, rt2x00dev->csr.base + offset);
63 const unsigned int offset,
67 __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
73 * @offset: Register offset
41 rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 *value) argument
48 rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev, const unsigned int offset, void *value, const u32 length) argument
55 rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 value) argument
62 rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev, const unsigned int offset, const void *value, const u32 length) argument
[all...]
H A Drt2x00usb.h88 * enum rt2x00usb_mode_offset: Device modes offset.
105 * @offset: Register offset to perform action on
118 const u16 offset, const u16 value,
127 * @offset: Register offset to perform action on
142 const u16 offset, void *buffer,
150 * @offset: Register offset to perform action on
160 const u16 offset, voi
175 rt2x00usb_vendor_request_sw(struct rt2x00_dev *rt2x00dev, const u8 request, const u16 offset, const u16 value, const int timeout) argument
214 rt2x00usb_register_read(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 *value) argument
234 rt2x00usb_register_read_lock(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 *value) argument
255 rt2x00usb_register_multiread(struct rt2x00_dev *rt2x00dev, const unsigned int offset, void *value, const u32 length) argument
274 rt2x00usb_register_write(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 value) argument
293 rt2x00usb_register_write_lock(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 value) argument
313 rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, const unsigned int offset, const void *value, const u32 length) argument
[all...]
/drivers/staging/tidspbridge/hw/
H A DMMURegAcM.h33 const u32 offset = MMU_MMU_SYSCONFIG_OFFSET;\
34 register u32 data = __raw_readl((base_address)+offset);\
41 __raw_writel(new_value, base_address+offset);\
46 const u32 offset = MMU_MMU_SYSCONFIG_OFFSET;\
47 register u32 data = __raw_readl((base_address)+offset);\
54 __raw_writel(new_value, base_address+offset);\
63 const u32 offset = MMU_MMU_IRQSTATUS_OFFSET;\
66 __raw_writel(new_value, (base_address)+offset);\
75 const u32 offset = MMU_MMU_IRQENABLE_OFFSET;\
78 __raw_writel(new_value, (base_address)+offset);\
[all...]
/drivers/bcma/
H A Dhost_soc.c13 static u8 bcma_host_soc_read8(struct bcma_device *core, u16 offset) argument
15 return readb(core->io_addr + offset);
18 static u16 bcma_host_soc_read16(struct bcma_device *core, u16 offset) argument
20 return readw(core->io_addr + offset);
23 static u32 bcma_host_soc_read32(struct bcma_device *core, u16 offset) argument
25 return readl(core->io_addr + offset);
28 static void bcma_host_soc_write8(struct bcma_device *core, u16 offset, argument
31 writeb(value, core->io_addr + offset);
34 static void bcma_host_soc_write16(struct bcma_device *core, u16 offset, argument
37 writew(value, core->io_addr + offset);
40 bcma_host_soc_write32(struct bcma_device *core, u16 offset, u32 value) argument
47 bcma_host_soc_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) argument
90 bcma_host_soc_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
135 bcma_host_soc_aread32(struct bcma_device *core, u16 offset) argument
140 bcma_host_soc_awrite32(struct bcma_device *core, u16 offset, u32 value) argument
[all...]
/drivers/ssb/
H A Ddriver_gige.c32 static inline u8 gige_read8(struct ssb_gige *dev, u16 offset) argument
34 return ssb_read8(dev->dev, offset);
37 static inline u16 gige_read16(struct ssb_gige *dev, u16 offset) argument
39 return ssb_read16(dev->dev, offset);
42 static inline u32 gige_read32(struct ssb_gige *dev, u16 offset) argument
44 return ssb_read32(dev->dev, offset);
48 u16 offset, u8 value)
50 ssb_write8(dev->dev, offset, value);
54 u16 offset, u16 value)
56 ssb_write16(dev->dev, offset, valu
47 gige_write8(struct ssb_gige *dev, u16 offset, u8 value) argument
53 gige_write16(struct ssb_gige *dev, u16 offset, u16 value) argument
59 gige_write32(struct ssb_gige *dev, u16 offset, u32 value) argument
66 gige_pcicfg_read8(struct ssb_gige *dev, unsigned int offset) argument
73 gige_pcicfg_read16(struct ssb_gige *dev, unsigned int offset) argument
80 gige_pcicfg_read32(struct ssb_gige *dev, unsigned int offset) argument
87 gige_pcicfg_write8(struct ssb_gige *dev, unsigned int offset, u8 value) argument
95 gige_pcicfg_write16(struct ssb_gige *dev, unsigned int offset, u16 value) argument
103 gige_pcicfg_write32(struct ssb_gige *dev, unsigned int offset, u32 value) argument
[all...]
/drivers/clocksource/
H A Dcyclone.c13 #define CYCLONE_PMCC_OFFSET 0x51A0 /* offset to control register */
14 #define CYCLONE_MPCS_OFFSET 0x51A8 /* offset to select register */
15 #define CYCLONE_MPMC_OFFSET 0x51D0 /* offset to count register */
38 unsigned long offset; local
50 offset = CYCLONE_CBAR_ADDR;
51 reg = ioremap_nocache(offset, sizeof(reg));
65 offset = base + CYCLONE_PMCC_OFFSET;
66 reg = ioremap_nocache(offset, sizeof(reg));
75 offset = base + CYCLONE_MPCS_OFFSET;
76 reg = ioremap_nocache(offset, sizeo
[all...]
/drivers/platform/x86/
H A Dintel_pmic_gpio.c41 /* register offset that IPC driver should use
92 static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) argument
94 if (offset > 8) {
98 return intel_scu_ipc_update_register(GPIO0 + offset,
103 unsigned offset, int value)
107 if (offset < 8)/* it is GPIO */
108 rc = intel_scu_ipc_update_register(GPIO0 + offset,
111 else if (offset < 16)/* it is GPOSW */
112 rc = intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8,
115 else if (offset > 1
102 pmic_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument
127 pmic_gpio_get(struct gpio_chip *chip, unsigned offset) argument
141 pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) argument
175 pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) argument
[all...]
/drivers/mtd/
H A Dar7part.c53 unsigned int offset; local
65 ar7_parts[0].offset = 0;
70 ar7_parts[1].offset = 0;
75 offset = pre_size;
76 mtd_read(master, offset, sizeof(header), &len,
79 ar7_parts[1].offset = pre_size;
87 pre_size = offset;
89 if (!ar7_parts[1].offset) {
90 ar7_parts[1].offset = master->size - master->erasesize;
97 offset
[all...]

Completed in 3639 milliseconds

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