Searched refs:vsync (Results 1 - 25 of 27) sorted by relevance

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/drivers/video/geode/
H A Dvideo_cs5530.c117 /* Enable DACs, hsync and vsync for CRTs */
141 int blank, hsync, vsync; local
145 blank = 0; hsync = 1; vsync = 1;
148 blank = 1; hsync = 1; vsync = 1;
151 blank = 1; hsync = 1; vsync = 0;
154 blank = 1; hsync = 0; vsync = 1;
157 blank = 1; hsync = 0; vsync = 0;
174 if (vsync)
180 if (hsync && vsync)
H A Dvideo_gx.c244 /* Disable hsync and vsync */
256 /* Enable hsync and vsync. */
302 int blank, hsync, vsync, crt; local
307 blank = 0; hsync = 1; vsync = 1; crt = 1;
310 blank = 1; hsync = 1; vsync = 1; crt = 1;
313 blank = 1; hsync = 1; vsync = 0; crt = 1;
316 blank = 1; hsync = 0; vsync = 1; crt = 1;
319 blank = 1; hsync = 0; vsync = 0; crt = 0;
331 if (vsync)
H A Dlxfb_ops.c529 int blank, hsync, vsync; local
534 blank = 0; hsync = 1; vsync = 1;
537 blank = 1; hsync = 1; vsync = 1;
540 blank = 1; hsync = 1; vsync = 0;
543 blank = 1; hsync = 0; vsync = 1;
546 blank = 1; hsync = 0; vsync = 0;
559 if (vsync)
566 if (vsync && hsync)
/drivers/video/
H A Dfbcvt.c46 u32 vsync; member in struct:fb_cvt_data
144 min_vbi_lines = FB_CVT_RB_V_FPORCH + cvt->vsync +
150 min_vbi_lines = cvt->vsync + FB_CVT_MIN_BPORCH +
280 mode->vsync_len = cvt->vsync;
362 cvt.vsync = fb_cvt_vbi_tab[cvt.aspect_ratio];
374 cvt.v_back_porch - cvt.vsync;
H A Dsh7760fb.c47 struct completion vsync; /* vsync irq event */ member in struct:sh7760fb_par
476 iowrite16(0, par->base + LDINTR); /* disable vsync irq */
480 "sh7760-lcdc", &par->vsync);
551 free_irq(par->irq, &par->vsync);
H A Dpxa168fb.h377 #define CFG_INV_VSYNC(vsync) ((vsync) << 3)
H A Dnuc900fb.c205 int vsync = var->height + var->lower_margin; local
215 regs->lcd_crtc_vr = LCM_CRTC_VR_EVAL(vsync + var->vsync_len) |
216 LCM_CRTC_VR_SVAL(vsync);
H A Dpm2fb.c522 u32 vsync = video; local
527 * The hardware cursor needs +vsync to recognise vert retrace.
529 * driver may well. So always set +hsync/+vsync and then set
532 vsync &= ~(PM2F_HSYNC_MASK | PM2F_VSYNC_MASK);
533 vsync |= PM2F_HSYNC_ACT_HIGH | PM2F_VSYNC_ACT_HIGH;
536 pm2_WR(p, PM2R_VIDEO_CONTROL, vsync);
544 tmp |= 8; /* invert vsync */
552 tmp |= 4; /* invert vsync */
749 DPRINTK("ignoring +vsync, using -vsync
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/drivers/gpu/drm/
H A Ddrm_modes.c102 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; local
155 vsync = 4;
157 vsync = 5;
159 vsync = 6;
161 vsync = 7;
163 vsync = 7;
165 vsync = 10;
188 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
189 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
193 vback_porch = vsyncandback_porch - vsync;
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H A Ddrm_edid.c67 /* use +hsync +vsync for detailed mode */
849 /* it is incorrect if hsync/vsync width is zero */
941 int vsync, vmin, vmax; local
949 vsync = drm_mode_vrefresh(mode);
951 return (vsync <= vmax && vsync >= vmin);
/drivers/media/video/
H A Dsoc_mediabus.c390 bool hsync = true, vsync = true, pclk, data, mode; local
399 vsync = common_flags & (V4L2_MBUS_VSYNC_ACTIVE_HIGH |
407 return (!hsync || !vsync || !pclk || !data || !mode) ?
/drivers/media/video/pwc/
H A Dpwc-if.c253 pdev->vsync = 0;
301 pdev->vsync = 0; /* Drop the current frame */
308 /* vsync: 0 = don't copy data
321 if (flen > 0 && pdev->vsync) {
324 if (pdev->vsync == 1) {
326 pdev->vsync = 2;
333 pdev->vsync = 0; /* Let's wait for an EOF */
342 if (pdev->vsync == 2)
348 pdev->vsync = 1;
372 pdev->vsync
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H A Dpwc.h246 char vsync; /* used by isoc handler */ member in struct:pwc_device
/drivers/video/intelfb/
H A Dintelfbhw.c402 dinfo->vsync.pan_offset = offset;
405 dinfo->vsync.pan_display = 1;
407 dinfo->vsync.pan_display = 0;
2031 if (dinfo->vsync.pan_display) {
2032 dinfo->vsync.pan_display = 0;
2033 OUTREG(DSPABASE, dinfo->vsync.pan_offset);
2036 dinfo->vsync.count++;
2037 wake_up_interruptible(&dinfo->vsync.wait);
2076 if (dinfo->vsync.pan_display) {
2077 dinfo->vsync
2094 struct intelfb_vsync *vsync; local
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H A Dintelfb.h339 /* vsync */
340 struct intelfb_vsync vsync; member in struct:intelfb_info
H A Dintelfbdrv.c907 init_waitqueue_head(&dinfo->vsync.wait);
910 dinfo->vsync.pan_display = 0;
911 dinfo->vsync.pan_offset = 0;
/drivers/gpu/drm/i915/
H A Dintel_crt.c373 uint32_t vsync = I915_READ(vsync_reg); local
374 uint32_t vsync_start = (vsync & 0xffff) + 1;
/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c1389 int vsync; local
1396 vsync = REG_READ((pipe == 0) ? VSYNC_A : VSYNC_B);
1408 vsync = (pipe == 0) ?
1424 mode->vsync_start = (vsync & 0xffff) + 1;
1425 mode->vsync_end = ((vsync & 0xffff0000) >> 16) + 1;
H A Dpsb_intel_display.c1203 int vsync; local
1210 vsync = REG_READ((pipe == 0) ? VSYNC_A : VSYNC_B);
1222 vsync = (pipe == 0) ?
1238 mode->vsync_start = (vsync & 0xffff) + 1;
1239 mode->vsync_end = ((vsync & 0xffff0000) >> 16) + 1;
/drivers/video/matrox/
H A Dmatroxfb_base.c211 minfo->crtc1.vsync.cnt++;
213 wake_up_interruptible(&minfo->crtc1.vsync.wait);
218 minfo->crtc2.vsync.cnt++;
219 wake_up_interruptible(&minfo->crtc2.vsync.wait);
276 vs = &minfo->crtc1.vsync;
282 vs = &minfo->crtc2.vsync;
871 vblank->count = minfo->crtc1.vsync.cnt;
1175 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
2073 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2074 init_waitqueue_head(&minfo->crtc2.vsync
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H A Dmatroxfb_base.h376 struct matrox_vsync vsync; member in struct:matrox_fb_info::__anon5828
382 struct matrox_vsync vsync; member in struct:matrox_fb_info::__anon5829
H A Dmatroxfb_crtc2.c417 vblank->count = minfo->crtc2.vsync.cnt;
/drivers/media/video/davinci/
H A Dvpif_capture.c1889 timings->bt.vsync))) {
1907 std_info->l3 = bt->vsync + bt->vbackporch + 1;
1912 bt->vfrontporch + bt->vsync + bt->vbackporch +
1929 bt->vsync + bt->vbackporch;
H A Dvpif_display.c1403 timings->bt.vsync))) {
1421 std_info->l3 = bt->vsync + bt->vbackporch + 1;
1426 bt->vfrontporch + bt->vsync + bt->vbackporch +
1443 bt->vsync + bt->vbackporch;
/drivers/media/video/ivtv/
H A Divtv-irq.c784 /* The vsync interrupt is unusual in that it won't clear until
786 * point it clears itself. This can result in repeated vsync
787 * interrupts, or a missed vsync. Read some of the registers
789 * one vsync per frame.
819 .u.vsync.field = V4L2_FIELD_TOP,
823 .u.vsync.field = V4L2_FIELD_BOTTOM,
896 /* The vsync interrupt is unusual and clears itself. If we
900 /* vsync is enabled, see if we're in a new field */
964 /* Decoder Vertical Sync - We can't rely on 'combo', so check if vsync enabled */
1018 /* If we've just handled a 'forced' vsync, i
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