/drivers/pci/ |
H A D | msi.h | 16 #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) 17 #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) 21 #define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) 22 #define multi_msix_capable(control) msix_table_size((control))
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H A D | ats.c | 191 u16 control, status; local 199 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); 201 if ((control & PCI_PRI_CTRL_ENABLE) || 209 control |= PCI_PRI_CTRL_ENABLE; 210 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); 224 u16 control; local 231 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); 232 control &= ~PCI_PRI_CTRL_ENABLE; 233 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); 245 u16 control; local 267 u16 control; local 300 u16 control, status; local 329 u16 status, control; local 360 u16 control, supported; local 394 u16 control = 0; local [all...] |
/drivers/net/irda/ |
H A D | act200l-sir.c | 143 u8 control[3]; local 156 control[0] = ACT200L_REG8 | (ACT200L_9600 & 0x0f); 157 control[1] = ACT200L_REG9 | ((ACT200L_9600 >> 4) & 0x0f); 160 control[0] = ACT200L_REG8 | (ACT200L_19200 & 0x0f); 161 control[1] = ACT200L_REG9 | ((ACT200L_19200 >> 4) & 0x0f); 164 control[0] = ACT200L_REG8 | (ACT200L_38400 & 0x0f); 165 control[1] = ACT200L_REG9 | ((ACT200L_38400 >> 4) & 0x0f); 168 control[0] = ACT200L_REG8 | (ACT200L_57600 & 0x0f); 169 control[1] = ACT200L_REG9 | ((ACT200L_57600 >> 4) & 0x0f); 172 control[ 202 static const u8 control[9] = { local [all...] |
H A D | mcp2120-sir.c | 102 u8 control[2]; local 120 control[0] = MCP2120_9600; 124 control[0] = MCP2120_19200; 128 control[0] = MCP2120_38400; 132 control[0] = MCP2120_57600; 136 control[0] = MCP2120_115200; 140 control[1] = MCP2120_COMMIT; 142 /* Write control bytes */ 143 sirdev_raw_write(dev, control, 2);
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H A D | girbil-sir.c | 42 #define GIRBIL_ECHO 0x08 /* Echo control characters */ 126 u8 control[2]; local 148 control[0] = GIRBIL_9600; 151 control[0] = GIRBIL_19200; 154 control[0] = GIRBIL_38400; 157 control[0] = GIRBIL_57600; 160 control[0] = GIRBIL_115200; 163 control[1] = GIRBIL_LOAD; 165 /* Write control bytes */ 166 sirdev_raw_write(dev, control, 209 u8 control = GIRBIL_TXEN | GIRBIL_RXEN; local [all...] |
/drivers/usb/gadget/ |
H A D | f_uvc.h | 20 const struct uvc_descriptor_header * const *control,
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/drivers/ata/ |
H A D | pata_oldpiix.c | 70 int control = 0; local 86 control |= 1; /* TIME */ 88 control |= 2; /* IE */ 92 control |= 4; /* PPE */ 102 idetm_data |= control; 105 idetm_data |= (control << 4); 146 unsigned int control; local 154 control = 3; /* IORDY|TIME0 */ 157 control |= 4; /* PPE enable */ 164 control | [all...] |
H A D | pata_jmicron.c | 46 u32 control; local 53 pci_read_config_dword(pdev, 0x40, &control); 54 if ((control & port_mask) == 0) 60 if (control & (1 << 23)) { 75 if (control & (1 << 22)) 85 if ((control & (1 << 5)) == 0) 87 if (control & (1 << 3)) /* 40/80 pin primary */
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H A D | pata_efar.c | 92 int control = 0; local 107 control |= 1; /* TIME */ 109 control |= 2; /* IE */ 112 control |= 4; /* PPE */ 121 master_data |= control; 129 master_data |= (control << 4); 198 unsigned int control; local 205 control = 3; /* IORDY|TIME1 */ 212 control |= 8; /* PIO cycles in PIO0 */ 216 master_data |= control << [all...] |
H A D | pata_it8213.c | 81 int control = 0; local 96 control |= 1; /* TIME */ 98 control |= 2; /* IE */ 101 control |= 4; /* PPE */ 108 master_data |= control; 115 master_data |= (control << 4); 193 unsigned int control; local 200 control = 3; /* IORDY|TIME1 */ 207 control |= 8; /* PIO cycles in PIO0 */ 211 master_data |= control << [all...] |
H A D | pata_radisys.c | 45 int control = 0; local 62 control |= 1; /* TIME1 enable */ 64 control |= 2; /* IE IORDY */ 71 idetm_data |= (control << (4 * adev->devno)); 118 int control = 3; /* IORDY|TIME0 */ local 124 control = 1; 126 /* Mask out the relevant control and timing bits we will load. Also 130 idetm_data |= control << (4 * adev->devno); 205 * and then hand over control to libata, for it to do the rest.
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/drivers/staging/media/lirc/ |
H A D | Kconfig | 10 with a remote control and the lirc daemon, the receiver drivers 11 allow control of your Linux system via remote control.
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/drivers/staging/iio/dds/ |
H A D | ad9834.c | 90 if (st->control & AD9834_MODE) { 96 st->control |= AD9834_OPBITEN; 98 st->control &= ~AD9834_OPBITEN; 100 st->data = cpu_to_be16(AD9834_REG_CMD | st->control); 105 st->control |= AD9834_PIN_SW; 107 st->control &= ~AD9834_PIN_SW; 108 st->data = cpu_to_be16(AD9834_REG_CMD | st->control); 114 st->control &= ~(this_attr->address | AD9834_PIN_SW); 116 st->control |= this_attr->address; 117 st->control [all...] |
H A D | ad5930.c | 29 u16 control; member in struct:ad5903_config 54 config->control = (config->control & ~value_mask); 55 config->incnum = (config->control & ~value_mask) | (1 << addr_shift); 56 config->frqdelt[0] = (config->control & ~value_mask) | (2 << addr_shift); 57 config->frqdelt[1] = (config->control & ~value_mask) | 3 << addr_shift; 58 config->incitvl = (config->control & ~value_mask) | 4 << addr_shift; 59 config->buritvl = (config->control & ~value_mask) | 8 << addr_shift; 60 config->strtfrq[0] = (config->control & ~value_mask) | 0xc << addr_shift; 61 config->strtfrq[1] = (config->control [all...] |
/drivers/media/video/hdpvr/ |
H A D | Makefile | 1 hdpvr-objs := hdpvr-control.o hdpvr-core.o hdpvr-video.o hdpvr-i2c.o
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/drivers/net/wimax/i2400m/ |
H A D | debug-levels.h | 3 * Debug levels control file for the i2400m module 34 D_SUBMODULE_DECLARE(control),
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/drivers/staging/line6/ |
H A D | Makefile | 6 control.o \
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/drivers/rtc/ |
H A D | rtc-ds3232.c | 44 #define DS3232_REG_SR 0x0F /* control/status register */ 68 int control, stat; local 90 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 91 if (control < 0) 92 return control; 94 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 95 control |= DS3232_REG_CR_INTCN; 97 return i2c_smbus_write_byte_data(client, DS3232_REG_CR, control); 192 int control, stat; local 205 control 238 int control, stat; local 286 int control; local 356 int stat, control; local [all...] |
H A D | rtc-m48t35.c | 28 u8 control; member in struct:m48t35_rtc 52 u8 control; local 61 control = readb(&priv->reg->control); 62 writeb(control | M48T35_RTC_READ, &priv->reg->control); 69 writeb(control, &priv->reg->control); 96 u8 control; local 126 control [all...] |
H A D | rtc-ds1672.c | 76 buf[5] = 0; /* set control reg to enable counting */ 103 {client->addr, I2C_M_RD, 1, status}, /* read control */ 106 /* read control register */ 120 u8 control; local 123 err = ds1672_get_control(client, &control); 127 return sprintf(buf, "%s\n", (control & DS1672_REG_CONTROL_EOSC) 131 static DEVICE_ATTR(control, S_IRUGO, show_control, NULL); 152 u8 control; local 170 /* read control register */ 171 err = ds1672_get_control(client, &control); [all...] |
/drivers/acpi/acpica/ |
H A D | dscontrol.c | 3 * Module Name: dscontrol - Support for execution control opcodes - 59 * Op - The control Op 63 * DESCRIPTION: Handles all control ops encountered during control method 84 * There is no need to allocate a new control state. 87 if (walk_state->control_state->control. 104 * IF/WHILE: Create a new control state to manage these 117 control_state->control.aml_predicate_start = 119 control_state->control.package_end = 121 control_state->control [all...] |
/drivers/dma/ |
H A D | ep93xx_dma.c | 133 * @runtime_ctrl: M2M runtime values for the control register. 291 static void m2p_set_control(struct ep93xx_dma_chan *edmac, u32 control) argument 293 writel(control, edmac->regs + M2P_CONTROL); 296 * write to the control register. 304 u32 control; local 308 control = M2P_CONTROL_CH_ERROR_INT | M2P_CONTROL_ICE 310 m2p_set_control(edmac, control); 322 u32 control; local 324 control = readl(edmac->regs + M2P_CONTROL); 325 control 366 u32 control = readl(edmac->regs + M2P_CONTROL); local 382 u32 control; local 443 u32 control = 0; local 533 u32 control = readl(edmac->regs + M2M_CONTROL); local 565 u32 control; local [all...] |
/drivers/hwmon/ |
H A D | pcf8591.c | 43 * The PCF8591 control byte 83 u8 control; member in struct:pcf8591_data 131 i2c_smbus_write_byte_data(client, data->control, data->aout); 142 return sprintf(buf, "%u\n", !(!(data->control & PCF8591_CONTROL_AOEF))); 160 data->control |= PCF8591_CONTROL_AOEF; 162 data->control &= ~PCF8591_CONTROL_AOEF; 163 i2c_smbus_write_byte(client, data->control); 266 data->control = PCF8591_INIT_CONTROL; 269 i2c_smbus_write_byte_data(client, data->control, data->aout); 286 if ((data->control [all...] |
/drivers/ide/ |
H A D | jmicron.c | 33 u32 control; local 39 pci_read_config_dword(pdev, 0x40, &control); 44 if (control & (1 << 23)) { 59 if (control & (1 << 22)) 69 if (control & (1 << 3)) /* 40/80 pin primary */ 79 /* Avoid bogus "control reaches end of non-void function" */
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/drivers/net/wireless/wl1251/ |
H A D | tx.c | 83 struct ieee80211_tx_info *control, u16 fc) 85 *(u16 *)&tx_hdr->control = 0; 87 tx_hdr->control.rate_policy = 0; 90 tx_hdr->control.packet_type = 0; 92 if (control->flags & IEEE80211_TX_CTL_NO_ACK) 93 tx_hdr->control.ack_policy = 1; 95 tx_hdr->control.tx_complete = 1; 100 tx_hdr->control.qos = 1; 144 struct ieee80211_tx_info *control) 163 rate = ieee80211_get_tx_rate(wl->hw, control); 82 wl1251_tx_control(struct tx_double_buffer_desc *tx_hdr, struct ieee80211_tx_info *control, u16 fc) argument 143 wl1251_tx_fill_hdr(struct wl1251 *wl, struct sk_buff *skb, struct ieee80211_tx_info *control) argument 177 wl1251_tx_send_packet(struct wl1251 *wl, struct sk_buff *skb, struct ieee80211_tx_info *control) argument [all...] |