| b54efe809f258af2bd1cfbde6e196f70a8a33081 |
|
12-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM 'adr' fixups don't need the interworking addend tweaking.
They reference the PC directly, so things work properly that way.
rdar://11231229
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| bf3c322640fdaf6e4a60a59ed8cb108a7f6685ad |
|
30-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM fix encoding fixup resolution for ldrd and friends.
The 8-bit payload is not contiguous in the opcode. Move the upper nibble
over 4 bits into the correct place.
rdar://11158641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| cb0809b82b126e79b99755ae4fc3d9733faea038 |
|
30-Mar-2012 |
James Molloy <james.molloy@arm.com> |
Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch.
Patch by Tim Northover!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153737 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 4e02f23de24375294005f88b5254a3775d39fcb2 |
|
27-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Prune some includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| f1d0f7781e766df878bec4e7977fa3204374f394 |
|
26-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Prune some includes and forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153429 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| fa1f74470a51a57b7b8feb4c4ba18501c3f2709a |
|
19-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM branch relaxation for unconditional t1 branches.
rdar://11059157
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153055 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 7b25ecf6adbf3c4709c48033acfeb6ebbb4452ab |
|
27-Feb-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM BL/BLX instruction fixups should use relocations.
We on the linker to resolve calls to the appropriate BL/BLX instruction
to make interworking function correctly. It uses the symbol in the
relocation to do that, so we need to be careful about being too clever.
To enable this for ARM mode, split the BL/BLX fixup kind off from the
unconditional-branch fixups.
rdar://10927209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| e545ee20f1b6ea6c03919cc9bc1a4a059c2f03b6 |
|
19-Jan-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence warnings about mixing enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 9363c58dc2473a6470d3e7037afe8a215bee7e3e |
|
19-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 relaxation for tADR to t2ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| d26bad079d6977309699e0bc9203451904acbd86 |
|
19-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Add comment and fix range check in condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 256ba4f42a16da2b3ffc757aa7bf191890765580 |
|
18-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 relaxation for LDR(literal).
If the fixup is out of range for the Thumb1 instruction, relax it
to the Thumb2 encoding instead.
rdar://10711829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| ec3433852dd11e8ff60c9610b4c84468e5935f2b |
|
18-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. MCAsmBackend naming conventions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 5a7efa7f134dd6f8f927c162d9f4062eaa3eb4ac |
|
18-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 load/store fixups don't set the thumb bit.
Load/store instructions w/ a fixup to be relative a function marked as thumb
don't use the low bit to specify thumb vs. non-thumb like interworking
branches do, so don't set it when dealing with those fixups.
rdar://10348687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 9b5b125c34b47e0e7eef2548acee8bf1448c4b71 |
|
18-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Move some ARM specific MCAssmebler bits into the ARMAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 69bbda03918a18bd4477bb254d51346ee3033567 |
|
22-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move the ARM specific parts of the ELF writer to Target/ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147115 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| dc9a8a378daf432d8dcfc178507afe149706f9a6 |
|
21-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Reduce the exposure of Triple::OSType in the ELF object writer. This will
avoid including ADT/Triple.h in many places when the target specific bits are
moved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 2f196747f15240691bd4e622f7995edfedf90f61 |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding support for LDRD(label).
rdar://9932658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| cb86509e7a0f831e28c89f84c22a409115d01c38 |
|
06-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up value checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145895 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| d9a6e8978dd65c85d68bf1141d992da576878cd8 |
|
06-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix ARM handling of tBcc branch relaxation.
rdar://10069056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 370b78d795154899a22ca2b4674e890661ff1d59 |
|
06-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Move target-specific logic out of generic MCAssembler.
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| f503ef6800fcbda99d6ae581ee8cfe3204becb3c |
|
06-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Simple branch relaxation for Thumb2 Bcc instructions.
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 2abba8496cb394af53b531e95067d5cae78bb9ee |
|
16-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Generalize the fixup info for ARM mode.
We don't (yet) have the granularity in the fixups to be specific about which
bitranges are affected. That's a future cleanup, but we're not there yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| b84acd24687c721e3da46bb56a94d393bc5a8cbc |
|
16-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix encoding of NOP used for padding in ARM mode .align.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144842 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 681460f954e9c13ffd2f02f27bba048ccf90abaf |
|
01-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VLD/VST assembly parsing for symbolic address operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| f391e9f696183a8dfb6b0d1e791687a520552f85 |
|
01-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Correct for my over-eager delete finger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 98602ac9a99c5243a9e1abdb0e72dd326ec4958d |
|
30-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Fixup valus for movt/movw are for the whole value.
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.
rdar://9653509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| b9d3ff872908bcf648b826c1c48db2cacd813b95 |
|
25-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM asm backend initialize isThumbMode based on target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138501 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 67b95f902a51b591b6178e370d23ffaca841275d |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LDR(literal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 90b5a08e1ffc4a1c18f7fa964ca561fa4b03c314 |
|
18-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Thumb blx instruction fixup has same data range as bl.
These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| d0d3f7e01ff7f83575816f6e1d75aa2224ebc2cb |
|
16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM .align NOP padding uses different encoding pre-ARMv6.
Patch by Kristof Beyls and James Malloy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137723 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| 78c10eeaa57d1c6c4b7781d3c0bcb0cfbbc43b5c |
|
26-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| a7cfc08ebe737062917b442830eb5321b0f79e89 |
|
23-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|
| be74029f44c32efc09274a16cbff588ad10dc5ea |
|
23-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink ARM mc routines into MCTargetDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
|