/external/llvm/lib/Target/X86/Utils/ |
H A D | X86ShuffleDecode.h | 38 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); 40 void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); 44 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates 47 void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); 50 /// and punpckh*. VT indicates the type of the vector allowing it to handle 52 void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); 55 /// and punpckl*. VT indicates the type of the vector allowing it to handle 57 void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask); 60 void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, 64 /// No VT provide [all...] |
H A D | X86ShuffleDecode.cpp | 65 /// VT indicates the type of the vector allowing it to handle different 67 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { argument 68 unsigned NumElts = VT.getVectorNumElements(); 70 unsigned NumLanes = VT.getSizeInBits() / 128; 83 void DecodePSHUFHWMask(MVT VT, unsigned Imm, argument 85 unsigned NumElts = VT.getVectorNumElements(); 99 void DecodePSHUFLWMask(MVT VT, unsigned Imm, argument 101 unsigned NumElts = VT.getVectorNumElements(); 115 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates 118 void DecodeSHUFPMask(MVT VT, unsigne argument 140 DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) argument 160 DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) argument 177 DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument [all...] |
/external/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 187 virtual EVT getSetCCResultType(EVT VT) const; 222 virtual const TargetRegisterClass *getRegClassFor(EVT VT) const { 223 assert(VT.isSimple() && "getRegClassFor called on illegal type!"); 224 const TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy]; 234 virtual const TargetRegisterClass *getRepRegClassFor(EVT VT) const { 235 assert(VT.isSimple() && "getRepRegClassFor called on illegal type!"); 236 const TargetRegisterClass *RC = RepRegClassForVT[VT.getSimpleVT().SimpleTy]; 242 virtual uint8_t getRepRegClassCostFor(EVT VT) const { 243 assert(VT.isSimple() && "getRepRegClassCostFor called on illegal type!"); 244 return RepRegClassCostForVT[VT 270 setTypeAction(EVT VT, LegalizeTypeAction Action) argument 1082 addRegisterClass(EVT VT, const TargetRegisterClass *RC) argument 1099 setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) argument [all...] |
H A D | TargetCallingConv.h | 113 MVT VT; member in struct:llvm::ISD::InputArg 116 InputArg() : VT(MVT::Other), Used(false) {} 119 VT = vt.getSimpleVT(); 129 MVT VT; member in struct:llvm::ISD::OutputArg 137 VT = vt.getSimpleVT();
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/external/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 72 MVT ArgVT = Ins[i].VT; 90 MVT VT = Outs[i].VT; local 92 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) 104 MVT VT = Outs[i].VT; local 106 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { 109 << EVT(VT) 158 MVT VT = Ins[i].VT; local 172 AnalyzeCallResult(MVT VT, CCAssignFn Fn) argument [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { argument 63 switch (VT.getSimpleVT().SimpleTy) { 90 bool ConstantFPSDNode::isValueValidForType(EVT VT, argument 92 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 95 if (VT == MVT::ppcf128 || 102 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 688 EVT VT = cast<VTSDNode>(N)->getVT(); local 689 if (VT.isExtended()) { 690 Erased = ExtendedValueTypeNodes.erase(VT); 692 Erased = ValueTypeNodes[VT 808 EVT VT = N->getValueType(0); local 938 getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) argument 944 getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) argument 950 getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) argument 956 getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) argument 970 getNOT(DebugLoc DL, SDValue Val, EVT VT) argument 977 getConstant(uint64_t Val, EVT VT, bool isT) argument 985 getConstant(const APInt &Val, EVT VT, bool isT) argument 989 getConstant(const ConstantInt &Val, EVT VT, bool isT) argument 1038 getConstantFP(const APFloat& V, EVT VT, bool isTarget) argument 1042 getConstantFP(const ConstantFP& V, EVT VT, bool isTarget) argument 1076 getConstantFP(double Val, EVT VT, bool isTarget) argument 1092 getGlobalAddress(const GlobalValue *GV, DebugLoc DL, EVT VT, int64_t Offset, bool isTargetGA, unsigned char TargetFlags) argument 1134 getFrameIndex(int FI, EVT VT, bool isTarget) argument 1149 getJumpTable(int JTI, EVT VT, bool isTarget, unsigned char TargetFlags) argument 1169 getConstantPool(const Constant *C, EVT VT, unsigned Alignment, int Offset, bool isTarget, unsigned char TargetFlags) argument 1196 getConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Alignment, int Offset, bool isTarget, unsigned char TargetFlags) argument 1222 getTargetIndex(int Index, EVT VT, int64_t Offset, unsigned char TargetFlags) argument 1254 getValueType(EVT VT) argument 1268 getExternalSymbol(const char *Sym, EVT VT) argument 1276 getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags) argument 1314 getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, const int *Mask) argument 1404 getConvertRndSat(EVT VT, DebugLoc dl, SDValue Val, SDValue DTy, SDValue STy, SDValue Rnd, SDValue Sat, ISD::CvtCode Code) argument 1428 getRegister(unsigned RegNo, EVT VT) argument 1472 getBlockAddress(const BlockAddress *BA, EVT VT, bool isTarget, unsigned char TargetFlags) argument 1539 CreateStackTemporary(EVT VT, unsigned minAlign) argument 1566 FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, DebugLoc dl) argument 1934 EVT VT = LD->getMemoryVT(); local 2002 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); local 2140 EVT VT = Op.getValueType(); local 2415 getNode(unsigned Opcode, DebugLoc DL, EVT VT) argument 2432 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue Operand) argument 2699 FoldConstantArithmetic(unsigned Opcode, EVT VT, ConstantSDNode *Cst1, ConstantSDNode *Cst2) argument 2735 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2) argument 3198 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) argument 3288 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument 3295 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument 3338 getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, DebugLoc dl) argument 3364 getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, const TargetLowering &TLI, StringRef Str) argument 3402 EVT VT = Base.getValueType(); local 3446 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, local 3552 EVT VT = MemOps[i]; local 3643 EVT VT = MemOps[i]; local 3659 EVT VT = MemOps[i]; local 3724 EVT VT = MemOps[i]; local 3971 EVT VT = Cmp.getValueType(); local 4043 EVT VT = Val.getValueType(); local 4065 getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, const Value* PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 4096 getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 4242 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument 4275 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) argument 4322 getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument 4335 getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, unsigned Alignment, const MDNode *TBAAInfo) argument 4390 EVT VT = Val.getValueType(); local 4442 EVT VT = Val.getValueType(); local 4506 getVAArg(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align) argument 4514 getNode(unsigned Opcode, DebugLoc DL, EVT VT, const SDUse *Ops, unsigned NumOps) argument 4530 getNode(unsigned Opcode, DebugLoc DL, EVT VT, const SDValue *Ops, unsigned NumOps) argument 4703 getVTList(EVT VT) argument 4910 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT) argument 4916 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1) argument 4923 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2) argument 4931 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument 4939 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, const SDValue *Ops, unsigned NumOps) argument 5128 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) argument 5134 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) argument 5141 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2) argument 5149 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument 5157 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, const SDValue *Ops, unsigned NumOps) argument 5287 getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, SDValue Operand) argument 5298 getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, SDValue Operand, SDValue Subreg) argument 5772 GlobalAddressSDNode(unsigned Opc, DebugLoc DL, const GlobalValue *GA, EVT VT, int64_t o, unsigned char TF) argument 5825 getValueTypeList(EVT VT) argument 5976 EVT VT = N->getValueType(0); local 6145 EVT VT = getValueType(0); local 6205 isSplatMask(const int *Mask, EVT VT) argument [all...] |
H A D | DAGCombiner.cpp | 257 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 261 SDValue CombineConsecutiveLoads(SDNode *N, EVT VT); 320 /// legalization or if the specified VT is legal. 321 bool isTypeLegal(const EVT &VT) { argument 323 return TLI.isTypeLegal(VT); 569 EVT VT = N0.getValueType(); local 574 DAG.FoldConstantArithmetic(Opc, VT, 577 return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode); 581 SDValue OpNode = DAG.getNode(Opc, N0.getDebugLoc(), VT, 584 return DAG.getNode(Opc, DL, VT, OpNod 701 EVT VT = Load->getValueType(0); local 1346 EVT VT = N0.getValueType(); local 1370 EVT VT = N0.getValueType(); local 1534 EVT VT = N0.getValueType(); local 1591 tryFoldToZero(DebugLoc DL, const TargetLowering &TLI, EVT VT, SelectionDAG &DAG, bool LegalOperations) argument 1613 EVT VT = N0.getValueType(); local 1699 EVT VT = N0.getValueType(); local 1744 EVT VT = N0.getValueType(); local 1838 EVT VT = N->getValueType(0); local 1922 EVT VT = N->getValueType(0); local 1974 EVT VT = N->getValueType(0); local 2016 EVT VT = N->getValueType(0); local 2068 EVT VT = N->getValueType(0); local 2106 EVT VT = N->getValueType(0); local 2292 EVT VT = N0.getValueType(); local 2411 EVT VT = N1.getValueType(); local 2497 EVT VT = Vector->getValueType(0); local 3010 EVT VT = N1.getValueType(); local 3169 EVT VT = LHS.getValueType(); local 3330 EVT VT = N0.getValueType(); local 3520 EVT VT = N0.getValueType(); local 3650 EVT VT = N0.getValueType(); local 3795 EVT VT = N0.getValueType(); local 3985 EVT VT = N->getValueType(0); local 3995 EVT VT = N->getValueType(0); local 4005 EVT VT = N->getValueType(0); local 4015 EVT VT = N->getValueType(0); local 4025 EVT VT = N->getValueType(0); local 4040 EVT VT = N->getValueType(0); local 4249 EVT VT = N->getValueType(0); local 4509 EVT VT = N->getValueType(0); local 4781 EVT VT = N->getValueType(0); local 4986 EVT VT = N->getValueType(0); local 5119 EVT VT = N->getValueType(0); local 5228 EVT VT = N->getValueType(0); local 5332 CombineConsecutiveLoads(SDNode *N, EVT VT) argument 5366 EVT VT = N->getValueType(0); local 5513 EVT VT = N->getValueType(0); local 5533 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, local 5610 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, Ops.size()); local 5619 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, local 5657 EVT VT = N->getValueType(0); local 5843 EVT VT = N->getValueType(0); local 5935 EVT VT = N->getValueType(0); local 6000 EVT VT = N->getValueType(0); local 6072 EVT VT = N->getValueType(0); local 6126 EVT VT = N->getValueType(0); local 6140 EVT VT = N->getValueType(0); local 6188 EVT VT = N->getValueType(0); local 6245 EVT VT = N->getValueType(0); local 6289 EVT VT = N->getValueType(0); local 6301 EVT VT = N->getValueType(0); local 6314 EVT VT = N->getValueType(0); local 6347 EVT VT = N->getValueType(0); local 6363 EVT VT = N->getValueType(0); local 6410 EVT VT = N->getValueType(0); local 6474 EVT VT = N->getValueType(0); local 6486 EVT VT = N->getValueType(0); local 6498 EVT VT = N->getValueType(0); local 6510 EVT VT = N->getValueType(0); local 6721 EVT VT; local 6768 EVT VT; local 6895 EVT VT; local 7281 EVT VT = Value.getValueType(); local 7403 EVT VT = LD->getMemoryVT(); local 7706 EVT VT = InVec.getValueType(); local 7915 EVT VT = N->getValueType(0); local 8183 EVT VT = N->getValueType(0); local 8377 EVT VT = N->getValueType(0); local 8462 EVT VT = LHSOp.getValueType(); local 8917 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, DebugLoc DL, bool foldBooleans) argument [all...] |
H A D | LegalizeDAG.cpp | 89 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLoc dl, 93 void LegalizeSetCCCondCode(EVT VT, SDValue &LHS, SDValue &RHS, SDValue &CC, 181 SelectionDAGLegalize::ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLoc dl, argument 184 unsigned NumMaskElts = VT.getVectorNumElements(); 255 EVT VT = CFP->getValueType(0); local 258 assert((VT == MVT::f64 || VT == MVT::f32) && "Invalid type expansion"); 260 (VT == MVT::f64) ? MVT::i64 : MVT::i32); 263 EVT OrigVT = VT; 264 EVT SVT = VT; 305 EVT VT = Val.getValueType(); local 426 EVT VT = LD->getValueType(0); local 581 EVT VT = Tmp1.getValueType(); local 713 EVT VT = Value.getValueType(); local [all...] |
H A D | TargetLowering.cpp | 527 for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) { 531 setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand); 532 setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand); 536 setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand); 537 setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand); 631 /// VT must be a legal type. 632 bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const { 633 assert(isTypeLegal(VT)); 648 getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, unsigned &NumIntermediates, EVT &RegisterVT, TargetLowering *TLI) argument 816 MVT VT = (MVT::SimpleValueType)i; local 919 getVectorTypeBreakdown(LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, EVT &RegisterVT) const argument 996 EVT VT = ValueVTs[j]; local 1123 EVT VT = Op.getValueType(); local 1351 EVT VT = Op.getValueType(); local 1366 EVT VT = Op.getValueType(); local 1442 EVT VT = Op.getValueType(); local 1481 EVT VT = Op.getValueType(); local 1534 EVT VT = Op.getValueType(); local 1769 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); local 1905 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, DebugLoc dl) const argument 3323 EVT VT = N->getValueType(0); local 3383 EVT VT = N->getValueType(0); local [all...] |
H A D | FastISel.cpp | 131 MVT VT = RealVT.getSimpleVT(); 132 if (!TLI.isTypeLegal(VT)) { 134 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) 135 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT(); 156 Reg = materializeRegForValue(V, VT); 166 unsigned FastISel::materializeRegForValue(const Value *V, MVT VT) { argument 171 Reg = FastEmit_i(VT, V 341 EVT VT = EVT::getEVT(I->getType(), /*HandleUnknown=*/true); local 462 MVT VT = TLI.getPointerTy(); local 862 EVT VT = TLI.getValueType(I->getType()); local 1124 FastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType) argument 1399 FastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill) argument 1443 EVT VT = TLI.getValueType(PN->getType(), /*AllowUnknown=*/true); local [all...] |
H A D | LegalizeVectorOps.cpp | 294 EVT VT = Op.getValueType(); local 297 EVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT); 310 return DAG.getNode(ISD::BITCAST, dl, VT, Op); 316 EVT VT = Op.getOperand(0).getValueType(); local 327 unsigned NumElts = VT.getVectorNumElements(); 328 EVT EltVT = VT.getVectorElementType(); 446 EVT VT = Op.getValueType(); local 453 assert(VT.isVector() && !Mask.getValueType().isVector() 456 unsigned NumElem = VT.getVectorNumElements(); 463 if (TLI.getOperationAction(ISD::AND, VT) 505 EVT VT = Op.getOperand(0).getValueType(); local 545 EVT VT = Op.getOperand(0).getValueType(); local 594 EVT VT = Op.getValueType(); local [all...] |
H A D | ResourcePriorityQueue.cpp | 97 EVT VT = ScegN->getValueType(i); local 98 if (TLI->isTypeLegal(VT) 99 && (TLI->getRegClassFor(VT)->getID() == RCId)) { 135 EVT VT = Op.getNode()->getValueType(Op.getResNo()); local 136 if (TLI->isTypeLegal(VT) 137 && (TLI->getRegClassFor(VT)->getID() == RCId)) { 335 EVT VT = SU->getNode()->getValueType(i); local 336 if (TLI->isTypeLegal(VT) 337 && TLI->getRegClassFor(VT) 338 && TLI->getRegClassFor(VT) 344 EVT VT = Op.getNode()->getValueType(Op.getResNo()); local 488 EVT VT = ScegN->getValueType(i); local 499 EVT VT = Op.getNode()->getValueType(Op.getResNo()); local [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 356 SDVTList getVTList(EVT VT); 365 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false); 366 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false); 367 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false); 369 SDValue getTargetConstant(uint64_t Val, EVT VT) { argument 370 return getConstant(Val, VT, true); 372 SDValue getTargetConstant(const APInt &Val, EVT VT) { argument 373 return getConstant(Val, VT, true); 375 SDValue getTargetConstant(const ConstantInt &Val, EVT VT) { argument 376 return getConstant(Val, VT, tru 383 getTargetConstantFP(double Val, EVT VT) argument 386 getTargetConstantFP(const APFloat& Val, EVT VT) argument 389 getTargetConstantFP(const ConstantFP &Val, EVT VT) argument 395 getTargetGlobalAddress(const GlobalValue *GV, DebugLoc DL, EVT VT, int64_t offset = 0, unsigned char TargetFlags = 0) argument 401 getTargetFrameIndex(int FI, EVT VT) argument 406 getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) argument 412 getTargetConstantPool(const Constant *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags = 0) argument 420 getTargetConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags=0) argument 465 getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, EVT VT) argument 474 getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, EVT VT, SDValue Glue) argument 540 getUNDEF(EVT VT) argument 546 getGLOBAL_OFFSET_TABLE(EVT VT) argument 608 getSetCC(DebugLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) argument [all...] |
H A D | ValueTypes.h | 392 static MVT getVectorVT(MVT VT, unsigned NumElements) { argument 393 switch (VT.SimpleTy) { 454 bool operator==(EVT VT) const { 455 return !(*this != VT); 457 bool operator!=(EVT VT) const { 458 if (V.SimpleTy != VT.V.SimpleTy) 461 return LLVMTy != VT.LLVMTy; 482 /// length, where each element is of type VT. 483 static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements) { argument 484 MVT M = MVT::getVectorVT(VT [all...] |
H A D | FastISel.h | 163 virtual unsigned FastEmit_(MVT VT, 171 virtual unsigned FastEmit_r(MVT VT, 180 virtual unsigned FastEmit_rr(MVT VT, 190 virtual unsigned FastEmit_ri(MVT VT, 200 virtual unsigned FastEmit_rf(MVT VT, 210 virtual unsigned FastEmit_rri(MVT VT, 221 unsigned FastEmit_ri_(MVT VT, 229 virtual unsigned FastEmit_i(MVT VT, 237 virtual unsigned FastEmit_f(MVT VT, 333 unsigned FastEmitZExtFromI1(MVT VT, [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonCallingConvLower.cpp | 81 EVT ArgVT = Ins[i].VT; 117 EVT VT = Outs[i].VT; local 119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){ 121 << VT.getEVTString() << "\n"; 147 EVT ArgVT = Outs[i].VT; 185 EVT VT = Ins[i].VT; local 187 if (Fn(i, VT, V 197 AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) argument [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 58 static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1, 68 EVT VT = Vec.getValueType(); local 69 assert(VT.is256BitVector() && "Unexpected vector size!"); 70 EVT ElVT = VT.getVectorElementType(); 71 unsigned Factor = VT.getSizeInBits()/128; 73 VT.getVectorNumElements()/Factor); 107 EVT VT = Vec.getValueType(); 108 assert(VT.is128BitVector() && "Unexpected vector size!"); 110 EVT ElVT = VT.getVectorElementType(); 130 static SDValue Concat128BitVectors(SDValue V1, SDValue V2, EVT VT, argument 355 MVT VT = IntVTs[i]; local 502 MVT VT = IntVTs[i]; local 881 MVT VT = (MVT::SimpleValueType)i; local 907 MVT VT = (MVT::SimpleValueType)i; local 1135 MVT VT = (MVT::SimpleValueType)i; local 1157 MVT VT = (MVT::SimpleValueType)i; local 1197 MVT VT = IntVTs[i]; local 1640 getTypeForExtArgOrReturn(LLVMContext &Context, EVT VT, ISD::NodeType ExtendKind) const argument 2142 EVT VT = getPointerTy(); local 2163 EVT VT = Is64Bit ? MVT::i64 : MVT::i32; local 2942 getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, SelectionDAG &DAG) argument 2953 getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, unsigned TargetMask, SelectionDAG &DAG) argument 2967 getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) argument 2980 getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, SDValue V2, SelectionDAG &DAG) argument 3213 isPSHUFDMask(ArrayRef<int> Mask, EVT VT) argument 3223 isPSHUFHWMask(ArrayRef<int> Mask, EVT VT, bool HasAVX2) argument 3252 isPSHUFLWMask(ArrayRef<int> Mask, EVT VT, bool HasAVX2) argument 3281 isPALIGNRMask(ArrayRef<int> Mask, EVT VT, const X86Subtarget *Subtarget) argument 3371 isSHUFPMask(ArrayRef<int> Mask, EVT VT, bool HasAVX, bool Commuted = false) argument 3424 isMOVHLPSMask(ArrayRef<int> Mask, EVT VT) argument 3443 isMOVHLPS_v_undef_Mask(ArrayRef<int> Mask, EVT VT) argument 3460 isMOVLPMask(ArrayRef<int> Mask, EVT VT) argument 3482 isMOVLHPSMask(ArrayRef<int> Mask, EVT VT) argument 3508 EVT VT = SVOp->getValueType(0); local 3551 isUNPCKLMask(ArrayRef<int> Mask, EVT VT, bool HasAVX2, bool V2IsSplat = false) argument 3590 isUNPCKHMask(ArrayRef<int> Mask, EVT VT, bool HasAVX2, bool V2IsSplat = false) argument 3628 isUNPCKL_v_undef_Mask(ArrayRef<int> Mask, EVT VT, bool HasAVX2) argument 3671 isUNPCKH_v_undef_Mask(ArrayRef<int> Mask, EVT VT, bool HasAVX2) argument 3703 isMOVLMask(ArrayRef<int> Mask, EVT VT) argument 3727 isVPERM2X128Mask(ArrayRef<int> Mask, EVT VT, bool HasAVX) argument 3759 EVT VT = SVOp->getValueType(0); local 3787 isVPERMILPMask(ArrayRef<int> Mask, EVT VT, bool HasAVX) argument 3818 isCommutedMOVLMask(ArrayRef<int> Mask, EVT VT, bool V2IsSplat = false, bool V2IsUndef = false) argument 3842 isMOVSHDUPMask(ArrayRef<int> Mask, EVT VT, const X86Subtarget *Subtarget) argument 3865 isMOVSLDUPMask(ArrayRef<int> Mask, EVT VT, const X86Subtarget *Subtarget) argument 3888 isMOVDDUPYMask(ArrayRef<int> Mask, EVT VT, bool HasAVX) argument 3908 isMOVDDUPMask(ArrayRef<int> Mask, EVT VT) argument 3964 EVT VT = N->getValueType(0); local 3994 EVT VT = N->getValueType(0); local 4018 EVT VT = N->getValueType(0); local 4042 EVT VT = SVOp->getValueType(0); local 4101 EVT VT = N->getValueType(0); local 4131 EVT VT = SVOp->getValueType(0); local 4153 ShouldXformToMOVHLPS(ArrayRef<int> Mask, EVT VT) argument 4209 ShouldXformToMOVLP(SDNode *V1, SDNode *V2, ArrayRef<int> Mask, EVT VT) argument 4277 getZeroVector(EVT VT, const X86Subtarget *Subtarget, SelectionDAG &DAG, DebugLoc dl) argument 4315 getOnesVector(EVT VT, bool HasAVX2, SelectionDAG &DAG, DebugLoc dl) argument 4350 getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1, SDValue V2) argument 4361 getUnpackl(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1, SDValue V2) argument 4373 getUnpackh(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1, SDValue V2) argument 4389 EVT VT = V.getValueType(); local 4407 EVT VT = V.getValueType(); local 4479 EVT VT = V2.getValueType(); local 4493 getTargetShuffleMask(SDNode *N, MVT VT, SmallVectorImpl<int> &Mask, bool &IsUnary) argument 4576 EVT VT = V.getValueType(); local 4845 getVShift(bool isLeft, EVT VT, SDValue SrcOp, unsigned NumBits, SelectionDAG &DAG, const TargetLowering &TLI, DebugLoc dl) argument 4859 LowerAsSplatVectorLoad(SDValue SrcOp, EVT VT, DebugLoc dl, SelectionDAG &DAG) const argument 4942 EltsFromConsecutiveLoads(EVT VT, SmallVectorImpl<SDValue> &Elts, DebugLoc &DL, SelectionDAG &DAG) argument 5155 EVT VT = Op.getValueType(); local 5232 EVT VT = Op.getValueType(); local 5590 MVT VT = SVOp->getValueType(0).getSimpleVT(); local 6033 EVT VT = SVOp->getValueType(0); local 6081 MVT VT = SVOp->getValueType(0).getSimpleVT(); local 6117 getVZextMovL(EVT VT, EVT OpVT, SDValue SrcOp, SelectionDAG &DAG, const X86Subtarget *Subtarget, DebugLoc dl) argument 6271 EVT VT = SVOp->getValueType(0); local 6920 EVT VT = Op.getValueType(); local 7016 EVT VT = Op.getValueType(); local 7076 EVT VT = Op.getValueType(); local 7130 EVT VT = Op.getValueType(); local 7738 EVT VT = Op.getValueType(); local 8205 EVT VT = Op.getValueType(); local 8237 EVT VT = Op.getValueType(); local 8272 EVT VT = Op.getValueType(); local 8343 EVT VT = Op.getValueType(); local 8513 EVT VT = Op.getValueType(); local 8727 EVT VT = Op.getValueType(); local 8760 EVT VT = Op.getValueType(); local 9015 EVT VT = Op.getValueType(); local 9608 getTargetVShiftNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue SrcOp, SDValue ShAmt, SelectionDAG &DAG) argument 10250 EVT VT = Op.getValueType(); local 10469 EVT VT = Op.getValueType(); local 10515 EVT VT = Op.getValueType(); local 10550 EVT VT = Op.getValueType(); local 10575 EVT VT = Op.getValueType(); local 10597 EVT VT = Op.getValueType(); local 10638 EVT VT = Op.getValueType(); local 10688 EVT VT = Op.getValueType(); local 10991 EVT VT = Op.getValueType(); local 11214 EVT VT = cast<AtomicSDNode>(Node)->getMemoryVT(); local 11237 EVT VT = Op.getNode()->getValueType(0); local 11343 EVT VT = cast<AtomicSDNode>(Node)->getMemoryVT(); local 11410 EVT VT = N->getValueType(0); local 13358 EVT VT = SVOp->getValueType(0); local 13374 EVT VT = SVOp->getValueType(0); local 13394 EVT VT = SVOp->getValueType(0); local 13474 EVT VT = N->getValueType(0); local 13817 EVT VT = LHS.getValueType(); local 14236 EVT VT = MVT::Other; local 14497 EVT VT = N0.getValueType(); local 14542 EVT VT = N->getValueType(0); local 14686 EVT VT = CMP00.getValueType(); local 14744 EVT VT = N->getValueType(0); local 14996 EVT VT = N->getValueType(0); local 15191 EVT VT = St->getValue().getValueType(); local 15542 EVT VT = N->getValueType(0); local 15557 EVT VT = N->getValueType(0); local 15643 EVT VT = N->getValueType(0), OpVT = Op.getValueType(); local 15710 EVT VT = N->getValueType(0); local 15756 EVT VT = N->getValueType(0); local 15938 EVT VT = Ld->getValueType(0); local 15953 EVT VT = N->getValueType(0); local 15978 EVT VT = N->getValueType(0); local 16034 EVT VT = N->getValueType(0); local 16061 EVT VT = Op0.getValueType(); local 16071 EVT VT = N->getValueType(0); local 16174 EVT VT = Op.getValueType(); local [all...] |
H A D | X86FastISel.cpp | 81 bool X86FastEmitCompare(const Value *LHS, const Value *RHS, EVT VT); 83 bool X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &RR); 85 bool X86FastEmitStore(EVT VT, const Value *Val, const X86AddressMode &AM); 86 bool X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM); 135 bool isScalarFPTypeInSSEReg(EVT VT) const { 136 return (VT == MVT::f64 && X86ScalarSSEf64) || // f64 is when SSE2 137 (VT == MVT::f32 && X86ScalarSSEf32); // f32 is when SSE1 140 bool isTypeLegal(Type *Ty, MVT &VT, bool AllowI1 = false); 150 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { argument 156 VT 178 X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &ResultReg) argument 237 X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM) argument 282 X86FastEmitStore(EVT VT, const Value *Val, const X86AddressMode &AM) argument 840 X86ChooseCmpOpcode(EVT VT, const X86Subtarget *Subtarget) argument 861 X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) argument 877 X86FastEmitCompare(const Value *Op0, const Value *Op1, EVT VT) argument 913 MVT VT; local 1030 EVT VT = TLI.getValueType(CI->getOperand(0)->getType()); local 1190 MVT VT; local 1217 MVT VT; local 1354 MVT VT; local 1468 MVT VT; local 1893 EVT VT = RetTys[i]; local 2015 MVT VT; local 2141 MVT VT; local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 93 void ARMTargetLowering::addTypeForNEON(MVT VT, MVT PromotedLdStVT, argument 95 if (VT != PromotedLdStVT) { 96 setOperationAction(ISD::LOAD, VT, Promote); 97 AddPromotedToType (ISD::LOAD, VT, PromotedLdStVT); 99 setOperationAction(ISD::STORE, VT, Promote); 100 AddPromotedToType (ISD::STORE, VT, PromotedLdStVT); 103 MVT ElemTy = VT.getVectorElementType(); 105 setOperationAction(ISD::SETCC, VT, Custom); 106 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom); 107 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custo 151 addDRTypeForNEON(MVT VT) argument 156 addQRTypeForNEON(MVT VT) argument 1058 EVT VT = N->getValueType(i); local 2881 EVT VT = Op.getValueType(); local 2902 EVT VT = Op.getValueType(); local 3137 EVT VT = Op.getValueType(); local 3156 EVT VT = Op.getValueType(); local 3177 EVT VT = Op.getValueType(); local 3210 EVT VT = Op.getValueType(); local 3236 EVT VT = Op.getValueType(); local 3318 EVT VT = Op.getValueType(); local 3338 EVT VT = Op.getValueType(); local 3395 getZeroVector(EVT VT, SelectionDAG &DAG, DebugLoc dl) argument 3409 EVT VT = Op.getValueType(); local 3445 EVT VT = Op.getValueType(); local 3494 EVT VT = N->getValueType(0); local 3506 EVT VT = N->getValueType(0); local 3541 EVT VT = N->getValueType(0); local 3586 EVT VT = Op.getValueType(); local 3711 isNEONModifiedImm(uint64_t SplatBits, uint64_t SplatUndef, unsigned SplatBitSize, SelectionDAG &DAG, EVT &VT, bool is128Bits, NEONModImmType type) argument 3896 isVEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseVEXT, unsigned &Imm) argument 3935 isVREVMask(ArrayRef<int> M, EVT VT, unsigned BlockSize) argument 3961 isVTBLMask(ArrayRef<int> M, EVT VT) argument 3968 isVTRNMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument 3986 isVTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument 4001 isVUZPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument 4024 isVUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument 4048 isVZIPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument 4073 isVZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument 4121 EVT VT = Op.getValueType(); local 4293 EVT VT = Op.getValueType(); local 4512 EVT VT = OpLHS.getValueType(); local 4581 EVT VT = Op.getValueType(); local 4768 EVT VT = N->getValueType(0); local 4858 EVT VT = N->getValueType(0); local 4899 EVT VT = Op.getValueType(); local 5037 EVT VT = Op.getValueType(); local 5072 EVT VT = Op.getValueType(); local 5146 EVT VT = Op.getNode()->getValueType(0); local 7071 EVT VT = N->getValueType(0); local 7119 EVT VT = N->getValueType(0); local 7476 EVT VT = N->getValueType(0); local 7576 EVT VT = N->getValueType(0); local 7619 EVT VT = N->getValueType(0); local 7806 EVT VT = N->getValueType(0); local 7917 EVT VT = StVal.getValueType(); local 8075 EVT VT = N->getValueType(0); local 8098 EVT VT = N->getValueType(0); local 8145 EVT VT = N->getValueType(0); local 8309 EVT VT = N->getValueType(0); local 8409 EVT VT = N->getValueType(0); local 8537 isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) argument 8551 isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, bool isIntrinsic, int64_t &Cnt) argument 8592 EVT VT = N->getOperand(1).getValueType(); local 8697 EVT VT = N->getOperand(1).getValueType(); local 8730 EVT VT = N->getValueType(0); local 8786 EVT VT = N->getValueType(0); local 9079 isLegalT1AddressImmediate(int64_t V, EVT VT) argument 9106 isLegalT2AddressImmediate(int64_t V, EVT VT, const ARMSubtarget *Subtarget) argument 9139 isLegalAddressImmediate(int64_t V, EVT VT, const ARMSubtarget *Subtarget) argument 9213 EVT VT = getValueType(Ty, true); local 9299 getARMIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument 9358 getT2IndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument [all...] |
H A D | ARMSelectionDAGInfo.cpp | 52 EVT VT = MVT::i32; local 66 Loads[i] = DAG.getLoad(VT, dl, Chain, 98 VT = MVT::i16; 101 VT = MVT::i8; 105 Loads[i] = DAG.getLoad(VT, dl, Chain, 121 VT = MVT::i16; 124 VT = MVT::i8;
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H A D | ARMFastISel.cpp | 177 bool isTypeLegal(Type *Ty, MVT &VT); 178 bool isLoadTypeLegal(Type *Ty, MVT &VT); 181 bool ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr, 184 bool ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr, 187 void ARMSimplifyAddress(Address &Addr, EVT VT, bool useAM3); 191 unsigned ARMMaterializeFP(const ConstantFP *CFP, EVT VT); 192 unsigned ARMMaterializeInt(const Constant *C, EVT VT); 193 unsigned ARMMaterializeGV(const GlobalValue *GV, EVT VT); 194 unsigned ARMMoveToFPReg(EVT VT, unsigned SrcReg); 195 unsigned ARMMoveToIntReg(EVT VT, unsigne 488 ARMMoveToFPReg(EVT VT, unsigned SrcReg) argument 498 ARMMoveToIntReg(EVT VT, unsigned SrcReg) argument 511 ARMMaterializeFP(const ConstantFP *CFP, EVT VT) argument 555 ARMMaterializeInt(const Constant *C, EVT VT) argument 615 ARMMaterializeGV(const GlobalValue *GV, EVT VT) argument 712 EVT VT = TLI.getValueType(C->getType(), true); local 755 isTypeLegal(Type *Ty, MVT &VT) argument 767 isLoadTypeLegal(Type *Ty, MVT &VT) argument 891 ARMSimplifyAddress(Address &Addr, EVT VT, bool useAM3) argument 947 AddLoadStoreOperands(EVT VT, Address &Addr, const MachineInstrBuilder &MIB, unsigned Flags, bool useAM3) argument 996 ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr, unsigned Alignment, bool isZExt, bool allocReg) argument 1114 ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr, unsigned Alignment) argument 1638 MVT VT; local 1698 MVT VT; local 1726 MVT VT; local 1786 EVT VT = TLI.getValueType(I->getType(), true); local 2405 MVT VT; local 2748 MVT VT; local [all...] |
H A D | ARMISelLowering.h | 269 virtual EVT getSetCCResultType(EVT VT) const; 281 bool isDesirableToTransformToIntegerOp(unsigned Opc, EVT VT) const; 285 virtual bool allowsUnalignedMemoryAccesses(EVT VT) const; 296 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const; 344 EVT VT) const; 361 virtual const TargetRegisterClass *getRegClassFor(EVT VT) const; 374 bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const; 380 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 387 findRepresentativeClass(EVT VT) const; 402 void addTypeForNEON(MVT VT, MV [all...] |
/external/llvm/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 39 int prefslotOffset(EVT VT) { argument 41 if (VT==MVT::i1) retval=3; 42 if (VT==MVT::i8) retval=3; 43 if (VT==MVT::i16) retval=2; 135 MVT::SimpleValueType VT = (MVT::SimpleValueType)sctype; local 137 setOperationAction(ISD::LOAD, VT, Custom); 138 setOperationAction(ISD::STORE, VT, Custom); 139 setLoadExtAction(ISD::EXTLOAD, VT, Custom); 140 setLoadExtAction(ISD::ZEXTLOAD, VT, Custom); 141 setLoadExtAction(ISD::SEXTLOAD, VT, Custo 151 MVT::SimpleValueType VT = (MVT::SimpleValueType) sctype; local 371 MVT::SimpleValueType VT = (MVT::SimpleValueType)sctype; local 411 MVT::SimpleValueType VT = (MVT::SimpleValueType)i; local 772 EVT VT = Value.getValueType(); local 1096 EVT VT = Op.getValueType(); local 1659 EVT VT = Op.getValueType(); local 1967 EVT VT; local 2004 EVT VT = Op.getValueType(); local 2171 EVT VT = Op.getValueType(); local 2305 EVT VT = Op.getValueType(); local 2356 EVT VT = Op.getValueType(); local 2649 EVT VT = Op.getValueType(); local 2678 EVT VT = Op.getValueType(); local 2782 EVT VT = Op.getValueType(); local 3205 EVT VT = Op.getValueType(); local [all...] |
/external/llvm/utils/TableGen/ |
H A D | CodeGenTarget.cpp | 454 MVT::SimpleValueType VT; local 459 VT = OverloadedVTs[MatchTy]; 465 VT == MVT::iAny || VT == MVT::vAny) && 468 VT = getValueType(TyEl->getValueAsDef("VT")); 470 if (EVT(VT).isOverloaded()) { 471 OverloadedVTs.push_back(VT); 476 if (VT == MVT::isVoid) 479 IS.RetVTs.push_back(VT); 488 MVT::SimpleValueType VT; local [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.h | 79 bool isTypeSupportedInIntrinsic(MVT VT) const; 94 virtual EVT getSetCCResultType(EVT VT) const { 100 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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