Searched defs:Ops (Results 26 - 50 of 77) sorted by relevance

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/external/llvm/lib/Transforms/Scalar/
H A DReassociate.cpp62 /// PrintOps - Print out the expression identified in the Ops list.
64 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { argument
67 << *Ops[0].Op->getType() << '\t';
68 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
70 WriteAsOperand(dbgs(), Ops[i].Op, false, M);
71 dbgs() << ", #" << Ops[i].Rank << "] ";
136 void RewriteExprTree(BinaryOperator *I, SmallVectorImpl<ValueEntry> &Ops);
138 SmallVectorImpl<ValueEntry> &Ops);
139 Value *OptimizeAdd(Instruction *I, SmallVectorImpl<ValueEntry> &Ops);
140 bool collectMultiplyFactors(SmallVectorImpl<ValueEntry> &Ops,
450 LinearizeExprTree(BinaryOperator *I, SmallVectorImpl<RepeatedValue> &Ops) argument
655 RewriteExprTree(BinaryOperator *I, SmallVectorImpl<ValueEntry> &Ops) argument
933 FindInOperandList(SmallVectorImpl<ValueEntry> &Ops, unsigned i, Value *X) argument
949 EmitAddTreeOfValues(Instruction *I, SmallVectorImpl<WeakVH> &Ops) argument
1023 FindSingleUseMultiplyFactors(Value *V, SmallVectorImpl<Value*> &Factors, const SmallVectorImpl<ValueEntry> &Ops) argument
1041 OptimizeAndOrXor(unsigned Opcode, SmallVectorImpl<ValueEntry> &Ops) argument
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/external/llvm/utils/TableGen/
H A DDAGISelMatcherGen.cpp891 SmallVector<unsigned, 8> Ops; local
892 EmitResultOperand(Pattern.getDstPattern(), Ops);
923 assert(Ops.size() >= NumSrcResults && "Didn't provide enough results");
924 Ops.resize(NumSrcResults);
932 AddMatcher(new CompleteMatchMatcher(Ops.data(), Ops.size(), Pattern));
H A DFixedLenDecoderEmitter.cpp347 const std::map<unsigned, std::vector<OperandInfo> > &Ops,
350 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(),
360 const std::map<unsigned, std::vector<OperandInfo> > &Ops,
363 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops),
345 FilterChooser(const std::vector<const CodeGenInstruction*> &Insts, const std::vector<unsigned> &IDs, const std::map<unsigned, std::vector<OperandInfo> > &Ops, unsigned BW, const FixedLenDecoderEmitter *E) argument
358 FilterChooser(const std::vector<const CodeGenInstruction*> &Insts, const std::vector<unsigned> &IDs, const std::map<unsigned, std::vector<OperandInfo> > &Ops, const std::vector<bit_value_t> &ParentFilterBitValues, const FilterChooser &parent) argument
/external/clang/test/CodeGenCXX/
H A Dmangle.cpp274 struct Ops { struct
275 Ops& operator+(const Ops&);
276 Ops& operator-(const Ops&);
277 Ops& operator&(const Ops&);
278 Ops& operator*(const Ops&);
283 // CHECK: define %struct.Ops*
284 operator +(const Ops&) argument
286 operator -(const Ops&) argument
288 operator &(const Ops&) argument
290 operator *(const Ops&) argument
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/external/llvm/examples/Kaleidoscope/Chapter6/
H A Dtoy.cpp591 Value *Ops[] = { L, R }; local
592 return Builder.CreateCall(F, Ops, "binop");
/external/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h453 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue }; local
454 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
461 SDValue Ops[] = { Chain, Reg, N, Glue }; local
462 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
467 SDValue Ops[] = { Chain, getRegister(Reg, VT) }; local
468 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
477 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue }; local
478 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
520 SDValue Ops[] = { Chain, Op }; local
521 return getNode(ISD::CALLSEQ_START, DebugLoc(), VTs, Ops,
530 SmallVector<SDValue, 4> Ops; local
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/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h536 const SmallVectorImpl<unsigned> &Ops,
543 const SmallVectorImpl<unsigned> &Ops,
552 const SmallVectorImpl<unsigned> &Ops,
562 const SmallVectorImpl<unsigned> &Ops,
572 const SmallVectorImpl<unsigned> &Ops) const =0;
982 const SmallVectorImpl<unsigned> &Ops) const;
550 foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI, const SmallVectorImpl<unsigned> &Ops, int FrameIndex) const argument
560 foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI, const SmallVectorImpl<unsigned> &Ops, MachineInstr* LoadMI) const argument
/external/llvm/lib/Analysis/
H A DConstantFolding.cpp99 Constant *Ops = C; // don't take the address of C! local
100 return FoldBitCast(ConstantVector::get(Ops), DestTy, TD);
574 static Constant *CastGEPIndices(ArrayRef<Constant *> Ops, argument
582 for (unsigned i = 1, e = Ops.size(); i != e; ++i) {
584 !isa<StructType>(GetElementPtrInst::getIndexedType(Ops[0]->getType(),
585 Ops.slice(1, i-1)))) &&
586 Ops[i]->getType() != IntPtrTy) {
588 NewIdxs.push_back(ConstantExpr::getCast(CastInst::getCastOpcode(Ops[i],
592 Ops[i], IntPtrTy));
594 NewIdxs.push_back(Ops[
624 SymbolicallyEvaluateGEP(ArrayRef<Constant *> Ops, Type *ResultTy, const TargetData *TD, const TargetLibraryInfo *TLI) argument
824 SmallVector<Constant*, 8> Ops; local
864 SmallVector<Constant*, 8> Ops; local
890 ConstantFoldInstOperands(unsigned Opcode, Type *DestTy, ArrayRef<Constant *> Ops, const TargetData *TD, const TargetLibraryInfo *TLI) argument
1046 Constant *Ops[] = { LHS, RHS }; local
1454 Constant *Ops[] = { local
[all...]
H A DInstructionSimplify.cpp596 Constant *Ops[] = { CLHS, CRHS }; local
597 return ConstantFoldInstOperands(Instruction::Add, CLHS->getType(), Ops,
761 Constant *Ops[] = { CLHS, CRHS }; local
763 Ops, Q.TD, Q.TLI);
895 Constant *Ops[] = { CLHS, CRHS }; local
897 Ops, Q.TD, Q.TLI);
966 Constant *Ops[] = { C0, C1 }; local
967 return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, Q.TD, Q.TLI);
1089 Constant *Ops[] = { C0, C1 }; local
1090 return ConstantFoldInstOperands(Opcode, C0->getType(), Ops,
1194 Constant *Ops[] = { C0, C1 }; local
1323 Constant *Ops[] = { CLHS, CRHS }; local
1422 Constant *Ops[] = { CLHS, CRHS }; local
1516 Constant *Ops[] = { CLHS, CRHS }; local
2543 SimplifyGEPInst(ArrayRef<Value *> Ops, const Query &Q, unsigned) argument
2582 SimplifyGEPInst(ArrayRef<Value *> Ops, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
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H A DScalarEvolution.cpp630 static void GroupByComplexity(SmallVectorImpl<const SCEV *> &Ops, argument
632 if (Ops.size() < 2) return; // Noop
633 if (Ops.size() == 2) {
636 const SCEV *&LHS = Ops[0], *&RHS = Ops[1];
643 std::stable_sort(Ops.begin(), Ops.end(), SCEVComplexityCompare(LI));
649 for (unsigned i = 0, e = Ops.size(); i != e-2; ++i) {
650 const SCEV *S = Ops[i];
655 for (unsigned j = i+1; j != e && Ops[
1335 SmallVector<const SCEV *, 4> Ops; local
1376 CollectAddOperandsWithScales(DenseMap<const SCEV *, APInt> &M, SmallVector<const SCEV *, 8> &NewOps, APInt &AccumulatedConstant, const SCEV *const *Ops, size_t NumOperands, const APInt &Scale, ScalarEvolution &SE) argument
1452 getAddExpr(SmallVectorImpl<const SCEV *> &Ops, SCEV::NoWrapFlags Flags) argument
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H A DScalarEvolutionExpander.cpp209 /// unnecessary; in its place, just signed-divide Ops[i] by the scale and
309 static void SimplifyAddOperands(SmallVectorImpl<const SCEV *> &Ops, argument
313 for (unsigned i = Ops.size(); i > 0 && isa<SCEVAddRecExpr>(Ops[i-1]); --i)
315 // Group Ops into non-addrecs and addrecs.
316 SmallVector<const SCEV *, 8> NoAddRecs(Ops.begin(), Ops.end() - NumAddRecs);
317 SmallVector<const SCEV *, 8> AddRecs(Ops.end() - NumAddRecs, Ops.end());
324 Ops
338 SplitAddRecs(SmallVectorImpl<const SCEV *> &Ops, Type *Ty, ScalarEvolution &SE) argument
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/external/llvm/lib/CodeGen/
H A DInlineSpiller.cpp865 SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops; local
867 MIBundleOperands(MI).analyzeVirtReg(VirtReg.reg, &Ops);
877 foldMemoryOperand(Ops, RM.OrigMI)) {
894 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
895 MachineOperand &MO = MI->getOperand(Ops[i].second);
1005 /// foldMemoryOperand - Try folding stack slot references in Ops into their
1008 /// @param Ops Operand indices from analyzeVirtReg().
1012 foldMemoryOperand(ArrayRef<std::pair<MachineInstr*, unsigned> > Ops, argument
1014 if (Ops.empty())
1017 MachineInstr *MI = Ops
1144 SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops; local
[all...]
H A DRegisterCoalescer.cpp854 SmallVector<unsigned,8> Ops; local
856 tie(Reads, Writes) = UseMI->readsWritesVirtualRegister(SrcReg, &Ops);
864 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
865 MachineOperand &MO = UseMI->getOperand(Ops[i]);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp153 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), local
160 NVT, Ops, 2, false, N->getDebugLoc());
229 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), local
236 NVT, Ops, 2, false, N->getDebugLoc());
307 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)), local
315 NVT, Ops, 3, false, N->getDebugLoc());
320 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), local
327 NVT, Ops, 2, false, N->getDebugLoc());
344 SDValue Ops[2] = { DAG.getConstantFP(-0.0, N->getValueType(0)), local
351 NVT, Ops,
381 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), local
395 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) }; local
406 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), local
451 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), local
681 SDValue Ops[2] = { LHSInt, RHSInt }; local
949 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; local
1016 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; local
1029 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; local
1113 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; local
[all...]
H A DSelectionDAGISel.cpp1486 SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops) { argument
1488 std::swap(InOps, Ops);
1490 Ops.push_back(InOps[InlineAsm::Op_InputChain]); // 0
1491 Ops.push_back(InOps[InlineAsm::Op_AsmString]); // 1
1492 Ops.push_back(InOps[InlineAsm::Op_MDNode]); // 2, !srcloc
1493 Ops.push_back(InOps[InlineAsm::Op_ExtraInfo]); // 3 (SideEffect, AlignStack)
1503 Ops.insert(Ops.end(), InOps.begin()+i,
1518 Ops.push_back(CurDAG->getTargetConstant(NewFlags, MVT::i32));
1519 Ops
1951 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo) argument
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/external/llvm/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp610 SDValue Ops[8]; local
623 Ops[0] = TFI;
624 Ops[1] = Imm0;
628 Ops[0] = CurDAG->getRegister(SPU::R1, N->getValueType(0));
629 Ops[1] = SDValue(CurDAG->getMachineNode(SPU::ILAr32, dl,
861 Ops[1] = Op1;
867 Ops[1] = Op1;
869 Ops[1] = SDValue(CurDAG->getMachineNode(SPU::ILr32, dl,
875 Ops[0] = Op0;
882 return CurDAG->SelectNodeTo(N, NewOpc, OpVT, Ops, n_op
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/external/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp609 SDValue Ops[] = { Value, Base, local
622 MVT::Other, Ops, 4);
635 SDValue Ops[] = { Base, CurDAG->getTargetConstant(0, MVT::i32), Value, local
648 SDNode* Result_1 = CurDAG->getMachineNode(Opcode, dl, MVT::Other, Ops,
700 SDValue Ops[] = {SDValue(NewBase,0), local
705 MVT::Other, Ops, 4);
1123 SmallVector<SDValue, 8> Ops; local
1137 Ops.push_back(SDValue(Arg, 0));
1142 Ops.push_back(SDValue(PdRs,0));
1148 Ops
[all...]
H A DHexagonInstrInfo.cpp439 const SmallVectorImpl<unsigned> &Ops,
437 foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI, const SmallVectorImpl<unsigned> &Ops, int FI) const argument
/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp811 SmallVector<SDValue, 8> Ops; local
812 Ops.push_back(Chain);
813 Ops.push_back(Callee);
818 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
823 Ops.push_back(InFlag);
825 Chain = DAG.getNode(MBlazeISD::JmpLink, dl, NodeTys, &Ops[0], Ops.size());
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp533 SmallVector<SDValue, 8> Ops; local
534 Ops.push_back(Chain);
535 Ops.push_back(Callee);
540 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
544 Ops.push_back(InFlag);
546 Chain = DAG.getNode(MSP430ISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
832 SmallVector<SDValue, 4> Ops; local
833 Ops.push_back(One);
834 Ops
854 SmallVector<SDValue, 4> Ops; local
[all...]
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp706 // Ops to print out the function name
712 // Ops to print out the param list
832 SmallVector<SDValue, 8> Ops; local
840 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, SubOp,
845 &Ops[0], Ops.size());
1114 std::vector<SDValue> &Ops,
1120 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
1112 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops, SelectionDAG &DAG) const argument
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp452 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB), local
454 return CurDAG->getMachineNode(PPC::RLWIMI, dl, MVT::i32, Ops, 5);
641 SDValue Ops[] = { Op, getI32Imm(27), getI32Imm(5), getI32Imm(31) }; local
642 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
653 SDValue Ops[] = { Op, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; local
654 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
660 SDValue Ops[] = { T, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; local
661 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
690 SDValue Ops[] = { AN, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; local
691 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops,
694 SDValue Ops[] = { Op, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; local
724 SDValue Ops[] = { IntCR, getI32Imm((32-(3-Idx)) & 31), local
934 SDValue Ops[] = { Offset, Base, Chain }; local
969 SDValue Ops[] = { Offset, Base, Chain }; local
985 SDValue Ops[] = { Val, getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) }; local
994 SDValue Ops[] = { Val, getI32Imm(0), getI32Imm(MB), getI32Imm(ME) }; local
1002 SDValue Ops[] = { Val, getI32Imm(0), getI32Imm(MB) }; local
1018 SDValue Ops[] = { N->getOperand(0).getOperand(0), local
1039 SDValue Ops[] = { N->getOperand(0).getOperand(0), local
1051 SDValue Ops[] = { N->getOperand(0).getOperand(0), local
1096 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), local
1109 SDValue Ops[] = { Pred, N->getOperand(2), N->getOperand(3), local
1116 SDValue Ops[] = { getI32Imm(getPredicateForSetCC(CC)), CondCode, local
[all...]
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp573 SmallVector<SDValue, 8> Ops; local
574 Ops.push_back(Chain);
575 Ops.push_back(Callee);
577 Ops.push_back(DAG.getTargetConstant(SRetArgSize, MVT::i32));
583 Ops.push_back(DAG.getRegister(Reg, RegsToPass[i].second.getValueType()));
586 Ops.push_back(InFlag);
588 Chain = DAG.getNode(SPISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
962 SDValue Ops[2] = { LHS, RHS }; local
963 CompareFlag = DAG.getNode(SPISD::CMPICC, dl, VTs, Ops,
993 SDValue Ops[2] = { LHS, RHS }; local
1051 SDValue Ops[2] = { local
1072 SDValue Ops[2] = { NewVal, Chain }; local
[all...]
/external/clang/lib/CodeGen/
H A DCGExprComplex.cpp587 BinOpInfo Ops; local
588 Ops.LHS = Visit(E->getLHS());
589 Ops.RHS = Visit(E->getRHS());
590 Ops.Ty = E->getType();
591 return Ops;
/external/llvm/examples/Kaleidoscope/Chapter7/
H A Dtoy.cpp687 Value *Ops[] = { L, R }; local
688 return Builder.CreateCall(F, Ops, "binop");

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