| /external/llvm/lib/Target/CellSPU/MCTargetDesc/ |
| H A D | SPUMCAsmInfo.cpp | 19 SPULinuxMCAsmInfo::SPULinuxMCAsmInfo(const Target &T, StringRef TT) { argument
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| H A D | SPUMCTargetDesc.cpp | 41 static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) { argument
47 static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU, argument
50 InitSPUMCSubtargetInfo(X, TT, CPU, FS);
54 static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) { argument
55 MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT);
65 static MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
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| /external/llvm/lib/Target/CppBackend/TargetInfo/ |
| H A D | CppBackendTargetInfo.cpp | 17 static unsigned CppBackend_TripleMatchQuality(const std::string &TT) { argument
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCAsmInfo.cpp | 18 HexagonMCAsmInfo::HexagonMCAsmInfo(const Target &T, StringRef TT) { argument
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| H A D | HexagonMCTargetDesc.cpp | 41 static MCRegisterInfo *createHexagonMCRegisterInfo(StringRef TT) { argument
47 static MCSubtargetInfo *createHexagonMCSubtargetInfo(StringRef TT, argument
51 InitHexagonMCSubtargetInfo(X, TT, CPU, FS);
55 static MCAsmInfo *createHexagonMCAsmInfo(const Target &T, StringRef TT) { argument
56 MCAsmInfo *MAI = new HexagonMCAsmInfo(T, TT);
66 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
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| /external/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCAsmInfo.cpp | 20 MSP430MCAsmInfo::MSP430MCAsmInfo(const Target &T, StringRef TT) { argument
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCAsmInfo.cpp | 21 MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) { argument
22 Triple TheTriple(TT);
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| /external/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| H A D | NVPTXMCAsmInfo.cpp | 31 NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Target &T, const StringRef &TT) { argument
32 Triple TheTriple(TT);
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| H A D | NVPTXMCTargetDesc.cpp | 40 static MCRegisterInfo *createNVPTXMCRegisterInfo(StringRef TT) { argument
47 static MCSubtargetInfo *createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, argument
50 InitNVPTXMCSubtargetInfo(X, TT, CPU, FS);
54 static MCCodeGenInfo *createNVPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
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| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCAsmInfo.cpp | 21 SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Target &T, StringRef TT) { argument
23 Triple TheTriple(TT);
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| H A D | SparcMCTargetDesc.cpp | 40 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) { argument
46 static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU, argument
49 InitSparcMCSubtargetInfo(X, TT, CPU, FS);
53 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
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| /external/llvm/lib/Target/XCore/MCTargetDesc/ |
| H A D | XCoreMCAsmInfo.cpp | 16 XCoreMCAsmInfo::XCoreMCAsmInfo(const Target &T, StringRef TT) { argument
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 41 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): argument
42 HexagonGenSubtargetInfo(TT, CPU, FS),
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreSubtarget.cpp | 26 XCoreSubtarget::XCoreSubtarget(const std::string &TT, argument
28 : XCoreGenSubtargetInfo(TT, CPU, FS)
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.cpp | 26 MSP430Subtarget::MSP430Subtarget(const std::string &TT, argument
29 MSP430GenSubtargetInfo(TT, CPU, FS) {
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| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.cpp | 35 NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU, argument
37 :NVPTXGenSubtargetInfo(TT, "", FS), // Don't pass CPU to subtarget,
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| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcSubtarget.cpp | 26 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, argument
28 SparcGenSubtargetInfo(TT, CPU, FS),
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| /external/llvm/lib/MC/ |
| H A D | MCObjectFileInfo.cpp | 526 void MCObjectFileInfo::InitMCObjectFileInfo(StringRef TT, Reloc::Model relocm, argument
548 Triple T(TT);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.cpp | 37 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, argument
39 : ARMGenSubtargetInfo(TT, CPU, FS)
77 , TargetTriple(TT)
86 std::string ArchFS = ARM_MC::ParseARMTriple(TT, CPUString);
106 if ((TT.find("eabi") != std::string::npos) || (isTargetIOS() && isMClass()))
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| /external/llvm/lib/Target/CellSPU/ |
| H A D | SPUSubtarget.cpp | 25 SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU, argument
27 SPUGenSubtargetInfo(TT, CPU, FS),
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| /external/llvm/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, argument
29 : TargetMachine(T, TT, CPU, FS, Options) {}
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| /external/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeSubtarget.cpp | 26 MBlazeSubtarget::MBlazeSubtarget(const std::string &TT, argument
29 MBlazeGenSubtargetInfo(TT, CPU, FS),
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| H A D | MBlazeTargetMachine.cpp | 35 MBlazeTargetMachine(const Target &T, StringRef TT, argument
39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
40 Subtarget(TT, CPU, FS),
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 27 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, argument
30 MipsGenSubtargetInfo(TT, CPU, FS),
56 if (TT.find("linux") == std::string::npos)
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.cpp | 29 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU, argument
31 : PPCGenSubtargetInfo(TT, CPU, FS)
45 , TargetTriple(TT) {
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