| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 64 /// SHL, SRA, SRL - Non-constant shifts.
65 SHL, SRA, SRL enumerator in enum:llvm::MSP430ISD::__anon9729
|
| /external/libffi/src/mips/ |
| H A D | ffitarget.h | 128 # define SRL srl macro
135 # define SRL dsrl
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 91 SRL, SRA, SHL, enumerator in enum:llvm::PPCISD::NodeType
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 318 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
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| /external/llvm/include/llvm/TableGen/ |
| H A D | Record.h | 930 enum BinaryOp { ADD, SHL, SRA, SRL, STRCONCAT, CONCAT, EQ }; enumerator in enum:llvm::BinOpInit::BinaryOp
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 738 if (ShiftRightOpc != ISD::SRA && ShiftRightOpc != ISD::SRL)
1826 SDValue SrlX = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1);
1827 SDValue SrlY = DAG.getNode(ISD::SRL, DL, MVT::i32, Y, Const31);
1873 SDValue SrlX = DAG.getNode(ISD::SRL, DL, TyX, SllX, Const1);
1874 SDValue SrlY = DAG.getNode(ISD::SRL, DL, TyY, Y,
1914 Res = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1);
1939 Res = DAG.getNode(ISD::SRL, DL, MVT::i64, SllX, Const1);
2046 SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, MVT::i32, Lo,
2048 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, MVT::i32, ShiftRight1Lo,
2087 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, D
2178 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); local
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 882 else if (Opc == ISD::SRL)
1123 case ISD::SRL: return visitSRL(N);
1206 case ISD::SRL:
1901 SDValue SRL = DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, SGN, local
1904 SDValue ADD = DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0, SRL);
1905 AddToWorkList(SRL.getNode());
1955 return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0,
1969 return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0, Add);
2113 N1 = DAG.getNode(ISD::SRL, D
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 797 setOperationAction(ISD::SRL, VT, Expand);
1047 setOperationAction(ISD::SRL, MVT::v8i16, Custom);
1048 setOperationAction(ISD::SRL, MVT::v16i8, Custom);
1057 setOperationAction(ISD::SRL, MVT::v2i64, Legal);
1058 setOperationAction(ISD::SRL, MVT::v4i32, Legal);
1065 setOperationAction(ISD::SRL, MVT::v2i64, Custom);
1066 setOperationAction(ISD::SRL, MVT::v4i32, Custom);
1130 setOperationAction(ISD::SRL, MVT::v16i16, Custom);
1131 setOperationAction(ISD::SRL, MVT::v32i8, Custom);
1189 setOperationAction(ISD::SRL, MV
11477 SDValue SRL = getTargetVShiftNode(X86ISD::VSRLI, dl, VT, SGN, Amt, DAG); local
11539 SDValue SRL = DAG.getNode(X86ISD::VSRLI, dl, MVT::v8i16, R, local
11583 SDValue SRL = DAG.getNode(X86ISD::VSRLI, dl, MVT::v16i16, R, local
[all...] |