Searched refs:TRI (Results 176 - 190 of 190) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp460 const TargetRegisterInfo *TRI) {
461 for (const uint16_t *CSR = TRI->getCalleeSavedRegs(); *CSR; ++CSR) {
463 if (MI->modifiesRegister(CalleeSavedReg, TRI))
459 DoesModifyCalleeSavedReg(MachineInstr *MI, const TargetRegisterInfo *TRI) argument
H A DHexagonISelDAGToDAG.cpp1163 const TargetRegisterInfo *TRI = TM.getRegisterInfo(); local
1171 const TargetRegisterClass *RC = TII->getRegClass(MCID, i, TRI, *MF);
H A DHexagonInstrInfo.cpp450 const TargetRegisterInfo *TRI) const {
497 const TargetRegisterInfo *TRI) const {
/external/llvm/lib/Target/X86/
H A DX86CodeEmitter.cpp114 const TargetRegisterInfo *TRI = TM.getRegisterInfo(); local
115 return TRI->getEncodingValue(RegNo) & 0x7;
H A DX86FastISel.cpp1965 MIB.addRegMask(TRI.getCallPreservedMask(CS.getCallingConv()));
2056 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
H A DX86ISelLowering.cpp2658 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); local
2659 const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
11047 const TargetRegisterInfo* TRI = getTargetMachine().getRegisterInfo(); local
11056 const unsigned char N86R10 = TRI->getEncodingValue(X86::R10) & 0x7;
11057 const unsigned char N86R11 = TRI->getEncodingValue(X86::R11) & 0x7;
11159 const unsigned char N86Reg = TRI->getEncodingValue(NestReg) & 0x7;
13084 const TargetRegisterInfo* TRI = getTargetMachine().getRegisterInfo(); local
13086 TRI->getSubClassWithSubReg(getRegClassFor(MVT::i32), X86::sub_8bit);
13896 const TargetRegisterInfo* TRI) {
13921 SelectItr->addRegisterKilled(X86::EFLAGS, TRI);
13894 checkAndUpdateEFLAGSKill(MachineBasicBlock::iterator SelectItr, MachineBasicBlock* BB, const TargetRegisterInfo* TRI) argument
13954 const TargetRegisterInfo* TRI = getTargetMachine().getRegisterInfo(); local
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1308 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); local
1309 const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
1948 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); local
1950 = static_cast<const AArch64RegisterInfo *>(TRI);
/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2278 MIB.addRegMask(TRI.getCallPreservedMask(CC));
2285 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2422 MIB.addRegMask(TRI.getCallPreservedMask(CC));
2430 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
H A DARMISelLowering.cpp1675 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); local
1676 const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp353 const TargetRegisterInfo &TRI = *TM.getRegisterInfo(); local
388 RegInfo->EmitLiveInCopies(EntryMBB, TRI, TII);
H A DSelectionDAGBuilder.cpp4369 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo(); local
4380 Reg = TRI->getFrameRegister(MF);
4407 Reg = TRI->getFrameRegister(MF);
H A DSelectionDAG.cpp3630 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); local
3631 if (!TRI->needsStackRealignment(MF))
/external/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfDebug.cpp1377 const TargetRegisterInfo *TRI = Asm->TM.getRegisterInfo(); local
1379 std::vector<const MDNode*> LiveUserVar(TRI->getNumRegs());
1461 for (MCRegAliasIterator AI(MOI->getReg(), TRI, true);
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2571 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); local
2572 const uint32_t *Mask = TRI->getCallPreservedMask(CLI.CallConv);
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3350 const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); local
3351 const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);

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