Searched refs:OpNum (Results 1 - 25 of 31) sorted by relevance

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/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.h39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O);
43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O);
44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
48 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
51 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
52 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
[all...]
H A DARMInstPrinter.cpp315 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, argument
317 const MCOperand &MO1 = MI->getOperand(OpNum);
334 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, argument
336 const MCOperand &MO1 = MI->getOperand(OpNum);
337 const MCOperand &MO2 = MI->getOperand(OpNum+1);
338 const MCOperand &MO3 = MI->getOperand(OpNum+2);
353 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, argument
355 const MCOperand &MO1 = MI->getOperand(OpNum);
356 const MCOperand &MO2 = MI->getOperand(OpNum+1);
443 unsigned OpNum,
442 printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
541 printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
559 printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
569 printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
578 printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
589 printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
596 printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
622 printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
635 printAddrMode7Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
643 printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
655 printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
668 printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
674 printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
693 printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
702 printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
712 printRegisterList(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
722 printGPRPairOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
731 printSetendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
740 printCPSIMod(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
746 printCPSIFlag(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
758 printMSRMaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
838 printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
848 printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
855 printSBitModifierOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
864 printNoHashImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
869 printPImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
874 printCImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
879 printCoprocOptionImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
884 printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
889 printAdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
910 printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
917 printThumbSRImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
925 printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
1011 printT2SOOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
1025 printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
[all...]
/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.h40 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, argument
42 printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize);
46 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum,
51 unsigned OpNum, raw_ostream &O);
53 unsigned OpNum, raw_ostream &O);
55 void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
58 void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
59 void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
60 void printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
63 void printCondCodeOperand(const MCInst *MI, unsigned OpNum,
77 printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument
93 printNamedImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
95 printNamedImmOperand(SomeNamedImmMapper(), MI, OpNum, O); local
106 printMRSOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
108 printSysRegOperand(A64SysReg::MRSMapper(), MI, OpNum, O); local
111 printMSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
113 printSysRegOperand(A64SysReg::MSRMapper(), MI, OpNum, O); local
121 printLSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
124 printASROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
127 printROROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
132 printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
152 printRegExtendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
[all...]
H A DAArch64InstPrinter.cpp54 unsigned OpNum, raw_ostream &O) {
55 const MCOperand &MOImm = MI->getOperand(OpNum);
62 AArch64InstPrinter::printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, argument
65 unsigned ExtImm = MI->getOperand(OpNum).getImm();
93 unsigned OpNum, raw_ostream &O) {
94 const MCOperand &Imm12Op = MI->getOperand(OpNum);
107 AArch64InstPrinter::printAddSubImmLSL12Operand(const MCInst *MI, unsigned OpNum, argument
110 printAddSubImmLSL0Operand(MI, OpNum, O);
116 AArch64InstPrinter::printBareImmOperand(const MCInst *MI, unsigned OpNum, argument
118 const MCOperand &MO = MI->getOperand(OpNum);
53 printOffsetSImm9Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
92 printAddSubImmLSL0Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
123 printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
131 printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
140 printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
154 printCRxOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
163 printCVTFixedPosOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
171 printFPImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument
199 printFPZeroOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o) argument
205 printCondCodeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
213 printLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
232 printLogicalImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
242 printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O, int MemSize) argument
256 printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, A64SE::ShiftExtSpecifiers Shift) argument
277 printMoveWideImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
294 printNamedImmOperand(const NamedImmMapper &Mapper, const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
308 printSysRegOperand(const A64SysReg::SysRegMapper &Mapper, const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
322 printRegExtendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, A64SE::ShiftExtSpecifiers Ext) argument
363 printSImm7ScaledOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
[all...]
/external/llvm/lib/Target/MSP430/
H A DMSP430AsmPrinter.cpp49 void printOperand(const MachineInstr *MI, int OpNum,
51 void printSrcMemOperand(const MachineInstr *MI, int OpNum,
64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
66 const MachineOperand &MO = MI->getOperand(OpNum);
111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, argument
113 const MachineOperand &Base = MI->getOperand(OpNum);
114 const MachineOperand &Disp = MI->getOperand(OpNum+1);
121 printOperand(MI, OpNum+1, O, "nohash");
126 printOperand(MI, OpNum, O);
/external/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp154 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
161 const MachineOperand &MO = MI->getOperand(OpNum);
193 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
195 if (!MI->getOperand(OpNum).isImm())
197 O << MI->getOperand(OpNum).getImm();
202 return printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI,
207 return printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI,
225 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI,
229 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI,
233 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TR
260 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
[all...]
H A DAArch64AsmPrinter.h51 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
54 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
/external/llvm/include/llvm/MC/MCParser/
H A DMCParsedAsmOperand.h37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } argument
/external/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp322 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
329 const MachineOperand &MO = MI->getOperand(OpNum);
333 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O);
369 if (OpNum == 0)
371 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
387 unsigned RegOp = OpNum;
393 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
396 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum
418 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
[all...]
H A DMipsAsmPrinter.h73 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
/external/llvm/lib/Bitcode/Reader/
H A DBitcodeReader.cpp2089 unsigned OpNum = 0; local
2091 if (getValueTypePair(Record, OpNum, NextValueNo, LHS) ||
2092 popValue(Record, OpNum, NextValueNo, LHS->getType(), RHS) ||
2093 OpNum+1 > Record.size())
2096 int Opc = GetDecodedBinaryOpcode(Record[OpNum++], LHS->getType());
2100 if (OpNum < Record.size()) {
2105 if (Record[OpNum] & (1 << bitc::OBO_NO_SIGNED_WRAP))
2107 if (Record[OpNum] & (1 << bitc::OBO_NO_UNSIGNED_WRAP))
2113 if (Record[OpNum] & (1 << bitc::PEO_EXACT))
2117 if (0 != (Record[OpNum]
2135 unsigned OpNum = 0; local
2151 unsigned OpNum = 0; local
2173 unsigned OpNum = 0; local
2194 unsigned OpNum = 0; local
2219 unsigned OpNum = 0; local
2234 unsigned OpNum = 0; local
2259 unsigned OpNum = 0; local
2270 unsigned OpNum = 0; local
2283 unsigned OpNum = 0; local
2303 unsigned OpNum = 0; local
2327 unsigned OpNum = 0; local
2473 unsigned OpNum = 4; local
2606 unsigned OpNum = 0; local
2618 unsigned OpNum = 0; local
2639 unsigned OpNum = 0; local
2653 unsigned OpNum = 0; local
2676 unsigned OpNum = 0; local
2696 unsigned OpNum = 0; local
2736 unsigned OpNum = 2; local
[all...]
/external/llvm/lib/Target/ARM/
H A DARMAsmPrinter.h56 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
59 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
62 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
H A DARMAsmPrinter.cpp334 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
336 const MachineOperand &MO = MI->getOperand(OpNum);
416 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
426 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
428 if (MI->getOperand(OpNum).isReg()) {
430 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
436 if (!MI->getOperand(OpNum).isImm())
438 O << MI->getOperand(OpNum).getImm();
442 printOperand(MI, OpNum, O);
445 if (MI->getOperand(OpNum)
554 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
985 int OpNum = 1; local
1036 int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; local
[all...]
H A DThumb2SizeReduction.cpp349 unsigned OpNum = 3; // First 'rest' of operands. local
387 OpNum = 4;
408 OpNum = 0;
417 OpNum = 2;
425 OpNum = 0;
432 OpNum = 2;
482 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum)
483 MIB.addOperand(MI->getOperand(OpNum));
/external/llvm/include/llvm/MC/
H A DMCInstrDesc.h151 int getOperandConstraint(unsigned OpNum, argument
153 if (OpNum < NumOperands &&
154 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
156 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
/external/llvm/lib/Target/R600/InstPrinter/
H A DAMDGPUInstPrinter.h36 void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O);
H A DAMDGPUInstPrinter.cpp47 void AMDGPUInstPrinter::printInterpSlot(const MCInst *MI, unsigned OpNum, argument
49 unsigned Imm = MI->getOperand(OpNum).getImm();
/external/llvm/utils/PerfectShuffle/
H A DPerfectShuffle.cpp106 unsigned short OpNum; member in struct:Operator
112 : ShuffleMask(shufflemask), OpNum(opnum), Name(name), Cost(cost) {
394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0;
395 assert(OpNum < 16 && "Too few bits to encode operation!");
402 unsigned Val = (CostSat << 30) | (OpNum << 26) | (LHS << 13) | RHS;
/external/llvm/lib/CodeGen/
H A DRegAllocFast.cpp74 unsigned short LastOpNum; // OpNum on LastUse.
189 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum,
191 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum,
194 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
582 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum, argument
607 LRI->LastOpNum = OpNum;
615 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum, argument
622 MachineOperand &MO = MI->getOperand(OpNum);
658 LRI->LastOpNum = OpNum;
663 // setPhysReg - Change operand OpNum i
666 setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) argument
[all...]
H A DTargetInstrInfo.cpp39 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, argument
42 if (OpNum >= MCID.getNumOperands())
45 short RegClass = MCID.OpInfo[OpNum].RegClass;
46 if (MCID.OpInfo[OpNum].isLookupPtrRegClass())
/external/llvm/lib/Target/X86/
H A DX86InstrInfo.h360 unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum,
362 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
367 unsigned OpNum,
H A DX86CodeEmitter.cpp119 unsigned OpNum) const;
770 unsigned OpNum) const {
771 unsigned SrcReg = MI.getOperand(OpNum).getReg();
772 unsigned SrcRegNum = getX86RegNum(MI.getOperand(OpNum).getReg());
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp264 unsigned getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum,
266 unsigned getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum,
268 unsigned getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum,
270 unsigned getT2AddrModeImm12OffsetOpValue(const MCInst &MI, unsigned OpNum,
1243 getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum,
1245 const MCOperand &MO1 = MI.getOperand(OpNum);
1246 const MCOperand &MO2 = MI.getOperand(OpNum+1);
1247 const MCOperand &MO3 = MI.getOperand(OpNum+2);
1261 getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum,
1263 const MCOperand &MO1 = MI.getOperand(OpNum);
[all...]
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h59 /// class constraint for OpNum, or NULL.
61 unsigned OpNum,
924 /// instructions. Other defs of MI's operand OpNum are avoided in the last N
942 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, argument
949 /// before MI to eliminate an unwanted dependency on OpNum.
966 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, argument
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp69 unsigned OpNum) const {
70 unsigned SrcReg = MI.getOperand(OpNum).getReg();
71 unsigned SrcRegNum = GetX86RegNum(MI.getOperand(OpNum));

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