/external/clang/test/Preprocessor/ |
H A D | macro_paste_bad.c | 32 #define VA __VA_ ## ARGS__ macro 33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macro}} variable
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/external/clang/test/Parser/ |
H A D | cxx-using-declaration.cpp | 4 int VA; member in namespace:A 9 using A::VA; 15 VA = 1;
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/external/chromium_org/third_party/skia/src/sfnt/ |
H A D | SkOTTable_OS_2.h | 31 struct VA : SkOTTableOS2_VA { } vA; struct in union:SkOTTableOS2::Version 45 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::VA) == 68, sizeof_SkOTTableOS2__VA_not_68);
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/external/skia/src/sfnt/ |
H A D | SkOTTable_OS_2.h | 31 struct VA : SkOTTableOS2_VA { } vA; struct in union:SkOTTableOS2::Version 45 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::VA) == 68, sizeof_SkOTTableOS2__VA_not_68);
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/external/clang/test/CXX/special/class.dtor/ |
H A D | p3-0x.cpp | 140 struct VA { struct 142 virtual ~VA() {} 145 struct VB : VA 149 struct TVB : VA
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/external/mksh/src/ |
H A D | shf.c | 776 #define VA(type) va_arg(args, type) macro 825 tmp = VA(int); 886 lnum = (long)VA(ssize_t); 888 lnum = VA(long); 890 lnum = (long)(short)VA(int); 892 lnum = (long)VA(int); 899 lnum = VA(size_t); 901 lnum = VA(unsigned long); 903 lnum = (unsigned long)(unsigned short)VA(int); 905 lnum = (unsigned long)VA(unsigne [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombinePHI.cpp | 880 Value *VA = PN.getIncomingValue(i); local 886 PN.setIncomingValue(j, VA);
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 337 CCValAssign &VA = ArgLocs[i]; local 338 if (VA.isRegLoc()) { 340 EVT RegVT = VA.getLocVT(); 352 RegInfo.addLiveIn(VA.getLocReg(), VReg); 358 if (VA.getLocInfo() == CCValAssign::SExt) 360 DAG.getValueType(VA.getValVT())); 361 else if (VA.getLocInfo() == CCValAssign::ZExt) 363 DAG.getValueType(VA.getValVT())); 365 if (VA.getLocInfo() != CCValAssign::Full) 366 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA 433 CCValAssign &VA = RVLocs[i]; local 490 CCValAssign &VA = ArgLocs[i]; local [all...] |
/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 1259 CCValAssign &VA = ArgLocs[i]; local 1260 EVT VT = VA.getLocVT(); 1268 DAG.getConstant(36 + VA.getLocMemOffset(), MVT::i32),
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H A D | SIISelLowering.cpp | 213 CCValAssign &VA = ArgLocs[ArgIdx++]; local 214 EVT VT = VA.getLocVT(); 216 if (VA.isMemLoc()) { 220 36 + VA.getLocMemOffset()); 224 assert(VA.isRegLoc() && "Parameter must be in a register!"); 226 unsigned Reg = VA.getLocReg();
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 322 CCValAssign &VA = RVLocs[i]; local 324 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); 328 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 434 CCValAssign &VA = ArgLocs[i]; local 435 if (VA.isMemLoc()) { 458 CCValAssign &VA = ArgLocs[i]; local 463 switch (VA.getLocInfo()) { 470 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 473 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA 844 CCValAssign &VA = ArgLocs[i]; local [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 198 CCValAssign &VA = RVLocs[i]; local 199 assert(VA.isRegLoc() && "Can only return in registers!"); 201 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), 206 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 261 CCValAssign &VA = RVLocs[i]; local 262 assert(VA.isRegLoc() && "Can only return in registers!"); 266 switch (VA.getLocInfo()) { 268 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); 271 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA 351 CCValAssign &VA = ArgLocs[i]; local 550 CCValAssign &VA = ArgLocs[i]; local 717 CCValAssign &VA = ArgLocs[i]; local 947 const CCValAssign &VA = ArgLocs[i]; local 1141 CCValAssign &VA = RVLocs[i]; local [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 530 // Value is a value that has been passed to us in the location described by VA 531 // (and so has type VA.getLocVT()). Convert Value to VA.getValVT(), chaining 534 CCValAssign &VA, SDValue Chain, 538 if (VA.getLocInfo() == CCValAssign::SExt) 539 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, 540 DAG.getValueType(VA.getValVT())); 541 else if (VA.getLocInfo() == CCValAssign::ZExt) 542 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, 543 DAG.getValueType(VA 533 convertLocVTToValVT(SelectionDAG &DAG, SDLoc DL, CCValAssign &VA, SDValue Chain, SDValue Value) argument 558 convertValVTToLocVT(SelectionDAG &DAG, SDLoc DL, CCValAssign &VA, SDValue Value) argument 596 CCValAssign &VA = ArgLocs[I]; local 728 CCValAssign &VA = ArgLocs[I]; local 822 CCValAssign &VA = RetLocs[I]; local 860 CCValAssign &VA = RetLocs[I]; local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 773 CCValAssign &VA = ValLocs[0]; 776 if (VA.getLocInfo() != CCValAssign::Full) 779 if (!VA.isRegLoc()) 784 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1) 787 unsigned SrcReg = Reg + VA.getValNo(); 789 EVT DstVT = VA.getValVT(); 813 unsigned DstReg = VA.getLocReg(); 822 RetRegs.push_back(VA.getLocReg()); 2001 CCValAssign &VA local [all...] |
H A D | X86ISelLowering.cpp | 1793 CCValAssign &VA = RVLocs[i]; local 1794 assert(VA.isRegLoc() && "Can only return in registers!"); 1799 if (VA.getLocInfo() == CCValAssign::SExt) 1800 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); 1801 else if (VA.getLocInfo() == CCValAssign::ZExt) 1802 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); 1803 else if (VA.getLocInfo() == CCValAssign::AExt) 1804 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); 1805 else if (VA.getLocInfo() == CCValAssign::BCvt) 1806 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA 1955 CCValAssign &VA = RVLocs[i]; local 2091 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo *MFI, unsigned i) const argument 2171 CCValAssign &VA = ArgLocs[i]; local 2416 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 2565 CCValAssign &VA = ArgLocs[i]; local 2696 CCValAssign &VA = ArgLocs[i]; local 3108 CCValAssign &VA = RVLocs[i]; local 3170 CCValAssign &VA = ArgLocs[i]; local 3199 CCValAssign &VA = ArgLocs[i]; local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 913 CCValAssign &VA = ArgLocs[i]; local 917 switch (VA.getLocInfo()) { 921 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 924 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 927 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 933 if (VA.isRegLoc()) { 934 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 936 assert(VA.isMemLoc()); 938 int Offset = VA.getLocMemOffset(); 1103 CCValAssign &VA local 1268 CCValAssign &VA = RVLocs[i]; local [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 967 CCValAssign &VA = ArgLocs[i]; local 978 VA.getLocMemOffset(), 984 } else if (VA.isRegLoc()) { 985 MVT RegVT = VA.getLocVT(); 987 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 990 } else { // VA.isRegLoc() 991 assert(VA.isMemLoc()); 993 int FI = MFI->CreateFixedObject(VA.getLocVT().getSizeInBits()/8, 994 VA.getLocMemOffset(), true); 997 ArgValue = DAG.getLoad(VA 1093 CCValAssign &VA = RVLocs[i]; local 1214 CCValAssign &VA = ArgLocs[i]; local 1411 CCValAssign VA = RVLocs[i]; local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1919 CCValAssign &VA = ArgLocs[i]; local 1920 MVT ArgVT = ArgVTs[VA.getValNo()]; 1927 if (VA.isRegLoc() && !VA.needsCustom()) { 1929 } else if (VA.needsCustom()) { 1931 if (VA.getLocVT() != MVT::f64 || 1933 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) 1969 CCValAssign &VA = ArgLocs[i]; local 1970 unsigned Arg = ArgRegs[VA.getValNo()]; 1971 MVT ArgVT = ArgVTs[VA [all...] |
H A D | ARMISelLowering.cpp | 1289 CCValAssign VA = RVLocs[i]; local 1294 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && 1301 if (VA.needsCustom()) { 1303 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, 1307 VA = RVLocs[++i]; // skip ahead to next loc 1308 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, 1314 if (VA.getLocVT() == MVT::v2f64) { 1319 VA = RVLocs[++i]; // skip ahead to next loc 1320 Lo = DAG.getCopyFromReg(Chain, dl, VA 1354 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 1367 PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument 1461 CCValAssign &VA = ArgLocs[i]; local 2020 CCValAssign &VA = ArgLocs[i]; local 2090 CCValAssign &VA = RVLocs[i]; local 2653 GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, SDValue &Root, SelectionDAG &DAG, SDLoc dl) const argument 2888 CCValAssign &VA = ArgLocs[i]; local [all...] |
/external/llvm/lib/Transforms/IPO/ |
H A D | GlobalOpt.cpp | 3045 const GlobalValue *VA = *reinterpret_cast<GlobalValue* const*>(A); local 3047 if (VA->getName() < VB->getName()) 3049 if (VB->getName() < VA->getName())
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2390 CCValAssign &VA = ArgLocs[i]; local 2391 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); 2408 switch (VA.getLocInfo()) { 2411 if (VA.isRegLoc()) { 2423 unsigned LocRegLo = VA.getLocReg(); 2444 if (VA.isRegLoc()) { 2445 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2450 assert(VA.isMemLoc()); 2454 MemOpChains.push_back(passArgOnStack(StackPtr, VA 2597 CCValAssign &VA = ArgLocs[i]; local 2755 CCValAssign &VA = RVLocs[i]; local [all...] |
/external/qemu/ |
H A D | ppc-dis.c | 820 /* The VA field in a VA, VX or VXR form instruction. */ 821 #define VA UI + 1 824 /* The VB field in a VA, VX or VXR form instruction. */ 825 #define VB VA + 1 828 /* The VC field in a VA form instruction. */ 832 /* The VD or VS field in a VA, VX, VXR or X form instruction. */ 846 /* The SHB field in a VA form instruction. */ 1723 /* An VA form instruction. */ 1726 /* The mask for an VA for 817 #define VA macro [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1981 CCValAssign &VA = ArgLocs[i]; local 1984 if (VA.isRegLoc()) { 1986 EVT ValVT = VA.getValVT(); 2009 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 2015 assert(VA.isMemLoc()); 2017 unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; 2018 int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(), 2023 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, 3348 CCValAssign &VA = RVLocs[i]; local 3349 assert(VA 3627 CCValAssign &VA = ArgLocs[i]; local 4494 CCValAssign &VA = RVLocs[i]; local [all...] |