| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 838a7fb1a3bc514f062a44565f6680b7aeee6a87 |
|
11-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
RegScavenger should not exclude undef uses
When computing currently-live registers, the register scavenger excludes undef
uses. As a result, undef uses are ignored when computing the restore points of
registers spilled into the emergency slots. While the register scavenger
normally excludes from consideration, when scavenging, registers used by the
current instruction, we need to not exclude undef uses. Otherwise, we might end
up requiring more emergency spill slots than we have (in the case where the
undef use *is* the currently-spilled register).
Another bug found by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| f22fd3f7b557a967b1edc1fa9ae770006a39e97c |
|
03-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl instead of SmallVector for iterators and references to avoid specifying the vector size unnecessarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185512 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 62c320a755ac27ac2b7f64e927892249e0f486e0 |
|
23-May-2013 |
Chad Rosier <mcrosier@apple.com> |
Simplify logic now that r182490 is in place. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 2e80991a7712d51f7637513703fc896f93eea252 |
|
06-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Reapply r178845 with fix - Fix bug in PEI's virtual-register scavenging
This fixes PEI as previously described, but correctly handles the case where
the instruction defining the virtual register to be scavenged is the first in
the block. Arnold provided me with a bugpoint-reduced test case, but even that
seems too large to use as a regression test. If I'm successful in cleaning it
up then I'll commit that as well.
Original commit message:
This change fixes a bug that I introduced in r178058. After a register is
scavenged using one of the available spills slots the instruction defining the
virtual register needs to be moved to after the spill code. The scavenger has
already processed the defining instruction so that registers killed by that
instruction are available for definition in that same instruction. Unfortunately,
after this, the scavenger needs to iterate through the spill code and then
visit, again, the instruction that defines the now-scavenged register. In order
to avoid confusion, the register scavenger needs the ability to 'back up'
through the spill code so that it can again process the instructions in the
appropriate order. Prior to this fix, once the scavenger reached the
just-moved instruction, it would assert if it killed any registers because,
having already processed the instruction, it believed they were undefined.
Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar
for diagnosing the problem and testing this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| b6cfeb63f8192724362565567a4cb4aa642baa1d |
|
05-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Revert r178845 - Fix bug in PEI's virtual-register scavenging
Reverting because this breaks one of the LTO builders. Original commit message:
This change fixes a bug that I introduced in r178058. After a register is
scavenged using one of the available spills slots the instruction defining the
virtual register needs to be moved to after the spill code. The scavenger has
already processed the defining instruction so that registers killed by that
instruction are available for definition in that same instruction. Unfortunately,
after this, the scavenger needs to iterate through the spill code and then
visit, again, the instruction that defines the now-scavenged register. In order
to avoid confusion, the register scavenger needs the ability to 'back up'
through the spill code so that it can again process the instructions in the
appropriate order. Prior to this fix, once the scavenger reached the
just-moved instruction, it would assert if it killed any registers because,
having already processed the instruction, it believed they were undefined.
Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar
for diagnosing the problem and testing this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178916 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| afe2f43e4ea0a514413bc742fc03ef5c675ae86a |
|
05-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix bug in PEI's virtual-register scavenging
This change fixes a bug that I introduced in r178058. After a register is
scavenged using one of the available spills slots the instruction defining the
virtual register needs to be moved to after the spill code. The scavenger has
already processed the defining instruction so that registers killed by that
instruction are available for definition in that same instruction. Unfortunately,
after this, the scavenger needs to iterate through the spill code and then
visit, again, the instruction that defines the now-scavenged register. In order
to avoid confusion, the register scavenger needs the ability to 'back up'
through the spill code so that it can again process the instructions in the
appropriate order. Prior to this fix, once the scavenger reached the
just-moved instruction, it would assert if it killed any registers because,
having already processed the instruction, it believed they were undefined.
Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar
for diagnosing the problem and testing this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 26998ee794e9b6f9b0bc27d1e273b6b78afce57d |
|
27-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix target-customized spilling in the register scavenger
This is a follow-up to r178073 (which should actually make target-customized
spilling work again).
I still don't have a regression test for this (but it would be good to have
one; Thumb 1 and Mips16 use this callback as well).
Patch by Richard Sandiford.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| df23a60fa6ce053511388e1bccca5900757e1aac |
|
26-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix the register scavenger for targets that provide custom spilling
As pointed out by Richard Sandiford, my recent updates to the register
scavenger broke targets that use custom spilling (because the new code assumed
that if there were no valid spill slots, than spilling would be impossible).
I don't have a test case, but it should be possible to create one for Thumb 1,
Mips 16, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178073 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 8846129f6eb58982a2cac22306c8c9b586084475 |
|
26-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings
The previous algorithm could not deal properly with scavenging multiple virtual
registers because it kept only one live virtual -> physical mapping (and
iterated through operands in order). Now we don't maintain a current mapping,
but rather use replaceRegWith to completely remove the virtual register as
soon as the mapping is established.
In order to allow the register scavenger to return a physical register killed
by an instruction for definition by that same instruction, we now call
RS->forward(I) prior to eliminating virtual registers defined in I. This
requires a minor update to forward to ignore virtual registers.
These new features will be tested in forthcoming commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178058 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 0e8fc6f87a5e0173c0c3ab1cfe4ca611bdee6aca |
|
23-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix comparison of mixed signedness
177774 broke the lld-x86_64-darwin11 builder; error:
error: comparison of integers of different signs: 'int' and 'size_type' (aka 'unsigned long')
for (SI = 0; SI < Scavenged.size(); ++SI)
~~ ^ ~~~~~~~~~~~~~~~~
Fix this by making SI also unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| dc3beb90178fc316f63790812b22201884eaa017 |
|
23-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Allow the register scavenger to spill multiple registers
This patch lets the register scavenger make use of multiple spill slots in
order to guarantee that it will be able to provide multiple registers
simultaneously.
To support this, the RS's API has changed slightly: setScavengingFrameIndex /
getScavengingFrameIndex have been replaced by addScavengingFrameIndex /
isScavengingFrameIndex / getScavengingFrameIndices.
In forthcoming commits, the PowerPC backend will use this capability in order
to implement the spilling of condition registers, and some special-purpose
registers, without relying on r0 being reserved. In some cases, spilling these
registers requires two GPRs: one for addressing and one to hold the value being
transferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9b294d4056f47bac5985de89c847aa1a04d38bf0 |
|
22-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Remove ScavengedRC from RegisterScavenging
ScavengedRC was a dead private variable (set, but not otherwise used). No
functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177708 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 108fb3202af6f500073cdbb7be32c25d7a273a2e |
|
31-Jan-2013 |
Chad Rosier <mcrosier@apple.com> |
[PEI] Pass the frame index operand number to the eliminateFrameIndex function.
Each target implementation was needlessly recomputing the index.
Part of rdar://13076458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| ec66ac5318f8546fcb002e1f26063144e224f279 |
|
26-Nov-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Remove unneeded #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168608 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 4823be3be1d87632fbd51ce8e51a58ee5e44b115 |
|
15-Nov-2012 |
Chad Rosier <mcrosier@apple.com> |
[reg scavenger] Fix the isUsed/isAliasUsed functions so as to not report a false
positive.
In this particular case, R6 was being spilled by the register scavenger when it
was in fact dead. The isUsed function reported R6 as used because the R6_R7
alias was reserved (due to the fact that we've reserved R7 as the FP). The
solution is to only check if the original register (i.e., R6) isReserved and
not the aliases. The aliases are only checked to make sure they're available.
The test case is derived from one of the nightly tester benchmarks and is rather
intractable and difficult to reproduce, so I haven't included it.
rdar://12592448
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| fb9ebbf236974beac31705eaeb9f50ab585af6ab |
|
15-Oct-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch most getReservedRegs() clients to the MRI equivalent.
Using the cached bit vector in MRI avoids comstantly allocating and
recomputing the reserved register bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 396618b43a85e12d290a90b181c6af5d7c0c5f11 |
|
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch all register list clients to the new MC*Iterator interface.
No functional change intended.
Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.
This makes it possible to do so without changing all clients (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 8c70ea47fae6d61441d150cbe9431cf5e06222e5 |
|
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify some more getAliasSet callers.
MCRegAliasIterator can include Reg itself in the list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| aba6559370c3d453588103fb667ffa3b11b76652 |
|
27-Mar-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an MRI::tracksLiveness() flag.
Late optimization passes like branch folding and tail duplication can
transform the machine code in a way that makes it expensive to keep the
register liveness information up to date. There is a fuzzy line between
register allocation and late scheduling where the liveness information
degrades.
The MRI::tracksLiveness() flag makes the line clear: While true,
liveness information is accurate, and can be used for register
scavenging. Once the flag is false, liveness information is not
accurate, and can only be used as a hint.
Late passes generally don't need the liveness information, but they will
sometimes use the register scavenger to help update it. The scavenger
enforces strict correctness, and we have to spend a lot of code to
update register liveness that may never be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9ebfbf8b9fd5f982e0db9293808bd32168615ba9 |
|
05-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| e4fd907e72a599eddfa7a81eac4366b5b82523e3 |
|
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 015f228861ef9b337366f92f637d4e8d624bb006 |
|
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store registers in callee saved register tables to reduce size of static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| cf14613455bc32b6a17821808595263e061335bc |
|
23-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Track reserved registers separately from RegsAvailable.
The bulk masking operations from register mask operands don't account
for reserved registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| be2af7ee781cd0083124514f497b8cf3070776ec |
|
22-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Handle regmasks in RegisterScavenging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151210 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9f946a24d9e69559d1e0aeb6d128c2fa19846c92 |
|
29-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix some scavenger performance issues.
- Don't call malloc+free in the very hot forward().
- Don't call isTiedToDefOperand().
- Don't create BitVector temporaries.
- Merge DeadRegs into KillRegs.
- Eliminate the early clobber checks, they were irrelevant to scavenging.
- Remove unnecessary code from -Asserts builds.
This speeds up ARM PEI by 3.4x and overall llc -O0 codegen time by 11%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 685c23e75842e64145fe319efd792abe72a827dd |
|
29-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Avoid creating BitVector temporaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 63c66724235ace1860e60a11ce2756d577387b29 |
|
16-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Give better scavenger errors by invoking the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 977679d6034791fd48a344e5b990503ba50fc242 |
|
07-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Added a late machine instruction copy propagation pass. This catches
opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
movl %eax, %ecx
movl %ecx, %eax
ret
The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)
This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.
rdar://10428165
rdar://10640363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147716 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 1f6a329f79b3568d379142f921f59c4143ddaa14 |
|
12-Aug-2011 |
Duncan Sands <baldrick@free.fr> |
Silence a bunch (but not all) "variable written but not read" warnings
when building with assertions disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef |
|
30-Jul-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register
allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136548 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| eeb57c7701ded683d660ed616966cfe7b1750337 |
|
30-Jul-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't check liveness of unallocatable registers.
This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.
While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for
MachineDCE and MachineSinking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d61c40360c3acc847263c5e5184b715c17528b09 |
|
02-May-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Handle <def,undef> in the second loop as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 2048e4ab7fb4ed45bae2159bae600ddf610303b1 |
|
02-May-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Only ignore <undef> use operands, keep the <def,undef> ops.
Def operands may also have an <undef> flag, but that just means that a
sub-register redef doesn't actually read the super-register. For physical
registers, it has no meaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| bdaa9dc4a45b8831c942437f726895eb24a956ba |
|
05-Apr-2011 |
Bob Wilson <bob.wilson@apple.com> |
Add an assertion instead of crashing when the scavenger goes past the end
of a basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 27ea9999e84dfb1e6c2baf06ec27a92f12753917 |
|
05-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Teach the register scavenger to take subregs into account when finding a free register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9204ddad5c30216e48c5bba0528ba24d66a22e13 |
|
02-Sep-2010 |
Jim Grosbach <grosbach@apple.com> |
The scavenger should just use getAllocatableSet() rather than reinventing it
locally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d273a003b6ad27720b2f0bab1a0996150a3d6fbe |
|
02-Sep-2010 |
Jim Grosbach <grosbach@apple.com> |
Add a bit of debug output for register scavenging
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341a |
|
27-Aug-2010 |
Jim Grosbach <grosbach@apple.com> |
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112241 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| ed903d746d96d071305b8182680595ba281b3f12 |
|
08-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
Clean up scavengeRegister() a bit to prefer available regs, which allows
the simplification of frame index register scavenging to not have to check
for available registers directly and instead just let scavengeRegister()
handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107880 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d9642faf7c66273eb3a8d99e5fa6b542da5374dd |
|
08-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
When processing frame index virtual registers, consider all available registers
(if there are any) and use the one which remains available for the longest
rather than just using the first one. This should help enable better re-use
of the loaded frame index values. rdar://7318760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 46df4eb46e784036cf895db271fe29e1cf2a975a |
|
16-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106091 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 1c8ab781d5b24bc473b4baa8f3fb6e9b55597aa3 |
|
04-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Skip dbg_value instructions when scanning instructions in register scavenging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105481 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 746ad69e088176819981b4b2c5ac8dcd49f5e60e |
|
06-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 5ef9d76f6f1afe5a07a9cffe7ce5780d07a25d9c |
|
15-Apr-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix PR6847. RegScavenger should ignore DebugValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 81bf03eb5cd68243eabb52505105aa5f4a831bf3 |
|
13-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate MachineBasicBlock::const_livein_iterator and make
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 7896c9f436a4eda5ec15e882a7505ba482a2fcd0 |
|
03-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 60f90618203290f628f295510b8962c1bedd74da |
|
12-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
RegScavenger::enterBasicBlock should always reset register state.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86972 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| a5dc45e3c8fa26e62b187284a240adf3879b56e2 |
|
26-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
common for targets to operate on registers where the top bits are undef. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
= d0
When the insert_subreg is eliminated by the coalescer, the scavenger used to
complain. The previous fix was to keep to insert_subreg around. But that's
brittle and it's overly conservative when we want to use the scavenger to
allocate registers. It's actually legal and desirable for other instructions
to use the "undef" part of d0. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
s1 =
= s1
= d0
We probably need add a "partial-undef" marker on machine operand so the
machine verifier would not complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 07d4964d1fc10a404f9bafd7c30b46322fe9293f |
|
25-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
When the scavenger is looking for a good candidate location to restore from a
spill, it should avoid doing so inside the live range of a virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 29bed1c8bb491a5fe609d58c5e560929117a859e |
|
22-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
The spill restore needs to be resolved to the SP/FP just like the spill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84792 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d482f55af135081aee7f7ab972bb8973f189c88f |
|
20-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
Adjust the scavenge register spilling to allow the target to choose an
appropriate restore location for the spill as well as perform the actual
save and restore.
The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| b58f498f7502e7e1833decbbbb4df771367c7341 |
|
07-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 6e214805b1163c0e3cd218963c9e66ea244956b2 |
|
06-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 540b05d227a79443b2a7b07d5152a35cb6392abf |
|
06-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
In Thumb1, the register scavenger is not always able to use an emergency
spill slot. When frame references are via the frame pointer, they will be
negative, but Thumb1 load/store instructions only allow positive immediate
offsets. Instead, Thumb1 will spill to R12.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83336 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 366e021fb2cb0efb8e727ef5e40bd55cef974c7a |
|
30-Sep-2009 |
Jim Grosbach <grosbach@apple.com> |
replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
per customary usage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| a9a9c95f6789946d5df34185725fc28cebad8b16 |
|
29-Sep-2009 |
Jim Grosbach <grosbach@apple.com> |
Additional check for regno==0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83103 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9ab2238df9f921970554cae8e7f6f7ad23d6c626 |
|
29-Sep-2009 |
Jim Grosbach <grosbach@apple.com> |
Moving register scavenging to a post pass results in virtual registers in
the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83077 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 393e277ecd02f52443633f6bfacdd1d4c6981212 |
|
24-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger.
LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g.
BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ...
...
%reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool]
...
%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>
When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose
%reg1031<def> = FOO <cp#1>, %D0<imp-def>
...
%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>
When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness.
Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| c0823fe7c679ca8f7d1667a310c2fca97b9402d5 |
|
18-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify RegScavenger::FindUnusedReg.
- Drop the Candidates argument and fix all callers. Now that RegScavenger
tracks available registers accurately, there is no need to restict the
search.
- Make sure that no aliases of the found register are in use. This was a potential bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 66a39699fb6b862e674415b32d307263812e996e |
|
16-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace RegScavenger::DistanceMap with a simpler local algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| e689ce626ce1d0022f70fb4a85113590bbdbb5e9 |
|
16-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Clean up the public interface of RegScavenger.
Remove unused methods and make others private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 16b794d25accbc4c5db63bb4d172049f052f0a55 |
|
15-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Refine EarlyClobber assert in register scavenger.
It is legal for an inline asm operand to use an earlyclobber register if the
use operand is tied to the earlyclobber operand. The issue is discussed here:
http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html
We should perhaps let only the machine code verifier worry about these finer
details. EarlyClobber operands are not really interesting to the scavenger.
This fixes PR4528 for the third time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 06789e23d1aa0bcd935a3fba3eff0ec8a35b9c01 |
|
13-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Track pristine registers as if they were live-in in the register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 8c54a620618a77f18af4bb5a0fb48dc741044b91 |
|
11-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Rebuild RegScavenger::DistanceMap each time it is needed.
The register scavenger maintains a DistanceMap that maps MI pointers to their
distance from the top of the current MBB. The DistanceMap is built
incrementally in forward() and in bulk in findFirstUse(). It is used by
scavengeRegister() to determine which candidate register has the longest
unused interval.
Unfortunately the DistanceMap contents can become outdated. The first time
scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If
then instructions are inserted in the MBB (as they always are following
scavengeRegister()), the recorded distances are too short. This causes bad
behaviour in the included test case where a register use /after/ the current
position is ignored because findFirstUse() thinks is is /before/ the current
position. A "using an undefined register" assertion follows promptly.
The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and
discard it after use. This means that DistanceMap is no longer needed as a
RegScavenger member variable, and forward() doesn't need to update it.
The fix then discloses issue number two in the same test case: The candidate
search in scavengeRegister() finds a CSR that has been saved in the prologue,
but is currently unused. It would be both inefficient and wrong to spill such
a register in the emergency spill slot. In the present case, the emergency
slot restore is placed immediately before the normal epilogue restore, leading
to a "Redefining a live register" assertion.
Fix number two: When scavengerRegister() stumbles upon an unused register that
is overwritten later in the MBB, return that register early. It is important
to verify that the register is defined later in the MBB, otherwise it might be
an unspilled CSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78650 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9390cd0e86cb3b79f6836acab2a27b275e5bde9e |
|
08-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the mistaken commit r77904.
Now there is no special treatment of instructions that redefine part of a
super-register. Instead, the super-register is marked with <imp-use,kill> and
<imp-def>. For instance, from LowerSubregs on ARM:
subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5
subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def>
subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6
subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78466 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| dffb051c21d32209c601ca0ca6baae75b6c6463f |
|
08-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify RegScavenger::forward a bit more.
Verify that early clobber registers and their aliases are not used.
All changes to RegsAvailable are now done as a transaction so the order of
operands makes no difference.
The included test case is from PR4686. It has behaviour that was dependent on the order of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| c40f6130344c53d5f0833838eddca1f94670ea1d |
|
08-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Back out some of recent register scavenger change by John Mosby. It broke a number of ARM tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 31f5591c91d4c012901018013aba19b0015fa6a0 |
|
06-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Get rid of RegScavenger::backwards() before the bitrot spreads.
If we need it one day, there is nothing wrong with putting it back in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| e0161ea1050fd4107f3307b1e25b3aac02c2ba16 |
|
06-Aug-2009 |
John Mosby <ojomojo@gmail.com> |
Reg Scavenging generalization (Thumb support):
- start support for new PEI w/reg alloc, allow running RS from emit{Pro,Epi}logue() target hooks.
- fix minor issue with recursion detection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78318 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 323e7d32ab256ba8847ba4ed176b5cd7d0bec3ad |
|
04-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Clean up the handling of two-address operands in RegScavenger.
This fixes PR4528.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78107 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| f955cbf56f130cdeb4c6c8aaa4a2715d420c1327 |
|
04-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't give implicit machine operands special treatment in the register scavenger.
Imp-def is *not* allowed to redefine a live register.
Imp-use is *not* allowed to use a dead register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 7d35249e897dc655c7c884b83d5cb39478ae497c |
|
04-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR4528. This scavenger assertion is too strict. The two-address value is
killed by another operand.
There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| b36eb9df205aa83cfdfc8ecebc93e1043d6253d9 |
|
02-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix issue in regscavenger when scavenging a callee-saved register that has not been spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77912 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 0e6a4efdd4f97137fb0a58d7bb3de07562185530 |
|
02-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Scavenger asserts.
Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier.
Allow redefinition of a sub-register of a live register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 1e0c1588b1b030a1402cf1865b63faf060e44a39 |
|
22-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Ignore undef uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76799 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 72fbc3d9d260e061bdee07059fcd63772c714091 |
|
16-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix bug in RegScavenger::scavengeRegister().
Reserved registers are not candidates for scavenging, and they were removed
from the candidate list like this:
CreateRegClassMask(RC, Candidates);
Candidates ^= ReservedRegs;
However, when there are reserved registers outside RC, this causes invalid
bits to be set in Candidates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| f36892335b4919b9120e48a792e6b3630b9de978 |
|
12-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Fix assert(0) conversion, as suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 7d696d80409aad20bb5da0fc4eccab941dd371d4 |
|
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Convert more assert(0)+abort() -> LLVM_UNREACHABLE,
and abort()/exit() -> llvm_report_error().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 459a7c6b6ad9c4fcb9f119aa6eaaf2769b00d9b1 |
|
01-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def.
Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 2578ba26e72e36dde64be0f52a2788480aad3378 |
|
01-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 50564ebc9e3d7ff806062023e6511e91065df0d2 |
|
30-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 4784f1fc73abf6005b7b7262d395af71b57b1255 |
|
30-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.
This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 4a274e573dbbd4a6085de0d3c738c801b9d000c5 |
|
12-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
If killed register is defined by implicit_def, do not clear it since it's live range may overlap another def of same register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d9df5017040489303acb57bdd8697ef0f8bafc08 |
|
09-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands. The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d68a07650cdb2e18f18f362ba533459aa10e01b6 |
|
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 2755896fd048d189bedc5e99e776b3eca010dd4e |
|
23-Dec-2008 |
Devang Patel <dpatel@apple.com> |
Silience unused warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61390 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 1385758215bb31ba042a3d42e40d28e521616a0c |
|
19-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Initialize the ImplicitDefed member, to avoid getting stale
data from a previous block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d118342b25eb6a3a67792cda9fce9b4c1e45a867 |
|
02-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d37c13cfd1bf4b08d0b99d93c799a1caa74cf3c6 |
|
20-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction.
- When scavenging a register, in addition to the spill, insert a restore before the first use.
- Abort if client is looking to scavenge a register even when a previously scavenged register is still live.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59697 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 3a5b020292408421e2605cb15a4741062f2c74b6 |
|
19-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Make the same change to RegScavenger::backward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 63a431c6704e711713b0258bd987cfb257767cf4 |
|
18-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
We also need to keep the operand index for two address check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59562 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 9c64bf3905ea338719800008c03d95a17cb26689 |
|
18-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d735b8019b0f297d7c14b55adcd887af24d8e602 |
|
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 4542611bb9793e8376d7d5f33b4a1e2d11712894 |
|
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Minor const-correctness fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 43e2a035309f4e353a8bd5547d10125414597e74 |
|
27-May-2008 |
Duncan Sands <baldrick@free.fr> |
Fix some constructs that gcc-4.4 warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51591 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 5d3600f5766e93cb459ef6108fba00c052aa6388 |
|
11-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Allow registers defined by implicit_def to be clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49512 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 1dc7869025d91906e8305e921ddb82dac780d70e |
|
05-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
1. IMPLICIT_DEF can *re-define* any register.
2. Coalescer can now create an interesting situation where a register def can
reaches itself without being killed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d93ae242d3bb0a306c05a03dad9bf3ec8eba8ceb |
|
08-Mar-2008 |
Bill Wendling <isanbard@gmail.com> |
Something that kills a super-register also
kills the sub-register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d68f47c6fd744e051f7f2d97b6366d40bf27c438 |
|
07-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| ed1fcd8987a7d39ca69bfa3cbf14b270738f029c |
|
07-Mar-2008 |
Bill Wendling <isanbard@gmail.com> |
When setting the "unused" info, take into account something like this:
%r3<def> = OR %x3<kill>, %x3
We don't want to mark the %r3 as unused even though it's a sub-register of %x3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 6130f66eaae89f8878590796977678afa8448926 |
|
05-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor code. Remove duplicated functions that basically do the same thing as
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| a0a570cec647b860a724f4f70a191bc83cdcc947 |
|
03-Mar-2008 |
Bill Wendling <isanbard@gmail.com> |
Make the register scavenger update the bookkeeping values for sub/super
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 527c250a9080a5b6cf0053a6215037c3769ff4a0 |
|
16-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47200 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 6f0d024a534af18d9e60b3ea757376cd8a3a980e |
|
10-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 749c6f6b5ed301c84aac562e414486549d7b98eb |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 69244300b8a0112efb44b6273ecea4ca6264b8cf |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| f6372aa1cc568df19da7c5023e83c75aa9404a07 |
|
01-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move some more instruction creation methods from RegisterInfo into InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| d64b5c82b97ad1b74eb9fd2f23257a7899b0c307 |
|
05-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 92dfe2001e96f6e2b6d327e8816f38033f88b295 |
|
14-Sep-2007 |
Dan Gohman <gohman@apple.com> |
Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 5db322acefc3089c133b8f3a33fa0a3ce90e2001 |
|
05-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Better assertion messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 8e3347332120956538a6d882b02719e34b57f0cd |
|
01-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| faa510726f4b40aa4495e60e4d341c6467e3fb01 |
|
26-Apr-2007 |
Evan Cheng <evan.cheng@apple.com> |
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 595b6d121cbbae3f58e508ae928b4ed917e686b6 |
|
03-Apr-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bad bad bug. findRegisterUseOperand() returns -1 if a use if not found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35618 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| c6b9ef80a890fcf75f18cabc3fe2d5f9ef2faaf5 |
|
27-Mar-2007 |
Dale Johannesen <dalej@apple.com> |
Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to
hopefully forestall similar errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 69cb9b78f11d505f4351a269fc90e7b77fcda437 |
|
20-Mar-2007 |
Dale Johannesen <dalej@apple.com> |
maintain LiveIn when splitting blocks (register scavenging needs it)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| caddd590f72376aaac531c1004be0535b460992a |
|
06-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Minor bug fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34985 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| b74a3e6fda768eb6160559e025f8b65c46db46d9 |
|
06-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Register scavenger is now capable of scavenging. It spills a register whose use of furthest away to make it available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34964 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 5de3b7f35131b3c17e0b3c711d47ab3fb2c1e9be |
|
02-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Mark dead def as unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34844 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 5196b3680cf8df32b6c763e3d97e963e45150e5a |
|
01-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a version of FindUnusedReg that restrict search to a specific set of registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| a3756ee7fe384210eddcfd66e2934439960b13a1 |
|
01-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Interface clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34770 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 898218cc5edecea1275ee266b2cd13313ea6b67b |
|
27-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Some more code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| 8cab162e03d7ae0638a3ab51e92ac228abe17d55 |
|
27-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34698 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
|
| bb6fb3357d6c1e9ffb15de4893e59e3bbdd600a3 |
|
27-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
RegScavenger interface change to make it more flexible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
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| ed570dedad945e1fe9a4bfeaa47276d875f1feed |
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27-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
forward() should not increment internal iterator. Its client may insert instruction between now and next forward() call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34649 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
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| 0badfea274f9612780caccbad6e1870f39ed9f40 |
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25-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34596 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
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| 403c45dfcc74585b02339b5f55f739672e3d141a |
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23-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Mark livein registers as being in used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
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| 96fa612373e258120d351ed14361f964ad22f99d |
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23-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Initial check in of register scavenger. Its only current functionality is tracking live registers per MBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/RegisterScavenging.cpp
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