Searched defs:OffsetReg (Results 1 - 6 of 6) sorted by relevance

/external/llvm/lib/Target/R600/
H A DAMDGPUInstrInfo.cpp139 unsigned OffsetReg = MI->getOperand(OffsetOpIdx).getReg(); local
140 if (OffsetReg == AMDGPU::INDIRECT_BASE_ADDR) {
145 Address, OffsetReg);
154 unsigned OffsetReg = MI->getOperand(OffsetOpIdx).getReg(); local
155 if (OffsetReg == AMDGPU::INDIRECT_BASE_ADDR) {
161 OffsetReg);
/external/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp471 unsigned OffsetReg = 0; local
474 OffsetReg = MI->getOperand(2).getReg();
502 assert((!HasShift || OffsetReg) && "Invalid so_reg load / store address!");
505 MIB.addReg(OffsetReg, getKillRegState(OffsetKill));
/external/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp595 // ISD::EH_RETURN. We convert it to a stack increment by OffsetReg, and
603 unsigned OffsetReg = I->getOperand(0).getReg(); local
615 .addReg(SP).addReg(OffsetReg);
H A DMipsISelLowering.cpp1914 unsigned OffsetReg = Subtarget->isABI_N64() ? Mips::V1_64 : Mips::V1; local
1916 Chain = DAG.getCopyToReg(Chain, DL, OffsetReg, Offset, SDValue());
1919 DAG.getRegister(OffsetReg, Ty),
/external/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp168 unsigned OffsetReg; member in struct:__anon26131::SparcOperand::MemOp
220 return Mem.OffsetReg;
357 Op->Mem.OffsetReg = offsetReg;
366 Op->Mem.OffsetReg = 0;
378 Op->Mem.OffsetReg = 0;
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1530 unsigned OffsetReg = Hexagon::R28; local
1537 Chain = DAG.getCopyToReg(Chain, dl, OffsetReg, Offset);
1540 // MF.getRegInfo().addLiveOut(OffsetReg);

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