/external/chromium_org/third_party/skia/gm/ |
H A D | strokerects.cpp | 21 static const SkScalar SH = SkIntToScalar(H); member in namespace:skiagm 62 canvas->translate(SW * x, SH * y); 65 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
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H A D | strokes.cpp | 19 static const SkScalar SH = SkIntToScalar(H); variable 62 canvas->translate(0, SH * y); 65 , SW - SkIntToScalar(2), SH - SkIntToScalar(2) 126 canvas->translate(0, SH * y); 130 SH - SkIntToScalar(2))); 136 rotate(SkIntToScalar(15), SW/2, SH/2, canvas);
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/external/skia/gm/ |
H A D | strokerects.cpp | 21 static const SkScalar SH = SkIntToScalar(H); member in namespace:skiagm 62 canvas->translate(SW * x, SH * y); 65 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
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H A D | strokes.cpp | 19 static const SkScalar SH = SkIntToScalar(H); variable 62 canvas->translate(0, SH * y); 65 , SW - SkIntToScalar(2), SH - SkIntToScalar(2) 126 canvas->translate(0, SH * y); 130 SH - SkIntToScalar(2))); 136 rotate(SkIntToScalar(15), SW/2, SH/2, canvas);
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.cpp | 43 unsigned char SH = MI->getOperand(2).getImm(); local 47 if (SH <= 31 && MB == 0 && ME == (31-SH)) { 50 if (SH <= 31 && MB == (32-SH) && ME == 31) { 52 SH = 32-SH; 58 O << ", " << (unsigned int)SH; 76 unsigned char SH = MI->getOperand(2).getImm(); local 78 // rldicr RA, RS, SH, 6 [all...] |
/external/llvm/lib/Analysis/ |
H A D | ScalarEvolutionExpander.cpp | 1578 Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty, argument 1581 return expandCodeFor(SH, Ty); 1584 Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty) { argument 1586 Value *V = expand(SH); 1588 assert(SE.getTypeSizeInBits(Ty) == SE.getTypeSizeInBits(SH->getType()) &&
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 107 unsigned &SH, unsigned &MB, unsigned &ME); 371 bool isShiftMask, unsigned &SH, 405 SH = Shift & 31; 429 unsigned Value, SH = 0; local 461 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value; 477 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value; 481 SH &= 31; 482 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB), 1147 unsigned Imm, Imm2, SH, MB, ME; local 1153 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, M 370 isRotateAndMask(SDNode *N, unsigned Mask, bool isShiftMask, unsigned &SH, unsigned &MB, unsigned &ME) argument 1220 unsigned Imm, SH, MB, ME; local 1232 unsigned Imm, SH, MB, ME; local [all...] |
/external/chromium_org/third_party/libaddressinput/src/java/src/com/android/i18n/addressinput/ |
H A D | RegionDataConstants.java | 1011 SH(new String[]{ enum constant in enum:RegionDataConstants.RegionDataEnum
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1889 SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1, local 1892 DCI.AddToWorklist(SH.getNode()); 1893 return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond); 1912 SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0, local 1915 DCI.AddToWorklist(SH.getNode()); 1916 return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
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/external/qemu/disas/ |
H A D | ppc.c | 753 /* The SH field in an X or M form instruction. */ 754 #define SH RSO + 1 757 #define EVUIMM SH 760 /* The SH field in an MD form instruction. This is split. */ 761 #define SH6 SH + 1 765 /* The SH field of the tlbwe instruction, which is optional. */ 883 /* SH field starting at bit position 16. */ 1479 /* The SH field in an MD form instruction. This is split. */ 1693 /* An M_MASK with the SH and ME fields fixed. */ 1703 /* An MD_MASK with the SH fiel 750 #define SH macro [all...] |
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
H A D | org.apache.lucene.analysis_1.9.1.v20100518-1140.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |