/external/chromium_org/third_party/skia/src/sfnt/ |
H A D | SkOTTable_OS_2.h | 30 //original V0 TT 32 struct V0 : SkOTTableOS2_V0 { } v0; struct in union:SkOTTableOS2::Version 46 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::V0) == 78, sizeof_SkOTTableOS2__V0_not_78);
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/external/skia/src/sfnt/ |
H A D | SkOTTable_OS_2.h | 30 //original V0 TT 32 struct V0 : SkOTTableOS2_V0 { } v0; struct in union:SkOTTableOS2::Version 46 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::V0) == 78, sizeof_SkOTTableOS2__V0_not_78);
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/external/llvm/unittests/Analysis/ |
H A D | ScalarEvolutionTest.cpp | 48 Value *V0 = new GlobalVariable(M, Ty, false, GlobalValue::ExternalLinkage, Init, "V0"); local 56 const SCEV *S0 = SE.getSCEV(V0); 76 EXPECT_EQ(cast<SCEVUnknown>(M0->getOperand(1))->getValue(), V0); 82 V1->replaceAllUsesWith(V0); 84 // After the RAUWs, these should all be pointing to V0. 85 EXPECT_EQ(cast<SCEVUnknown>(M0->getOperand(1))->getValue(), V0); 86 EXPECT_EQ(cast<SCEVUnknown>(M1->getOperand(1))->getValue(), V0); 87 EXPECT_EQ(cast<SCEVUnknown>(M2->getOperand(1))->getValue(), V0);
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/external/scrypt/lib/crypto/ |
H A D | crypto_scrypt-neon.c | 197 void * B0, * V0, * XY0; local 236 if ((errno = posix_memalign(&V0, 64, 128 * r * N)) != 0) 238 V = (uint32_t *)(V0); 248 if ((V0 = malloc(128 * r * N + 63)) == NULL) 250 V = (uint32_t *)(((uintptr_t)(V0) + 63) & ~ (uintptr_t)(63)); 254 if ((V0 = mmap(NULL, 128 * r * N, PROT_READ | PROT_WRITE, 262 V = (uint32_t *)(V0); 287 if (munmap(V0, 128 * r * N)) 290 free(V0);
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H A D | crypto_scrypt-sse.c | 270 void * B0, * V0, * XY0; local 309 if ((errno = posix_memalign(&V0, 64, 128 * r * N)) != 0) 311 V = (uint32_t *)(V0); 321 if ((V0 = malloc(128 * r * N + 63)) == NULL) 323 V = (uint32_t *)(((uintptr_t)(V0) + 63) & ~ (uintptr_t)(63)); 327 if ((V0 = mmap(NULL, 128 * r * N, PROT_READ | PROT_WRITE, 335 V = (uint32_t *)(V0); 360 if (munmap(V0, 128 * r * N)) 363 free(V0);
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/external/chromium_org/third_party/libwebp/enc/ |
H A D | picture_tools.c | 126 #define BLEND(V0, V1, ALPHA) \ 127 ((((V0) * (255 - (ALPHA)) + (V1) * (ALPHA)) * 0x101) >> 16) 128 #define BLEND_10BIT(V0, V1, ALPHA) \ 129 ((((V0) * (1020 - (ALPHA)) + (V1) * (ALPHA)) * 0x101) >> 18) 142 const int V0 = VP8RGBToV(4 * red, 4 * green, 4 * blue, 4 * YUV_HALF); local 168 v[x] = BLEND_10BIT(V0, v[x], alpha); 173 v[x] = BLEND_10BIT(V0, v[x], alpha);
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/external/clang/test/CodeGen/ |
H A D | ext-vector.c | 282 int4 test15(uint4 V0) { argument 284 int4 V = !V0;
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/external/fdlibm/ |
H A D | e_j1.c | 147 static const double V0[5] = { variable 149 static double V0[5] = { 208 v = one+z*(V0[0]+z*(V0[1]+z*(V0[2]+z*(V0[3]+z*V0[4]))));
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/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelDAGToDAG.cpp | 76 unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(); local 80 V0 = RegInfo.createVirtualRegister(RC); 84 BuildMI(MBB, I, DL, TII.get(Mips::GotPrologue16), V0). 89 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
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H A D | MipsSEISelDAGToDAG.cpp | 134 unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg(); local 142 V0 = RegInfo.createVirtualRegister(RC); 153 BuildMI(MBB, I, DL, TII.get(Mips::LUi64), V0) 155 BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0) 167 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0) 169 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0) 182 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0) 184 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9); 206 // Register $2 (Mips::V0) is added to the list of live-in registers to ensure 209 MF.getRegInfo().addLiveIn(Mips::V0); [all...] |
H A D | MipsISelLowering.cpp | 1912 // Store stack offset in V1, store jump target in V0. Glue CopyToReg and 1915 unsigned AddrReg = Subtarget->isABI_N64() ? Mips::V0_64 : Mips::V0; 2853 unsigned V0 = Subtarget->isABI_N64() ? Mips::V0_64 : Mips::V0; local 2855 Chain = DAG.getCopyToReg(Chain, DL, V0, Val, Flag); 2857 RetOps.push_back(DAG.getRegister(V0, getPointerTy()));
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/external/llvm/utils/PerfectShuffle/ |
H A D | PerfectShuffle.cpp | 29 static inline unsigned short MakeMask(unsigned V0, unsigned V1, argument 31 return (V0 << (3*4)) | (V1 << (2*4)) | (V2 << (1*4)) | (V3 << (0*4));
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/external/webp/src/enc/ |
H A D | picture_tools.c | 126 #define BLEND(V0, V1, ALPHA) \ 127 ((((V0) * (255 - (ALPHA)) + (V1) * (ALPHA)) * 0x101) >> 16) 128 #define BLEND_10BIT(V0, V1, ALPHA) \ 129 ((((V0) * (1020 - (ALPHA)) + (V1) * (ALPHA)) * 0x101) >> 18) 142 const int V0 = VP8RGBToV(4 * red, 4 * green, 4 * blue, 4 * YUV_HALF); local 168 v[x] = BLEND_10BIT(V0, v[x], alpha); 173 v[x] = BLEND_10BIT(V0, v[x], alpha);
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/external/clang/test/Parser/ |
H A D | recovery.cpp | 151 enum class EC3 { V0 = 0, V5 = 5 }; // expected-note {{declared here}} member in class:MissingBrace::S::PR17084::TempID::EC3 166 case EC3::V0: break;
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H A D | MicrosoftExtensions.cpp | 305 __declspec(property) int V0; // expected-error {{expected '(' after 'property'}} member in struct:pure_virtual_dtor_inline::StructWithProperty
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/external/clang/lib/Driver/ |
H A D | ToolChains.h | 415 bool isIPhoneOSVersionLT(unsigned V0, unsigned V1=0, unsigned V2=0) const { argument 417 return TargetVersion < VersionTuple(V0, V1, V2); 420 bool isMacosxVersionLT(unsigned V0, unsigned V1=0, unsigned V2=0) const { argument 422 return TargetVersion < VersionTuple(V0, V1, V2);
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/external/llvm/lib/Transforms/Scalar/ |
H A D | Reassociate.cpp | 208 Value *V0 = I->getOperand(0); local 210 if (isa<ConstantInt>(V0)) 211 std::swap(V0, V1); 215 SymbolicPart = V0;
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 395 Value *V0 = I->getOperand(0); local 397 if (ConstantFP *C = dyn_cast<ConstantFP>(V0)) { 403 Addend0.set(C, V0); 558 Value *V0 = I->getOperand(0); local 560 InstQuota = ((!isa<Constant>(V0) && V0->hasOneUse()) &&
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 2925 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local 2927 EVT OutVT = V0.getValueType(); 2929 return DAG.getVectorShuffle(OutVT, dl, V0, V1, &NewMask[0]); 3016 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local 3021 V0, ConvElem, N->getOperand(2)); 3026 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local 3029 V0->getValueType(0).getScalarType(), V0, V1);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 264 SDNode *createGPRPairNode(EVT VT, SDValue V0, SDValue V1); 265 SDNode *createSRegPairNode(EVT VT, SDValue V0, SDValue V1); 266 SDNode *createDRegPairNode(EVT VT, SDValue V0, SDValue V1); 267 SDNode *createQRegPairNode(EVT VT, SDValue V0, SDValue V1); 270 SDNode *createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3); 271 SDNode *createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3); 272 SDNode *createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3); 1564 SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) { argument 1565 SDLoc dl(V0.getNode()); 1570 const SDValue Ops[] = { RegClass, V0, SubReg 1575 createSRegPairNode(EVT VT, SDValue V0, SDValue V1) argument 1586 createDRegPairNode(EVT VT, SDValue V0, SDValue V1) argument 1596 createQRegPairNode(EVT VT, SDValue V0, SDValue V1) argument 1606 createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument 1621 createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument 1635 createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument 1960 SDValue V0 = N->getOperand(Vec0Idx + 0); local 2013 SDValue V0 = N->getOperand(Vec0Idx + 0); local 2125 SDValue V0 = N->getOperand(Vec0Idx + 0); local 2261 SDValue V0 = N->getOperand(FirstTblReg + 0); local 3278 SDValue V0 = N->getOperand(0); local 3363 SDValue V0 = N->getOperand(i+1); local [all...] |
/external/llvm/lib/Transforms/Vectorize/ |
H A D | SLPVectorizer.cpp | 296 Value *V0 = I->getOperand(0); local 299 OrigLeft.push_back(V0); 302 Instruction *I0 = dyn_cast<Instruction>(V0); 369 Left.push_back(V0); 1912 Value *V0 = Builder.CreateBinOp(BinOp0->getOpcode(), LHS, RHS); local 1932 Value *V = Builder.CreateShuffleVector(V0, V1, ShuffleMask);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 6072 /// operands for the horizontal binop into V0 and V1. 6088 SDValue &V0, SDValue &V1) { 6099 V0 = DAG.getUNDEF(VT); 6137 if (V0.getOpcode() == ISD::UNDEF) 6138 V0 = Op0.getOperand(0); 6146 SDValue Expected = (i * 2 < NumElts) ? V0 : V1; 6166 /// This function expects two 256-bit vectors called V0 and V1. 6173 /// \p Mode specifies how the 128-bit parts of V0 and V1 are passed in input to 6176 /// the lower 128-bit of V0 and the upper 128-bit of V0 6085 isHorizontalBinOp(const BuildVectorSDNode *N, unsigned Opcode, SelectionDAG &DAG, unsigned BaseIdx, unsigned LastIdx, SDValue &V0, SDValue &V1) argument 6193 ExpandHorizontalBinOp(const SDValue &V0, const SDValue &V1, SDLoc DL, SelectionDAG &DAG, unsigned X86Opcode, bool Mode, bool isUndefLO, bool isUndefHI) argument [all...] |
/external/qemu/target-mips/ |
H A D | cpu.h | 38 uint_fast16_t V0:1; member in struct:r4k_tlb_t
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3049 // CNT V0.8B, V0.8B // 8xbyte pop-counts 3050 // ADDV B0, V0.8B // sum 8xbyte pop-counts 3051 // UMOV X0, V0.B[0] // copy byte result back to integer reg 4515 SDValue V0 = Op.getOperand(0); local 4519 if (VT.getVectorElementType() != V0.getValueType().getVectorElementType() || 4523 bool SplitV0 = V0.getValueType().getSizeInBits() == 128; 4531 V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0, 4538 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, V0, V [all...] |
/external/robolectric/lib/main/ |
H A D | sqlite-jdbc-3.7.2.jar | META-INF/ META-INF/MANIFEST.MF META-INF/maven/ META-INF/maven/org. ... |