/external/mesa3d/src/gallium/winsys/radeon/drm/ |
H A D | radeon_drm_cs.h | 82 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo); 92 struct radeon_bo *bo) 94 int num_refs = bo->num_cs_references; 95 return num_refs == bo->rws->num_cs || 96 (num_refs && radeon_get_reloc(cs->csc, bo) != -1); 101 struct radeon_bo *bo) 105 if (!bo->num_cs_references) 108 index = radeon_get_reloc(cs->csc, bo); 116 radeon_bo_is_referenced_by_any_cs(struct radeon_bo *bo) argument 118 return bo 91 radeon_bo_is_referenced_by_cs(struct radeon_drm_cs *cs, struct radeon_bo *bo) argument 100 radeon_bo_is_referenced_by_cs_for_write(struct radeon_drm_cs *cs, struct radeon_bo *bo) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | gen7_sol_state.c | 58 drm_intel_bo *bo; local 76 bo = intel_bufferobj_buffer(intel, bufferobj, INTEL_WRITE_PART); 82 assert(end <= bo->size); 94 OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, start); 95 OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, end);
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/external/mesa3d/src/mesa/drivers/dri/intel/ |
H A D | intel_regions.h | 61 drm_intel_bo *bo; /**< buffer manager's buffer */ member in struct:intel_region 72 uint32_t name; /**< Global name for the bo */
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_ioctl.c | 149 rmesa->ioctl.bo, 202 rmesa->ioctl.bo, 278 struct radeon_bo *bo, 283 rmesa->ioctl.bo = bo; 295 OUT_BATCH_RELOC(offset, bo, offset, RADEON_GEM_DOMAIN_GTT, 0, 0); 308 rmesa->ioctl.bo = rmesa->radeon.tcl.aos[0].bo; 352 rmesa->radeon.tcl.aos[i+0].bo, 358 rmesa->radeon.tcl.aos[i+1].bo, 276 radeonEmitVertexAOS( r100ContextPtr rmesa, GLuint vertex_size, struct radeon_bo *bo, GLuint offset ) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/egl/drivers/dri2/ |
H A D | platform_drm.c | 45 struct gbm_bo *bo; local 52 bo = dri2_surf->current->bo; 56 return bo; 60 release_buffer(struct gbm_surface *_surf, struct gbm_bo *bo) argument 67 if (dri2_surf->color_buffers[i].bo == bo) { 163 if (dri2_surf->color_buffers[i].bo) 164 gbm_bo_destroy(dri2_surf->color_buffers[i].bo); 183 struct gbm_dri_bo *bo; local [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/pipebuffer/ |
H A D | pb_bufmgr_slab.c | 92 struct pb_buffer *bo; member in struct:pb_slab 219 pb_reference(&slab->bo, NULL); 259 return pb_validate(buf->slab->bo, vl, flags); 268 pb_fence(buf->slab->bo, fence); 278 pb_get_base_buffer(buf->slab->bo, base_buf, offset); 312 slab->bo = mgr->provider->create_buffer(mgr->provider, mgr->slabSize, &mgr->desc); 313 if(!slab->bo) { 320 slab->virtual = pb_map(slab->bo, 327 pb_unmap(slab->bo); 329 numBuffers = slab->bo [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nouveau/ |
H A D | nouveau_mm.c | 37 struct nouveau_bo *bo; member in struct:mm_slab 99 /* size of bo allocation for slab with chunks of (1 << chunk_order) bytes */ 129 slab->bo = NULL; 132 &slab->bo); 155 /* @return token to identify slab or NULL if we just allocated a new bo */ 158 uint32_t size, struct nouveau_bo **bo, uint32_t *offset) 168 bo); 195 nouveau_bo_ref(slab->bo, bo); 266 nouveau_bo_ref(NULL, &slab->bo); 157 nouveau_mm_allocate(struct nouveau_mman *cache, uint32_t size, struct nouveau_bo **bo, uint32_t *offset) argument [all...] |
H A D | nouveau_video.h | 85 struct nouveau_bo *bo, uint32_t offset, 89 bo, offset, 90 NOUVEAU_BO_LOW | (bo->flags & NOUVEAU_BO_APER) | rw, 93 PUSH_DATA(push, bo->offset + offset); 84 PUSH_MTHDl(struct nouveau_pushbuf *push, int subc, int mthd, struct nouveau_bo *bo, uint32_t offset, struct nouveau_bufctx *ctx, int bin, uint32_t rw) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/ |
H A D | nv30_state_validate.c | 126 rbo = nv30_miptree(rsf->base.texture)->base.bo; 127 zbo = nv30_miptree(zsf->base.texture)->base.bo; 146 struct nouveau_bo *bo = nv30_miptree(sf->base.texture)->base.bo; local 149 PUSH_MTHDl(push, NV30_3D(COLOR1_OFFSET), BUFCTX_FB, bo, sf->offset, 156 struct nouveau_bo *bo = nv30_miptree(sf->base.texture)->base.bo; local 159 PUSH_MTHDl(push, NV40_3D(COLOR2_OFFSET), BUFCTX_FB, bo, sf->offset, 167 struct nouveau_bo *bo = nv30_miptree(sf->base.texture)->base.bo; local [all...] |
H A D | nv30_winsys.h | 23 PUSH_RELOC(struct nouveau_pushbuf *push, struct nouveau_bo *bo, uint32_t offset, argument 26 nouveau_pushbuf_reloc(push, bo, offset, flags, vor, tor); 44 struct nouveau_bo *bo, uint32_t access) 46 nouveau_bufctx_refn(bufctx(push), bin, bo, access); local 51 struct nouveau_bo *bo, uint32_t offset, uint32_t access) 54 bo, offset, access | NOUVEAU_BO_LOW, 0, 0)->priv = NULL; local 55 PUSH_DATA(push, bo->offset + offset); 60 struct nouveau_bo *bo, uint32_t access, uint32_t vor, uint32_t tor) 63 bo, 0, access | NOUVEAU_BO_OR, vor, tor)->priv = NULL; local 64 if (bo 43 PUSH_REFN(struct nouveau_pushbuf *push, int bin, struct nouveau_bo *bo, uint32_t access) argument 50 PUSH_MTHDl(struct nouveau_pushbuf *push, int subc, int mthd, int bin, struct nouveau_bo *bo, uint32_t offset, uint32_t access) argument 59 PUSH_MTHDo(struct nouveau_pushbuf *push, int subc, int mthd, int bin, struct nouveau_bo *bo, uint32_t access, uint32_t vor, uint32_t tor) argument 71 PUSH_MTHDs(struct nouveau_pushbuf *push, int subc, int mthd, int bin, struct nouveau_bo *bo, uint32_t data, uint32_t access, uint32_t vor, uint32_t tor) argument 76 bo, data, access | NOUVEAU_BO_OR, vor, tor)->priv = NULL; local 84 PUSH_MTHD(struct nouveau_pushbuf *push, int subc, int mthd, int bin, struct nouveau_bo *bo, uint32_t data, uint32_t access, uint32_t vor, uint32_t tor) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
H A D | nv50_query.c | 42 struct nouveau_bo *bo; member in struct:nv50_query 65 if (q->bo) { 66 nouveau_bo_ref(NULL, &q->bo); 76 q->mm = nouveau_mm_allocate(screen->base.mm_GART, size, &q->bo, &q->base); 77 if (!q->bo) 81 ret = nouveau_bo_map(q->bo, 0, screen->base.client); 86 q->data = (uint32_t *)((uint8_t *)q->bo->map + q->base); 133 PUSH_REFN (push, q->bo, NOUVEAU_BO_GART | NOUVEAU_BO_WR); 135 PUSH_DATAh(push, q->bo->offset + offset); 136 PUSH_DATA (push, q->bo [all...] |
H A D | nv50_screen.h | 62 struct nouveau_bo *bo; member in struct:nv50_screen::__anon13848 98 if (likely(res->bo)) {
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H A D | nv50_state_validate.c | 24 struct nouveau_bo *bo = mt->base.bo; local 27 PUSH_DATAh(push, bo->offset + sf->offset); 28 PUSH_DATA (push, bo->offset + sf->offset); 30 if (likely(nouveau_bo_memtype(bo))) { 65 struct nouveau_bo *bo = mt->base.bo; local 69 PUSH_DATAh(push, bo->offset + sf->offset); 70 PUSH_DATA (push, bo->offset + sf->offset);
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H A D | nv50_transfer.c | 24 rect->bo = mt->base.bo; 69 nouveau_bufctx_refn(bctx, 0, src->bo, src->domain | NOUVEAU_BO_RD); 70 nouveau_bufctx_refn(bctx, 0, dst->bo, dst->domain | NOUVEAU_BO_WR); 74 if (nouveau_bo_memtype(src->bo)) { 91 if (nouveau_bo_memtype(dst->bo)) { 112 PUSH_DATAh(push, src->bo->offset + src_ofst); 113 PUSH_DATAh(push, dst->bo->offset + dst_ofst); 116 PUSH_DATA (push, src->bo->offset + src_ofst); 117 PUSH_DATA (push, dst->bo 384 nv50_cb_push(struct nouveau_context *nv, struct nouveau_bo *bo, unsigned domain, unsigned base, unsigned size, unsigned offset, unsigned words, const uint32_t *data) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/ |
H A D | nvc0_query.c | 40 struct nouveau_bo *bo; member in struct:nvc0_query 64 if (q->bo) { 65 nouveau_bo_ref(NULL, &q->bo); 75 q->mm = nouveau_mm_allocate(screen->base.mm_GART, size, &q->bo, &q->base); 76 if (!q->bo) 80 ret = nouveau_bo_map(q->bo, 0, screen->base.client); 85 q->data = (uint32_t *)((uint8_t *)q->bo->map + q->base); 163 PUSH_REFN (push, q->bo, NOUVEAU_BO_GART | NOUVEAU_BO_WR); 165 PUSH_DATAh(push, q->bo->offset + offset); 166 PUSH_DATA (push, q->bo [all...] |
H A D | nvc0_screen.h | 57 struct nouveau_bo *bo; member in struct:nvc0_screen::__anon13858 97 if (likely(res->bo)) {
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H A D | nvc0_state_validate.c | 13 struct nouveau_bo *bo = mt->base.bo; local 32 PUSH_DATAh(push, bo->offset + offset); 33 PUSH_DATA (push, bo->offset + offset); 36 PUSH_DATAh(push, bo->offset + offset); 37 PUSH_DATA (push, bo->offset + offset); 75 struct nouveau_bo *bo = res->bo; local 80 if (likely(nouveau_bo_memtype(bo))) { 256 struct nouveau_bo *bo local 366 struct nouveau_bo *bo = nvc0->screen->uniform_bo; local [all...] |
H A D | nvc0_transfer.c | 34 nouveau_bufctx_refn(bctx, 0, src->bo, src->domain | NOUVEAU_BO_RD); 35 nouveau_bufctx_refn(bctx, 0, dst->bo, dst->domain | NOUVEAU_BO_WR); 39 if (nouveau_bo_memtype(src->bo)) { 55 if (nouveau_bo_memtype(dst->bo)) { 75 PUSH_DATAh(push, src->bo->offset + src_ofst); 76 PUSH_DATA (push, src->bo->offset + src_ofst); 79 PUSH_DATAh(push, dst->bo->offset + dst_ofst); 80 PUSH_DATA (push, dst->bo->offset + dst_ofst); 126 nouveau_bufctx_refn(bctx, 0, dst->bo, dst->domain | NOUVEAU_BO_WR); 127 nouveau_bufctx_refn(bctx, 0, src->bo, sr 464 nvc0_cb_push(struct nouveau_context *nv, struct nouveau_bo *bo, unsigned domain, unsigned base, unsigned size, unsigned offset, unsigned words, const uint32_t *data) argument [all...] |
H A D | nvc0_winsys.h | 20 unsigned flags, struct nouveau_bo *bo) 22 nouveau_bufctx_refn(bufctx, bin, bo, flags)->priv = NULL; 30 nouveau_bufctx_refn(bufctx, bin, res->bo, flags | res->domain); 35 #define BCTX_REFN_bo(ctx, bin, fl, bo) \ 36 nv50_add_bufctx_resident_bo(ctx, NVC0_BIND_##bin, fl, bo); 42 PUSH_REFN(struct nouveau_pushbuf *push, struct nouveau_bo *bo, uint32_t flags) argument 44 struct nouveau_pushbuf_refn ref = { bo, flags }; 94 nouveau_bo_memtype(const struct nouveau_bo *bo) argument 96 return bo->config.nvc0.memtype; 19 nv50_add_bufctx_resident_bo(struct nouveau_bufctx *bufctx, int bin, unsigned flags, struct nouveau_bo *bo) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/egl/drm/ |
H A D | native_drm.c | 254 struct gbm_gallium_drm_bo *bo = (void *) pix; local 256 return drm_display_create_surface_from_resource(ndpy, bo->resource);
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/external/chromium_org/third_party/mesa/src/src/gallium/winsys/radeon/drm/ |
H A D | radeon_drm_cs.c | 210 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo) argument 214 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1); 219 if (reloc->handle == bo->handle) { 227 if (reloc->handle == bo->handle) { 238 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/ 248 struct radeon_bo *bo, 255 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1); 262 if (reloc->handle == bo->handle) { 271 if (reloc->handle == bo->handle) { 275 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo 247 radeon_add_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo, enum radeon_bo_usage usage, enum radeon_bo_domain domains, enum radeon_bo_domain *added_domains) argument 320 struct radeon_bo *bo = (struct radeon_bo*)buf; local 383 struct radeon_bo *bo = (struct radeon_bo*)buf; local 538 struct radeon_bo *bo = (struct radeon_bo*)_buf; local [all...] |
/external/chromium_org/third_party/mesa/src/src/gbm/main/ |
H A D | gbm.c | 172 * \param bo The buffer object 177 gbm_bo_get_width(struct gbm_bo *bo) argument 179 return bo->width; 184 * \param bo The buffer object 188 gbm_bo_get_height(struct gbm_bo *bo) argument 190 return bo->height; 198 * \param bo The buffer object 202 gbm_bo_get_stride(struct gbm_bo *bo) argument 204 return bo->stride; 211 * \param bo Th 215 gbm_bo_get_format(struct gbm_bo *bo) argument 229 gbm_bo_get_handle(struct gbm_bo *bo) argument 248 gbm_bo_write(struct gbm_bo *bo, const void *buf, size_t count) argument 259 gbm_bo_get_device(struct gbm_bo *bo) argument 272 gbm_bo_set_user_data(struct gbm_bo *bo, void *data, void (*destroy_user_data)(struct gbm_bo *, void *)) argument 288 gbm_bo_get_user_data(struct gbm_bo *bo) argument 300 gbm_bo_destroy(struct gbm_bo *bo) argument 447 gbm_surface_release_buffer(struct gbm_surface *surf, struct gbm_bo *bo) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
H A D | gen7_wm_surface_state.c | 127 assert ((mcs_mt->region->bo->offset & 0xfff) == 0); 130 surf->ss6.mcs_enabled.mcs_base_address = mcs_mt->region->bo->offset >> 12; 131 drm_intel_bo_emit_reloc(brw->intel.batch.bo, 134 mcs_mt->region->bo, 242 drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; local 260 if (bo) { 261 surf->ss1.base_addr = bo->offset; /* reloc */ 267 drm_intel_bo_emit_reloc(brw->intel.batch.bo, 270 bo, 0, 352 intelObj->mt->region->bo 404 gen7_create_constant_surface(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, int width, uint32_t *out_offset) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/nouveau/ |
H A D | nouveau_vbo_t.c | 91 nouveau_bo_ref(NULL, &a->bo); 268 struct nouveau_bo *bo, int *pdelta) 273 if (a->bo == bo) { 293 struct nouveau_bo *bo[NUM_VERTEX_ATTRS]; local 307 bo[i] = NULL; 311 nouveau_bo_ref(to_nouveau_bufferobj(obj)->bo, &bo[i]); 319 &bo[i], &offset[i]); 329 dirty |= check_update_array(a, offset[i], bo[ 267 check_update_array(struct nouveau_array *a, unsigned offset, struct nouveau_bo *bo, int *pdelta) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
H A D | r200_blit.c | 102 struct radeon_bo *bo, 152 if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 154 if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 292 OUT_BATCH_RELOC(offset, bo, offset, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 298 struct radeon_bo *bo, 335 if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 337 if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 351 OUT_BATCH_RELOC(offset, bo, offset, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 353 OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 516 "offset [%d x %d], format %s, bo 99 emit_tx_setup(struct r200_context *r200, gl_format src_mesa_format, gl_format dst_mesa_format, struct radeon_bo *bo, intptr_t offset, unsigned width, unsigned height, unsigned pitch) argument 297 emit_cb_setup(struct r200_context *r200, struct radeon_bo *bo, intptr_t offset, gl_format mesa_format, unsigned pitch, unsigned width, unsigned height) argument [all...] |