/external/llvm/include/llvm/IR/ |
H A D | CallSite.h | 170 bool isTailCall() const { function in class:llvm::CallSiteBase 171 return isCall() && cast<CallInst>(getInstruction())->isTailCall();
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H A D | Instructions.h | 1297 bool isTailCall() const { function in class:llvm::CallInst
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 401 bool &isTailCall = CLI.IsTailCall; local 406 isTailCall = false; 413 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, 577 bool isTailCall, 575 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFrameLowering.cpp | 883 bool isTailCall = (RetOpcode == ARM::TCRETURNdi || local 901 if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt &&
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H A D | ARMISelLowering.cpp | 1388 bool &isTailCall = CLI.IsTailCall; local 1400 isTailCall = false; 1402 if (isTailCall) { 1404 isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, 1407 if (!isTailCall && CLI.CS && CLI.CS->isMustTailCall()) 1412 if (isTailCall) { 1572 if (!isTailCall) 1580 if (isTailCall) { 1741 if (!isTailCall) { 1766 if (isTailCall) [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 404 bool &isTailCall = CLI.IsTailCall; local 440 if(isTailCall) { 443 isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, 450 isTailCall = false; 454 if (isTailCall) { 528 if (!isTailCall) 538 if (!isTailCall) { 547 if (isTailCall) { 598 if (isTailCall)
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1041 bool &isTailCall = CLI.IsTailCall; local 1046 isTailCall = false; 1055 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, 1108 /// TODO: isTailCall, sret. 1112 bool isTailCall, 1110 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 660 bool &isTailCall = CLI.IsTailCall; local 1248 // set isTailCall to false for now, until we figure out how to express 1250 isTailCall = false;
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 692 bool &isTailCall = CLI.IsTailCall; local 697 isTailCall = false;
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/external/llvm/lib/IR/ |
H A D | Core.cpp | 1922 return unwrap<CallInst>(Call)->isTailCall(); 1925 void LLVMSetTailCall(LLVMValueRef Call, LLVMBool isTailCall) { argument 1926 unwrap<CallInst>(Call)->setTailCall(isTailCall);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2168 if (!CI->isTailCall() || getTargetMachine().Options.DisableTailCalls) 2578 bool &isTailCall = CLI.IsTailCall; local 2588 isTailCall = false; 2595 isTailCall = true; 2596 } else if (isTailCall) { 2598 isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, 2605 if (!MF.getTarget().Options.GuaranteedTailCallOpt && isTailCall) 2608 if (isTailCall) 2637 if (isTailCall && !IsSibcall && !IsMustTail) { 2668 if (isTailCall [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3073 static int CalculateTailCallSPDiff(SelectionDAG& DAG, bool isTailCall, argument 3076 if (!isTailCall) return 0; 3281 unsigned ArgOffset, bool isPPC64, bool isTailCall, 3286 if (!isTailCall) { 3332 SDValue &Chain, SDLoc dl, int SPDiff, bool isTailCall, 3486 if (isTailCall) 3496 if (isTailCall) 3565 bool isTailCall, bool isVarArg, 3577 isTailCall, RegsToPass, Ops, NodeTys, 3601 if (isTailCall) { 3279 LowerMemOpCallTo(SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg, SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64, bool isTailCall, bool isVector, SmallVectorImpl<SDValue> &MemOpChains, SmallVectorImpl<TailCallArgumentInfo> &TailCallArguments, SDLoc dl) argument 3331 PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain, SDLoc dl, int SPDiff, bool isTailCall, SmallVectorImpl<std::pair<unsigned, SDValue> > &RegsToPass, SmallVectorImpl<SDValue> &Ops, std::vector<EVT> &NodeTys, const PPCSubtarget &Subtarget) argument 3564 FinishCall(CallingConv::ID CallConv, SDLoc dl, bool isTailCall, bool isVarArg, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals) const argument 3676 bool &isTailCall = CLI.IsTailCall; local 3705 LowerCall_32SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3942 LowerCall_64SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 4357 LowerCall_Darwin(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |