/external/zlib/src/ |
H A D | gzread.c | 79 left unchanged if there is no more input data available, will be set to COPY 162 state->how = COPY; 224 otherwise 0. gz_fetch() will leave state->how as COPY or GZIP unless the 233 case LOOK: /* -> LOOK, COPY (only if never GZIP), or GZIP */ 239 case COPY: /* -> COPY */ 355 else if (state->how == COPY) { /* read directly */
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/external/bison/djgpp/ |
H A D | djunpack.bat | 48 Rem The following uses a feature of COPY whereby it does not copy
55 Rem See the comment above about the reason for using COPY.
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/external/chromium_org/courgette/ |
H A D | encoded_program.cc | 204 // Fold adjacent COPY instructions into one. This nearly halves the size of 212 ops_.back() = COPY; 215 if (ok && ops_.back() == COPY) { 228 ok = ops_.push_back(COPY) && copy_counts_.push_back(count); 558 case COPY: {
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/external/eclipse-windowbuilder/propertysheet/src/org/eclipse/wb/internal/core/utils/binding/editors/controls/ |
H A D | AbstractControlActionsManager.java | 46 IWorkbenchActionDefinitionIds.COPY,
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/external/elfutils/0.153/backends/ |
H A D | common-reloc.c | 115 return reloc == R_TYPE (COPY);
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H A D | ia64_reloc.def | 88 RELOC_TYPE (COPY, EXEC)
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H A D | ppc64_reloc.def | 46 RELOC_TYPE (COPY, EXEC)
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H A D | ppc_reloc.def | 47 RELOC_TYPE (COPY, EXEC)
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H A D | sparc_reloc.def | 47 RELOC_TYPE (COPY, EXEC)
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/external/llvm/lib/Target/R600/ |
H A D | SILowerI1Copies.cpp | 105 if (MI.getOpcode() != AMDGPU::COPY ||
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H A D | SIInstrInfo.cpp | 82 if (Opc != TargetOpcode::COPY && Opc != AMDGPU::S_MOV_B32) 682 case AMDGPU::COPY: return AMDGPU::COPY; 687 AMDGPU::COPY : AMDGPU::V_MOV_B32_e32; 748 case AMDGPU::COPY: 766 Opcode = AMDGPU::COPY; 794 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(TargetOpcode::COPY), 798 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(TargetOpcode::COPY), 979 get(AMDGPU::COPY), DstReg) 995 BuildMI(MBB, MI, MI->getDebugLoc(), get(AMDGPU::COPY), NewSrc [all...] |
H A D | R600EmitClauseMarkers.cpp | 83 case AMDGPU::COPY:
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/external/chromium_org/third_party/yasm/source/patched-yasm/libyasm/ |
H A D | mergesort.c | 189 goto COPY; 196 COPY: b = t;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 137 // Or just a plain COPY instruction. This can be directly to/from FPR64, 139 if (MI->getOpcode() == AArch64::COPY) { 267 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(AArch64::COPY),
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEFrameLowering.cpp | 111 case TargetOpcode::COPY: 139 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), Dst) 158 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), VR) 184 const MCInstrDesc &Desc = TII.get(TargetOpcode::COPY); 253 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstLo) 256 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstHi)
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H A D | MipsOptimizePICCall.cpp | 136 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 37 /// using a smaller register class, emit a COPY to a new virtual register 176 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY), 335 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); 450 // VReg couldn't be reasonably constrained. Emit a COPY to a new virtual 455 BuildMI(*MBB, InsertPos, DL, TII->get(TargetOpcode::COPY), NewReg) 482 // EXTRACT_SUBREG is lowered as %dst = COPY %src:sub. There are no 483 // constraints on the %dst register, COPY can target all legal register 503 TII->get(TargetOpcode::COPY), VRBase).addReg(SrcReg); 507 // constrain its register class or issue a COPY to a compatible register 519 TII->get(TargetOpcode::COPY), VRBas [all...] |
/external/elfutils/0.153/src/ |
H A D | unstrip.c | 1017 #define COPY(field) sec->shdr.field = shdr.s32[i].field 1018 COPY (sh_name); 1019 COPY (sh_type); 1020 COPY (sh_flags); 1021 COPY (sh_addr); 1022 COPY (sh_offset); 1023 COPY (sh_size); 1024 COPY (sh_link); 1025 COPY (sh_info); 1026 COPY (sh_addralig macro 1015 #define COPY macro [all...] |
/external/chromium_org/native_client_sdk/src/tools/ |
H A D | host_vc.mk | 129 $(call LOG,COPY,$$@,$(CP) $$^ $$@)
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonNewValueJump.cpp | 192 // COPY can remateriaze things in between feeder, compare and nvj. 195 MII->getOpcode() == TargetOpcode::COPY) 243 // Make sure that that second register is not from COPY 249 if (def->getOpcode() == TargetOpcode::COPY)
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/external/chromium_org/ui/file_manager/file_manager/background/js/ |
H A D | file_operation_handler.js | 82 case 'COPY': return strf('COPY_TARGET_EXISTS_ERROR', name); 91 case 'COPY': return strf('COPY_FILESYSTEM_ERROR', detail); 99 case 'COPY': return strf('COPY_UNEXPECTED_ERROR', event.error.code); 108 case 'COPY': return strf('COPY_FILE_NAME', name); 116 case 'COPY': return strf('COPY_ITEMS_REMAINING', remainNumber); 152 case 'COPY': return ProgressItemType.COPY;
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/external/chromium_org/ui/file_manager/file_manager/foreground/js/ |
H A D | progress_center_item_group.js | 353 case ProgressItemType.COPY:
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H A D | file_transfer_controller.js | 373 item.type = ProgressItemType.COPY; 419 toMove ? ProgressItemType.MOVE : ProgressItemType.COPY;
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/external/llvm/lib/CodeGen/ |
H A D | ExpandPostRAPseudos.cpp | 10 // This file defines a pass that expands COPY and SUBREG_TO_REG pseudo 213 case TargetOpcode::COPY:
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1057 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY), 1074 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY), 1551 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY), 1573 const static unsigned Copy = TargetOpcode::COPY; 1697 // up with bogus copies like %R9B = COPY %AH. Reference AX 2022 TII.get(TargetOpcode::COPY), ResultReg) 2113 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY), 2218 TII.get(TargetOpcode::COPY), SrcReg).addReg(FrameReg); 2442 TII.get(TargetOpcode::COPY), Reg[VT.SimpleTy-MVT::i8]) 2453 TII.get(TargetOpcode::COPY), X8 [all...] |