| /external/llvm/lib/Transforms/Utils/ |
| H A D | InlineFunction.cpp | 333 Type *Tys[3] = { VoidPtrTy, VoidPtrTy, Type::getInt64Ty(Context) }; local
334 Function *MemCpyFn = Intrinsic::getDeclaration(M, Intrinsic::memcpy, Tys);
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| /external/llvm/lib/IR/ |
| H A D | Core.cpp | 389 ArrayRef<Type*> Tys(unwrap(ParamTypes), ParamCount);
390 return wrap(FunctionType::get(unwrap(ReturnType), Tys, IsVarArg != 0));
416 ArrayRef<Type*> Tys(unwrap(ElementTypes), ElementCount);
417 return wrap(StructType::get(*unwrap(C), Tys, Packed != 0));
441 ArrayRef<Type*> Tys(unwrap(ElementTypes), ElementCount);
442 unwrap<StructType>(StructTy)->setBody(Tys, Packed != 0);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 568 MVT Tys[6] = {MVT::v8i8, MVT::v4i8, MVT::v2i8, local
572 setLoadExtAction(ISD::EXTLOAD, Tys[i], Legal);
573 setLoadExtAction(ISD::ZEXTLOAD, Tys[i], Legal);
574 setLoadExtAction(ISD::SEXTLOAD, Tys[i], Legal);
6136 SDVTList Tys = DAG.getVTList(ArgVT, ArgVT); local
6137 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys,
8918 EVT Tys[6]; local
8922 Tys[n] = VecTy;
8923 Tys[n++] = MVT::i32;
8924 Tys[
8999 EVT Tys[5]; local
10825 Type *Tys[] = { Addr->getType() }; local
10859 Type *Tys[] = { Addr->getType() }; local
[all...] |
| /external/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 3240 Type *Tys[] = {CI->getType()}; local
3242 Tys[0] = VectorType::get(CI->getType()->getScalarType(), VF);
3244 Function *F = Intrinsic::getDeclaration(M, ID, Tys);
5820 SmallVector<Type*, 4> Tys;
5822 Tys.push_back(ToVectorTy(CI->getArgOperand(i)->getType(), VF));
5823 return TTI.getIntrinsicInstrCost(ID, RetTy, Tys);
|
| H A D | SLPVectorizer.cpp | 1890 Type *Tys[] = { VectorType::get(CI->getType(), E->Scalars.size()) }; local
1891 Function *CF = Intrinsic::getDeclaration(M, ID, Tys);
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| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 248 Type *Tys[3] = { CI.getArgOperand(0)->getType(), local
251 CI.setCalledFunction(Intrinsic::getDeclaration(M, MemCpyID, Tys));
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 7430 EVT Tys[3] = { VT, MVT::i64, MVT::Other }; local
7431 SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, 3));
7554 EVT Tys[6]; local
7558 Tys[n] = VecTy;
7559 Tys[n++] = MVT::i64; // Type of write back register
7560 Tys[n] = MVT::Other; // Type of the chain
7561 SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumResultVecs + 2));
7957 Type *Tys[] = { Addr->getType() }; local
7960 Function *Ldxr = llvm::Intrinsic::getDeclaration(M, Int, Tys);
7991 Type *Tys[] local
[all...] |
| /external/clang/lib/CodeGen/ |
| H A D | CodeGenModule.h | 809 llvm::Function *getIntrinsic(unsigned IID, ArrayRef<llvm::Type*> Tys = None);
|
| H A D | CGExpr.cpp | 487 llvm::Type *Tys[2] = { IntPtrTy, Int8PtrTy }; local
488 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::objectsize, Tys);
|
| H A D | CodeGenModule.cpp | 2416 ArrayRef<llvm::Type*> Tys) {
2418 Tys);
2415 getIntrinsic(unsigned IID, ArrayRef<llvm::Type*> Tys) argument
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5717 SDVTList Tys = DAG.getVTList(MVT::v2i64, MVT::Other); local
5720 DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, MVT::i64,
10705 SDVTList Tys;
10708 Tys = DAG.getVTList(MVT::f64, MVT::Other, MVT::Glue);
10710 Tys = DAG.getVTList(Op.getValueType(), MVT::Other);
10729 Tys, Ops, SrcVT, MMO);
10742 Tys = DAG.getVTList(MVT::Other);
10751 Chain = DAG.getMemIntrinsicNode(X86ISD::FST, DL, Tys,
10944 SDVTList Tys = DAG.getVTList(MVT::f80, MVT::Other);
10946 SDValue Fild = DAG.getMemIntrinsicNode(X86ISD::FILD, dl, Tys, Op
[all...] |