Searched refs:Br (Results 1 - 25 of 47) sorted by relevance

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/external/llvm/lib/Target/Mips/
H A DMipsLongBranch.cpp55 MachineInstr *Br; member in struct:__anon26053::MBBInfo
57 MBBInfo() : Size(0), HasLongBranch(false), Br(nullptr) {}
80 int64_t computeOffset(const MachineInstr *Br);
81 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
102 /// Iterate over list of Br's operands and search for a MachineBasicBlock
104 static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) { argument
105 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
106 const MachineOperand &MO = Br.getOperand(I);
184 ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End); local
186 if ((Br !
195 computeOffset(const MachineInstr *Br) argument
217 replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL, MachineBasicBlock *MBBOpnd) argument
[all...]
H A DMipsConstantIslandPass.cpp413 bool fixupImmediateBr(ImmBranch &Br);
414 bool fixupConditionalBr(ImmBranch &Br);
415 bool fixupUnconditionalBr(ImmBranch &Br);
1526 bool MipsConstantIslands::fixupImmediateBr(ImmBranch &Br) { argument
1527 MachineInstr *MI = Br.MI;
1532 if (isBBInRange(MI, DestBB, Br.MaxDisp))
1535 if (!Br.isCond)
1536 return fixupUnconditionalBr(Br);
1537 return fixupConditionalBr(Br);
1545 MipsConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { argument
1586 fixupConditionalBr(ImmBranch &Br) argument
[all...]
/external/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp300 bool fixupImmediateBr(ImmBranch &Br);
301 bool fixupConditionalBr(ImmBranch &Br);
302 bool fixupUnconditionalBr(ImmBranch &Br);
1530 bool ARMConstantIslands::fixupImmediateBr(ImmBranch &Br) { argument
1531 MachineInstr *MI = Br.MI;
1535 if (isBBInRange(MI, DestBB, Br.MaxDisp))
1538 if (!Br.isCond)
1539 return fixupUnconditionalBr(Br);
1540 return fixupConditionalBr(Br);
1548 ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { argument
1571 fixupConditionalBr(ImmBranch &Br) argument
1753 ImmBranch &Br = ImmBranches[i]; local
[all...]
/external/clang/test/SemaCXX/
H A Dfunctional-cast.cpp131 typedef B &Br; typedef
132 (void)Br(*((C1*)0));
163 typedef B &Br; typedef
164 (void)Br(*((A*)0));
170 (void)Br(*((const A*)0)); // const_cast appended
/external/eigen/unsupported/Eigen/src/KroneckerProduct/
H A DKroneckerTensorProduct.h116 const Index Br = m_B.rows(), local
120 Block<Dest,BlockRows,BlockCols>(dst,i*Br,j*Bc,Br,Bc) = m_A.coeff(i,j) * m_B;
127 const Index Br = m_B.rows(), local
141 const Index i = itA.row() * Br + itB.row(),
/external/clang/lib/CodeGen/
H A DCGCleanup.cpp322 if (llvm::BranchInst *Br = dyn_cast<llvm::BranchInst>(Term)) {
323 assert(Br->isUnconditional());
327 llvm::SwitchInst::Create(Load, Br->getSuccessor(0), 4, Block);
328 Br->eraseFromParent();
438 llvm::BranchInst *Br = dyn_cast<llvm::BranchInst>(Pred->getTerminator());
439 if (!Br || Br->isConditional()) return Entry;
440 assert(Br->getSuccessor(0) == Entry);
449 Br->eraseFromParent();
505 if (llvm::BranchInst *Br
[all...]
/external/llvm/lib/Transforms/Scalar/
H A DLoopIdiomRecognize.cpp115 Value *matchCondition(BranchInst *Br, BasicBlock *NonZeroTarget) const;
287 if (BranchInst *Br = getBranch(BB)) {
288 return Br->isUnconditional() && BB->size() == 1;
295 BranchInst *Br = getBranch(BB); local
296 return Br && Br->isConditional() ? BB : nullptr;
345 Value *NclPopcountRecognize::matchCondition(BranchInst *Br, argument
347 if (!Br || !Br->isConditional())
350 ICmpInst *Cond = dyn_cast<ICmpInst>(Br
[all...]
/external/llvm/lib/Transforms/Utils/
H A DInlineFunction.cpp905 TerminatorInst *Br = OrigBB->getTerminator(); local
906 assert(Br && Br->getOpcode() == Instruction::Br &&
908 Br->setOperand(0, FirstNewBlock);
1001 assert(cast<BranchInst>(Br)->isUnconditional() && "splitBasicBlock broken!");
1002 BasicBlock *CalleeEntry = cast<BranchInst>(Br)->getSuccessor(0);
1007 OrigBB->getInstList().splice(Br, CalleeEntry->getInstList());
1010 OrigBB->getInstList().erase(Br);
/external/chromium_org/v8/src/arm64/
H A Ddebug-arm64.cc223 __ Br(scratch);
370 __ Br(scratch);
H A Dbuiltins-arm64.cc276 __ Br(x2);
282 __ Br(x0);
842 __ Br(x0);
886 __ Br(x0);
917 __ Br(lr);
H A Ddeoptimizer-arm64.cc301 __ Br(continuation);
H A Dmacro-assembler-arm64.cc1556 Br(scratch1);
2093 Br(target);
2101 Br(temp);
H A Dmacro-assembler-arm64-inl.h382 void MacroAssembler::Br(const Register& xn) { function in class:v8::internal::MacroAssembler
H A Dmacro-assembler-arm64.h317 inline void Br(const Register& xn);
H A Dregexp-macro-assembler-arm64.cc195 __ Br(x10);
/external/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp117 I->getOpcode() != MSP430::Br &&
196 if (I->getOpcode() == MSP430::Br ||
/external/chromium_org/v8/src/ic/arm64/
H A Dstub-cache-arm64.cc86 __ Br(scratch);
/external/llvm/lib/Transforms/ObjCARC/
H A DObjCARCUtil.cpp213 case Instruction::Ret: case Instruction::Br:
/external/llvm/lib/Analysis/
H A DCostModel.cpp392 case Instruction::Br: {
/external/llvm/lib/IR/
H A DInstruction.cpp194 case Br: return "br";
H A DInstructions.cpp732 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
740 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
752 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
761 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
774 TerminatorInst(Type::getVoidTy(BI.getContext()), Instruction::Br,
/external/lldb/source/Expression/
H A DIRInterpreter.cpp466 case Instruction::Br:
870 case Instruction::Br:
877 log->Printf("getOpcode() returns Br, but instruction is not a BranchInst");
/external/llvm/lib/AsmParser/
H A DLLLexer.cpp726 INSTKEYWORD(br, Br);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1138 case Instruction::Br: {
/external/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1336 case Br: return 0;

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